Abstract:
A photoresist delivery system includes a photoresist pump, a photoresist reservoir coupled to the photoresist pump, and a photoresist container. A control valve is between the photoresist reservoir and the photoresist container and is movable from a closed position to an open position upon engagement of the photoresist container with the photoresist reservoir to replenish photoresist therein.
Abstract:
A method of processing a semiconductor wafer may include providing a rotatably alignable photolithography mask that includes different mask images. Each mask image may be in a corresponding different mask sector. The method may also include performing a series of exposures with the rotatably alignable photolithography mask at different rotational alignments with respect to the semiconductor wafer so that the different mask images produce at least one working semiconductor wafer sector, and at least one non-working semiconductor wafer sector.
Abstract:
An optical assembly may include a substrate, a housing carried by the substrate and having at least one adhesive-receiving recess in an upper surface thereof, and a lens carried by the housing. The optical assembly may also include a liquid crystal focus cell adjacent the lens and including cell layers and pairs of electrically conductive contacts associated therewith. The optical assembly may also include at least one electrically conductive member within the at least one adhesive-receiving recess and coupling together each pair of the electrically conductive contacts, and an adhesive body in the at least one adhesive-receiving recess covering the at least one electrically conductive member.
Abstract:
An integrated circuit package includes an integrated circuit die in a reconstituted substrate. The active side is processed then covered in molding compound while the inactive side is processed. The molding compound on the active side is then partially removed and solder balls are placed on the active side.
Abstract:
An electronics assembly includes a semiconductor die assembly, an enclosure affixed to the semiconductor die assembly, the enclosure defining first and second chambers over the semiconductor die assembly, and first and second optical elements mounted in the first and second chambers, respectively. The semiconductor die assembly includes a semiconductor die encapsulated in a molded material, an encapsulation layer located on the top surface of the semiconductor die, and at least one patterned metal layer and at least one dielectric layer over the encapsulation layer. Conductive pillars extend through the encapsulation layer for electrical connection to the semiconductor die. The encapsulation layer blocks optical crosstalk between the first and second chambers. A method is provided for making the electronics assembly.
Abstract:
A method comprises depositing an optical filter layer on a glass wafer, then cutting the wafer into dice. The dice are positioned on a carrier and encapsulated in a molding compound to form a reconstituted wafer, and the wafer is back-ground and polished. Lens faces are positioned on opposing surfaces of the glass dice and spacers are positioned on one side of the wafer. The wafer is then cut into lens modules, each having two side-by-side lenses with an opaque molding compound barrier between. The individual modules are attached to devices that require dual lenses, such as, e.g., proximity sensors that use a light source and a light receiver or detector.
Abstract:
The present disclosure is directed to an infrared sensor that includes a plurality of pairs of support structures positioned on the substrate, each pair including a first support structure adjacent to a second support structure. The sensor includes plurality of pixels, where each pixel is associated with one of the pairs of support structures. Each pixel includes a first infrared reflector layer on the substrate between the first and the second support structures, a membrane formed on the first and second support structures, a thermally conductive resistive layer on the membrane and positioned above the first infrared reflector layer, a second infrared reflector layer on the resistive layer, and an infrared absorption layer on the second infrared reflector layer.
Abstract:
Methods and devices for packaging integrated circuits. A packaged device may include an integrated circuit, a first packaging component including a patterned surface, and a second packaging component. The patterned surface of the first packaging component may be adhesively coupled to a surface of the second packaging component or a surface of the integrated circuit. The integrated circuit may be at least partially enclosed between the first and second packaging components. A packaging method may include patterning a surface of a packaging component of an integrated circuit package. The surface of the packaging component may be for adhesively coupling to a second component to at least partially enclose an integrated circuit in the integrated circuit package.
Abstract:
Embodiments of the present disclosure are directed to optical packages having a package body that includes a light protection coating on at least one surface of a transparent material. The light protection coating includes one or more openings to allow light to be transmitted to the optical device within the package body. In one embodiment, the light protection coating and the openings allow substantially perpendicular radiation to be directed to the optical device within the package body. In one exemplary embodiment the light protection coating is located on an outer surface of the transparent material. In another embodiment, the light protection coating is located on an inner surface of the transparent material inside of the package body.
Abstract:
An integrated circuit is formed having an array of memory cells located in the dielectric stack above a semiconductor substrate. Each memory cell has two adjustable resistors and two heating elements. A dielectric material separates the heating elements from the adjustable resistors. One heating element alters the resistance of one of the resistors by applying heat thereto to write data to the memory cell. The other heating element alters the resistance of the other resistor by applying heat thereto to erase data from the memory cell.