公开(公告)号：US20150041749A1

公开(公告)日：2015-02-12

申请号：US13959958

申请日：2013-08-06

Applicant: Micron Technology, Inc.

Inventor： Lequn Jennifer Liu ,  Stephen W. Russell ,  Fabio Pellizzer ,  Swapnil Lengade

IPC: H01L45/00

CPC classification number: H01L45/165 ,  H01L27/2427 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/144 ,  H01L45/1675

Abstract: A method of forming a memory cell includes forming an outer electrode material elevationally over and directly against a programmable material. The programmable material and the outer electrode material contact one another along an interface. Protective material is formed elevationally over the outer electrode material. Dopant is implanted through the protective material into the outer electrode material and the programmable material and across the interface to enhance adhesion of the outer electrode material and the programmable material relative one another across the interface. Memory cells are also disclosed.

Abstract translation: 一种形成存储单元的方法包括在外部电极材料上形成并且直接抵靠可编程材料。 可编程材料和外部电极材料沿着界面彼此接触。 保护材料在外部电极材料上垂直地形成。 通过保护材料将掺杂剂注入到外部电极材料和可编程材料中并跨越界面，以增强外部电极材料和可编程材料相对于界面的粘合性。 还公开了存储单元。

公开(公告)号：US20150028283A1

公开(公告)日：2015-01-29

申请号：US13948980

申请日：2013-07-23

Applicant: Micron Technology, Inc.

Inventor： Andrea Redaelli ,  Giorgio Servalli ,  Carmela Cupeta ,  Fabio Pellizzer

IPC: H01L45/00

CPC classification number: H01L45/1293 ,  H01L27/2463 ,  H01L45/06 ,  H01L45/065 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/1286 ,  H01L45/141 ,  H01L45/144 ,  H01L45/1608 ,  H01L45/1666 ,  H01L45/1675

Abstract: Some embodiments include methods of forming memory cells. Heater structures are formed over an array of electrical nodes, and phase change material is formed across the heater structures. The phase change material is patterned into a plurality of confined structures, with the confined structures being in one-to-one correspondence with the heater structures and being spaced from one another by one or more insulative materials that entirely laterally surround each of the confined structures. Some embodiments include memory arrays having heater structures over an array of electrical nodes. Confined phase change material structures are over the heater structures and in one-to-one correspondence with the heater structures. The confined phase change material structures are spaced from one another by one or more insulative materials that entirely laterally surround each of the confined phase change material structures.

Abstract translation: 一些实施例包括形成存储器单元的方法。 加热器结构形成在电节点阵列上，相变材料跨过加热器结构形成。 相变材料被图案化成多个限制结构，其中限制结构与加热器结构一一对应，并且通过一个或多个完全横向围绕每个限制结构的绝缘材料彼此间隔开 。 一些实施例包括在电节点阵列上具有加热器结构的存储器阵列。 密闭相变材料结构在加热器结构之上，并且与加热器结构一一对应。 受限制的相变材料结构通过一个或多个完全横向围绕每个限定相变材料结构的绝缘材料彼此间隔开。

公开(公告)号：US20150001461A1

公开(公告)日：2015-01-01

申请号：US14490395

申请日：2014-09-18

Applicant: Micron Technology, Inc.

Inventor： Fabio Pellizzer ,  Cinzia Perrone

IPC: H01L27/24 ,  H01L45/00

CPC classification number: H01L27/2463 ,  H01L27/2409 ,  H01L27/2445 ,  H01L29/02 ,  H01L45/06 ,  H01L45/12 ,  H01L45/124 ,  H01L45/141 ,  H01L45/144 ,  H01L45/145 ,  H01L45/1666 ,  H01L45/1691

Abstract: Some embodiments include a construction having oxygen-sensitive structures directly over spaced-apart nodes. Each oxygen-sensitive structure includes an angled plate having a horizontal portion along a top surface of a node and a non-horizontal portion extending upwardly from the horizontal portion. Each angled plate has an interior sidewall where an inside corner is formed between the non-horizontal portion and the horizontal portion, an exterior sidewall in opposing relation to the interior sidewall, and lateral edges. Bitlines are over the oxygen-sensitive structures, and have sidewalls extending upwardly from the lateral edges of the oxygen-sensitive structures. A non-oxygen-containing structure is along the interior sidewalls, along the exterior sidewalls, along the lateral edges, over the bitlines, and along the sidewalls of the bitlines. Some embodiments include memory arrays, and methods of forming memory cells.

Abstract translation: 一些实施例包括直接在间隔开的节点上的具有氧敏感结构的结构。 每个氧敏感结构包括具有沿节点顶表面的水平部分和从水平部分向上延伸的非水平部分的倾斜板。 每个倾斜板具有内侧壁，其中在非水平部分和水平部分之间形成内角，与侧壁相对的外侧壁和侧边缘。 位线在氧敏感结构之上，并且具有从氧敏感结构的侧边缘向上延伸的侧壁。 非含氧结构沿着内侧壁，沿着外侧壁沿着横向边缘，位线以及沿着位线的侧壁沿着内侧。 一些实施例包括存储器阵列和形成存储器单元的方法。

公开(公告)号：US20140291604A1

公开(公告)日：2014-10-02

申请号：US14268587

申请日：2014-05-02

Applicant: Micron Technology, Inc.

Inventor： Fabio Pellizzer ,  Antonino Rigano

IPC: H01L45/00

CPC classification number: H01L45/122 ,  H01L27/2427 ,  H01L27/2463 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/144 ,  H01L45/1675 ,  H01L45/1691

Abstract: Memory arrays and methods of forming the same are provided. One example method of forming a memory array can include forming a first conductive material having a looped feature using a self-aligning multiple patterning technique, and forming a first sealing material over the looped feature. A first chop mask material is formed over the first sealing material. The looped feature and the first sealing material are removed outside the first chop mask material.

Abstract translation: 提供了存储器阵列及其形成方法。 形成存储器阵列的一个示例性方法可以包括使用自对准多图案化技术形成具有环形特征的第一导电材料，以及在环形特征上形成第一密封材料。 在第一密封材料上方形成第一剁掩模材料。 环状特征和第一密封材料在第一剁掩模材料外移除。

公开(公告)号：US20140247654A1

公开(公告)日：2014-09-04

申请号：US13783884

申请日：2013-03-04

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Antonino Rigano ,  Fabio Pellizzer

IPC: G11C13/02 ,  H01L45/00

CPC classification number: H01L45/1691 ,  G11C13/0004 ,  G11C13/0023 ,  G11C13/0038 ,  H01L27/2445 ,  H01L27/2463 ,  H01L45/06 ,  H01L45/065 ,  H01L45/12 ,  H01L45/124 ,  H01L45/128 ,  H01L45/143 ,  H01L45/144 ,  H01L45/16

Abstract: Clamp elements, memories, apparatuses, and methods for forming the same are disclosed herein. An example memory may include an array of memory cells and a plurality of clamp elements. A clamp element of the plurality of clamp elements may include a cell structure formed non-orthogonally relative to at least one of a bit line or a word line of the array of memory cells and may be configured to control a voltage of a respective bit line.

Abstract translation: 本文公开了夹紧元件，存储器，装置及其形成方法。 示例性存储器可以包括存储器单元阵列和多个钳位元件。 多个钳位元件的钳位元件可以包括相对于存储器单元阵列的位线或字线中的至少一个非正交形成的单元结构，并且可以被配置为控制相应位线的电压 。

公开(公告)号：US20140154861A1

公开(公告)日：2014-06-05

申请号：US14173454

申请日：2014-02-05

Applicant: Micron Technology, Inc.

Inventor： Fabio Pellizzer ,  Cinzia Perrone

IPC: H01L21/311 ,  H01L45/00 ,  H01L21/02

CPC classification number: H01L21/31111 ,  H01L21/02115 ,  H01L27/2409 ,  H01L45/06 ,  H01L45/126 ,  H01L45/144 ,  H01L45/1608 ,  H01L45/1675

Abstract: Some embodiments include methods of forming semiconductor constructions. Carbon-containing material is formed over oxygen-sensitive material. The carbon-containing material and oxygen-sensitive material together form a structure having a sidewall that extends along both the carbon-containing material and the oxygen-sensitive material. First protective material is formed along the sidewall. The first protective material extends across an interface of the carbon-containing material and the oxygen-sensitive material, and does not extend to a top region of the carbon-containing material. Second protective material is formed across the top of the carbon-containing material, with the second protective material having a common composition to the first protective material. The second protective material is etched to expose an upper surface of the carbon-containing material. Some embodiments include semiconductor constructions, memory arrays and methods of forming memory arrays.

Abstract translation: 一些实施例包括形成半导体结构的方法。 含氧材料在氧敏感材料上形成。 含碳材料和氧敏感材料一起形成具有沿着含碳材料和氧敏感材料两者延伸的侧壁的结构。 第一保护材料沿侧壁形成。 第一保护材料延伸穿过含碳材料和氧敏感材料的界面，并且不延伸到含碳材料的顶部区域。 第二保护材料横跨含碳材料的顶部形成，第二保护材料与第一保护材料具有共同的组成。 蚀刻第二保护材料以暴露含碳材料的上表面。 一些实施例包括半导体构造，存储器阵列和形成存储器阵列的方法。

公开(公告)号：US12219883B2

公开(公告)日：2025-02-04

申请号：US17881274

申请日：2022-08-04

Applicant: Micron Technology, Inc.

Inventor： Stephen W. Russell ,  Andrea Redaelli ,  Innocenzo Tortorelli ,  Agostino Pirovano ,  Fabio Pellizzer ,  Lorenzo Fratin

IPC: H10N70/00 ,  H10B63/00 ,  H10N70/20

Abstract: Methods, systems, and devices for techniques for forming self-aligned memory structures are described. Aspects include etching a layered assembly of materials including a first conductive material and a first sacrificial material to form a first set of channels along a first direction that creates a first set of sections. An insulative material may be deposited within each of the first set of channels and a second sacrificial material may be deposited onto the first set of sections and the insulating material. A second set of channels may be etched into the layered assembly of materials along a second direction that creates a second set of sections, where the second set of channels extend through the first and second sacrificial materials. Insulating material may be deposited in the second set of channels and the sacrificial materials removed leaving a cavity. A memory material may be deposited in the cavity.

公开(公告)号：US12176042B2

公开(公告)日：2024-12-24

申请号：US17651218

申请日：2022-02-15

Applicant: Micron Technology, Inc.

Inventor： Agostino Pirovano ,  Fabio Pellizzer ,  Innocenzo Tortorelli

IPC: G11C16/34 ,  G11C16/04 ,  G11C16/08 ,  G11C16/10 ,  G11C16/24 ,  G11C16/26

Abstract: Methods, systems, and devices for techniques for operating a vertical memory architecture are described. A memory device may include memory cells arranged in a three-dimensional vertical memory architecture. Each memory cell may include a storage element (e.g., a chalcogenide material), where a logic state may be programmed at the storage element based on a polarity of an applied voltage that exceeds a threshold voltage. The storage element may be coupled with a selection element and a conductive line. The selection element may be coupled with a bit line decoder and a word line decoder via vertical pillars. The selection element may selectively couple the storage element with the bit line decoder. In some examples, an activation voltage for the selection element may be less than a threshold voltage of the storage element.

公开(公告)号：US12171105B2

公开(公告)日：2024-12-17

申请号：US17165560

申请日：2021-02-02

Applicant: Micron Technology, Inc.

Inventor： Lorenzo Fratin ,  Fabio Pellizzer ,  Paolo Fantini

IPC: H10B63/00 ,  H10N70/00 ,  H10N70/20 ,  G11C13/00

Abstract: Methods, systems, and devices for memory device with a split pillar architecture are described. A memory device may include a substrate arranged with conductive contacts in a pattern and openings through alternative layers of conductive and insulative material that may decrease the spacing between the openings while maintaining a dielectric thickness to sustain the voltage to be applied to the array. After etching material, an insulative material may be deposited in a trench. Portions of the insulative material may be removed to form openings, into which cell material is deposited. Conductive pillars may extend perpendicular to the planes of the conductive material and the substrate, and couple to conductive contacts. The conductive pillars and cell material may be divided to form a first and second storage components and first and second pillars.

公开(公告)号：US12080359B2

公开(公告)日：2024-09-03

申请号：US18189824

申请日：2023-03-24

Applicant: Micron Technology, Inc.

Inventor： Karthik Sarpatwari ,  Fabio Pellizzer ,  Nevil N. Gajera

IPC: G11C7/00 ,  G11C16/10 ,  G11C16/26 ,  G11C16/30 ,  G11C16/34

CPC classification number: G11C16/3404 ,  G11C16/10 ,  G11C16/26 ,  G11C16/30

Abstract: Systems, methods and apparatus to determine a programming mode of a set of memory cells that store an indicator of the programming mode. In response to a command to read the memory cells in a memory device, a first read voltage is applied to the memory cells to identify a first subset of the memory cells that become conductive under the first read voltage. The determination of the first subset is configured as an operation common to different programming modes. Based on whether the first subset of the memory cell includes one or more predefined memory cells, the memory device determines a programming mode of memory cells. Once the programming mode is identified from the common operation, the memory device can further execute the command to determine a data item stored, via the programming mode, in the memory cells.