公开(公告)号：US20230352592A1

公开(公告)日：2023-11-02

申请号：US18338759

申请日：2023-06-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Zhe-Hao Zhang ,  Tung-Wen Cheng ,  Che-Cheng Chang ,  Yung-Jung Chang ,  Chang-Yin Chen

IPC: H01L29/78 ,  H01L29/66 ,  H01L21/762 ,  H01L21/306 ,  H01L29/165 ,  H01L21/8234 ,  H01L29/08 ,  H01L27/088 ,  H01L21/311

CPC classification number: H01L29/7851 ,  H01L29/66795 ,  H01L21/76224 ,  H01L21/30604 ,  H01L29/7848 ,  H01L29/165 ,  H01L21/823481 ,  H01L29/785 ,  H01L29/0847 ,  H01L29/6653 ,  H01L21/823412 ,  H01L21/823431 ,  H01L27/0886 ,  H01L21/31116

Abstract: A fin field effect transistor (FinFET) device structure and method for forming FinFET device structure are provided. The FinFET structure includes a substrate and an isolation structure formed on the substrate. The FinFET structure also includes a fin structure extending above the substrate, and the fin structure is embedded in the isolation structure. The FinFET structure further includes an epitaxial structure formed on the fin structure, the epitaxial structure has a pentagon-like shape, and an interface between the epitaxial structure and the fin structure is lower than a top surface of the isolation structure.

公开(公告)号：US11784185B2

公开(公告)日：2023-10-10

申请号：US17241841

申请日：2021-04-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Che-Cheng Chang ,  Chih-Han Lin ,  Horng-Huei Tseng

IPC: H01L27/088 ,  H01L29/78 ,  H01L21/8234 ,  H01L21/306 ,  H01L29/06 ,  H01L29/08 ,  H01L29/66 ,  H01L21/8238 ,  H01L29/165

CPC classification number: H01L27/0886 ,  H01L21/30608 ,  H01L21/823418 ,  H01L21/823425 ,  H01L21/823431 ,  H01L21/823437 ,  H01L29/0649 ,  H01L29/0847 ,  H01L29/66545 ,  H01L29/66636 ,  H01L29/66795 ,  H01L29/7848 ,  H01L21/823814 ,  H01L21/823821 ,  H01L29/165

Abstract: An embodiment method includes forming first dummy gate stack and a second dummy gate stack over a semiconductor fin. A portion of the semiconductor fin is exposed by an opening between the first dummy gate stack and the second dummy gate stack. The method further includes etching the portion of the semiconductor fin to extend the opening into the semiconductor fin. A material of the semiconductor fin encircles the opening in a top-down view of the semiconductor fin. The method further includes epitaxially growing a source/drain region in the opening on the portion of the semiconductor fin.

公开(公告)号：US11776853B2

公开(公告)日：2023-10-03

申请号：US17646763

申请日：2022-01-03

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hung-Hao Chen ,  Che-Cheng Chang ,  Horng-Huei Tseng ,  Wen-Tung Chen ,  Yu-Cheng Liu

IPC: H01L21/8234 ,  H01L21/02 ,  H01L21/311 ,  H01L21/768 ,  H01L21/027 ,  H01L21/3105 ,  H01L21/8238 ,  H01L23/00 ,  H01L23/525

CPC classification number: H01L21/823431 ,  H01L21/0217 ,  H01L21/02063 ,  H01L21/0273 ,  H01L21/02129 ,  H01L21/02164 ,  H01L21/31058 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/31144 ,  H01L21/76802 ,  H01L21/76814 ,  H01L21/823475 ,  H01L21/02271 ,  H01L21/823481 ,  H01L21/823821 ,  H01L23/525 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05186 ,  H01L2224/05567 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/131 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2224/13147 ,  H01L2924/00014 ,  H01L2224/05624 ,  H01L2924/013 ,  H01L2924/00014 ,  H01L2224/05647 ,  H01L2924/013 ,  H01L2924/00014 ,  H01L2224/05624 ,  H01L2924/013 ,  H01L2924/01029 ,  H01L2924/00014 ,  H01L2224/05647 ,  H01L2924/013 ,  H01L2924/01013 ,  H01L2924/00014 ,  H01L2224/05124 ,  H01L2924/013 ,  H01L2924/00014 ,  H01L2224/05147 ,  H01L2924/013 ,  H01L2924/00014 ,  H01L2224/05124 ,  H01L2924/013 ,  H01L2924/01029 ,  H01L2924/00014 ,  H01L2224/05147 ,  H01L2924/013 ,  H01L2924/01013 ,  H01L2924/00014 ,  H01L2224/05166 ,  H01L2924/013 ,  H01L2924/00014 ,  H01L2224/05186 ,  H01L2924/04941 ,  H01L2924/00014 ,  H01L2224/05147 ,  H01L2924/00014

Abstract: A semiconductor device and method of manufacture are provided in which a passivation layer is patterned. In embodiments, by-products from the patterning process are removed using the same etching chamber and at the same time as the removal of a photoresist utilized in the patterning process. Such processes may be used during the manufacturing of FinFET devices.

公开(公告)号：US11721762B2

公开(公告)日：2023-08-08

申请号：US17099456

申请日：2020-11-16

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Zhe-Hao Zhang ,  Tung-Wen Cheng ,  Che-Cheng Chang ,  Yung-Jung Chang ,  Chang-Yin Chen

IPC: H01L29/78 ,  H01L29/66 ,  H01L21/762 ,  H01L21/306 ,  H01L29/165 ,  H01L21/8234 ,  H01L29/08 ,  H01L27/088 ,  H01L21/311

CPC classification number: H01L29/7851 ,  H01L21/30604 ,  H01L21/31116 ,  H01L21/76224 ,  H01L21/823412 ,  H01L21/823431 ,  H01L21/823481 ,  H01L27/0886 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/6653 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/7848

Abstract: A fin field effect transistor (FinFET) device structure and method for forming FinFET device structure are provided. The FinFET structure includes a substrate and an isolation structure formed on the substrate. The FinFET structure also includes a fin structure extending above the substrate, and the fin structure is embedded in the isolation structure. The FinFET structure further includes an epitaxial structure formed on the fin structure, the epitaxial structure has a pentagon-like shape, and an interface between the epitaxial structure and the fin structure is lower than a top surface of the isolation structure.

公开(公告)号：US11682716B2

公开(公告)日：2023-06-20

申请号：US16902190

申请日：2020-06-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Che-Cheng Chang ,  Jui-Ping Chuang ,  Chen-Hsiang Lu ,  Yu-Cheng Liu ,  Wei-Ting Chen

IPC: H01L29/66 ,  H01L29/78 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/06 ,  H01L29/423 ,  H01L29/08 ,  H01L29/16 ,  H01L29/161 ,  H01L29/165 ,  H01L29/24 ,  H01L29/267 ,  H01L29/49 ,  H01L29/51 ,  H01L21/311 ,  H01L21/762

CPC classification number: H01L29/66795 ,  H01L21/31111 ,  H01L21/76224 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823842 ,  H01L21/823857 ,  H01L21/823878 ,  H01L27/0922 ,  H01L27/0924 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/161 ,  H01L29/165 ,  H01L29/1608 ,  H01L29/24 ,  H01L29/267 ,  H01L29/42372 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/785 ,  H01L29/7848 ,  H01L29/7851

Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a fin structure over a semiconductor substrate. The semiconductor device structure also includes a gate stack covering a portion of the fin structure, and the gate stack includes a work function layer and a metal filling over the work function layer. The semiconductor device structure further includes an isolation element over the semiconductor substrate and adjacent to the gate stack. The isolation element is in direct contact with the work function layer and the metal filling.

公开(公告)号：US11637204B2

公开(公告)日：2023-04-25

申请号：US17113057

申请日：2020-12-06

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Che-Cheng Chang ,  Chih-Han Lin ,  Horng-Huei Tseng

IPC: H01L27/088 ,  H01L29/78 ,  H01L21/02 ,  H01L21/3065 ,  H01L21/3213 ,  H01L21/762 ,  H01L29/06 ,  H01L29/66

Abstract: A device includes a semiconductive substrate, a semiconductive fin, a stop layer, a fin isolation structure, and a spacer. The semiconductive fin is over the substrate. The stop layer is between the semiconductive substrate and the semiconductive fin. The fin isolation structure is in contact with the semiconductor fin and over the stop layer. A topmost surface of the fin isolation structure is higher than a topmost surface of the semiconductive fin. The spacer at least partially extends along a sidewall of the fin isolation structure.

公开(公告)号：US11631748B2

公开(公告)日：2023-04-18

申请号：US17066102

申请日：2020-10-08

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Bo-Feng Young ,  Che-Cheng Chang ,  Mu-Tsang Lin ,  Tung-Wen Cheng ,  Zhe-Hao Zhang

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/49 ,  H01L21/8234

Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a semiconductor substrate and a gate electrode over the semiconductor substrate. The semiconductor device structure also includes a source/drain structure adjacent to the gate electrode. The semiconductor device structure further includes a spacer element over a sidewall of the gate electrode, and the spacer element has an upper portion having a first exterior surface and a lower portion having a second exterior surface. Lateral distances between the first exterior surface and the sidewall of the gate electrode are substantially the same. Lateral distances between the second exterior surface and the sidewall of the gate electrode increase along a direction from a top of the lower portion towards the semiconductor substrate.

公开(公告)号：US20230109951A1

公开(公告)日：2023-04-13

申请号：US18065166

申请日：2022-12-13

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Che-Cheng Chang ,  Chih-Han Lin ,  Horng-Huei Tseng

IPC: H01L29/417 ,  H01L29/78 ,  H01L29/66 ,  H01L21/265 ,  H01L21/324 ,  H01L21/768

Abstract: A semiconductor device and method of manufacture are provided. A source/drain region is formed next to a spacer, which is adjacent to a gate electrode. An implantation is performed through an implantation mask into the source/drain region as well as the first spacer, forming an implantation region within the spacer.

公开(公告)号：US11605564B2

公开(公告)日：2023-03-14

申请号：US17120942

申请日：2020-12-14

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Che-Cheng Chang ,  Chih-Han Lin ,  Jr-Jung Lin

IPC: H01L21/8234 ,  H01L29/66 ,  H01L27/088 ,  H01L29/78

Abstract: A semiconductor device includes a substrate, a fin protruding from the substrate, and a gate stack over the substrate and engaging the fin. The fin having a first end and a second end. The semiconductor device also includes a dielectric layer abutting the first end of the fin and spacer features disposed on sidewalls of the gate stack and on a top surface of the dielectric layer.

公开(公告)号：US11594634B2

公开(公告)日：2023-02-28

申请号：US16948039

申请日：2020-08-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Che-Cheng Chang ,  Chih-Han Lin

IPC: H01L21/8232 ,  H01L29/06 ,  H01L29/66 ,  H01L29/78 ,  H01L21/8234 ,  H01L21/28 ,  H01L21/283 ,  H01L29/423

Abstract: A FinFET device structure and method for forming the same are provided. The FinFET device structure includes a stop layer formed over a substrate and a fin structure formed over the stop layer. The FinFET device structure includes a gate structure formed over the fin structure and a source/drain (S/D) structure adjacent to the gate structure. A bottom surface of the S/D structure is located at a position that is higher than or level with a bottom surface of the stop layer.