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    METHOD OF POWER AMPLIFIER CALIBRATION
    243.
    发明申请
    METHOD OF POWER AMPLIFIER CALIBRATION 有权
    功率放大器校准方法

    公开(公告)号：US20150002220A1

    公开(公告)日：2015-01-01

    申请号：US14487352

    申请日：2014-09-16

    Applicant: RF Micro Devices, Inc.

    Inventor： Alexander Wayne Hietala ,  Timothy E. Daughters

    IPC: H03F1/02 ,  H03F3/24 ,  H03F3/19

    CPC classification number: H03F1/0233 ,  H03F1/0222 ,  H03F1/32 ,  H03F3/19 ,  H03F3/24 ,  H03F3/245 ,  H03F2200/451 ,  H03F2200/465

    Abstract: The exemplary embodiments include methods, computer readable media, and devices for calibrating a non-linear power detector of a radio frequency device based upon measurements of the non-linear power detector output and the associated power amplifier output level, and a set of data points that characterize a nominal non-linear power detector. The set of data points that characterize the nominal non-linear power detector is stored in a calibration system memory as nominal power detector output data. The measured non-linear power detector outputs, power amplifier output levels, and the nominal power detector output data is used to determine a power detector error function that characterizes the difference between the response of the non-linear power detector and the nominal non-linear power detector. The power detector error function and the nominal power detector output data are used to develop a calibrated power detector output data set that is stored in the non-linear power detector.

    Abstract translation: 示例性实施例包括基于非线性功率检测器输出和相关联的功率放大器输出电平的测量以及一组数据点的方法，计算机可读介质和用于校准射频设备的非线性功率检测器的设备 其特征在于标称非线性功率检测器。 表征标称非线性功率检测器的数据点集合作为标称功率检测器输出数据存储在校准系统存储器中。 测量的非线性功率检测器输出，功率放大器输出电平和额定功率检测器输出数据用于确定功率检测器误差函数，其表征非线性功率检测器的响应与标称非线性 功率检测器 功率检测器误差函数和标称功率检测器输出数据用于开发存储在非线性功率检测器中的校准功率检测器输出数据组。

    HIGH QUALITY FACTOR INTERCONNECT FOR RF CIRCUITS
    245.
    发明申请
    HIGH QUALITY FACTOR INTERCONNECT FOR RF CIRCUITS 有权
    射频电路的高质量因数互连

    公开(公告)号：US20140361856A1

    公开(公告)日：2014-12-11

    申请号：US14298834

    申请日：2014-06-06

    Applicant: RF Micro Devices, Inc.

    Inventor： Dirk Robert Walter Leipold ,  Baker Scott ,  George Maxim

    IPC: H03H11/04

    CPC classification number: H03H7/465 ,  H03F1/565 ,  H03F3/193 ,  H03F3/245 ,  H03F3/68 ,  H03F3/72 ,  H03F2200/111 ,  H03F2200/267 ,  H03F2200/451 ,  H03F2203/7209 ,  H03H7/0115 ,  H03H7/0153 ,  H03H7/09 ,  H03H7/1775 ,  H03H7/46 ,  H03H7/463 ,  H03H2210/012 ,  H03H2210/025 ,  H03H2210/04 ,  H04B1/1027 ,  H04B1/18

    Abstract: Embodiments of radio frequency (RF) devices are disclosed having interconnection paths with capacitive structures having improved quality (Q) factors. In one embodiment, an RF device includes an inductor having an inductor terminal and a semiconductor die. The semiconductor die includes one or more active semiconductor devices that include a device contact. The device contact provided by the one or more active semiconductor devices is positioned so as to be vertically aligned directly below the inductor terminal. The inductor terminal and the device contact are electrically connected with an interconnection path that includes a capacitive structure. To prevent or reduce current crowding, the interconnection path is vertically aligned so as to extend directly between the inductor terminal and the device contact. In this manner, the interconnection path electrically connects the inductor terminal and the device contact without degrading the Q factor of the RF device.

    Abstract translation: 公开了射频（RF）装置的实施例，其具有具有改进的质量（Q）因素的电容结构的互连路径。 在一个实施例中，RF器件包括具有电感器端子和半导体管芯的电感器。 半导体管芯包括一个或多个包括器件接触的有源半导体器件。 由一个或多个有源半导体器件提供的器件触点被定位成在电感器端子的正下方垂直对齐。 电感器端子和器件触点与包括电容结构的互连路径电连接。 为了防止或减少电流拥挤，互连线路垂直对准，以便直接在电感器端子和器件触点之间延伸。 以这种方式，互连路径将电感器端子和器件接触电连接，而不降低RF器件的Q因子。

    TECHNIQUE TO REDUCE THE THIRD HARMONIC OF AN ON-STATE RF SWITCH
    246.
    发明申请
    TECHNIQUE TO REDUCE THE THIRD HARMONIC OF AN ON-STATE RF SWITCH 有权
    降低状态RF开关的第三谐波的技术

    公开(公告)号：US20140335801A1

    公开(公告)日：2014-11-13

    申请号：US14271921

    申请日：2014-05-07

    Applicant: RF Micro Devices, Inc.

    Inventor： Eric K. Bolton ,  Daniel Charles Kerr ,  Marcus Granger-Jones

    IPC: H04B1/44

    CPC classification number: H04B15/02

    Abstract: RF switching circuitry includes an RF switch coupled between an input node and an output node. Distortion compensation circuitry is coupled in parallel with the RF switch between the input node and the output node. The RF switch is configured to selectively pass an RF signal from the input node to the output node based on a first switching control signal. The distortion compensation circuitry is configured to boost a portion of the RF signal that is being compressed by the RF switch when the amplitude of the RF signal is above a predetermined threshold by selectively injecting current into one of the input node or the output node. Boosting a portion of the RF signal that is being compressed by the RF switch allows a signal passing through the RF switch to remain substantially linear, thereby improving the performance of the RF switching circuitry.

    Abstract translation: RF切换电路包括耦合在输入节点和输出节点之间的RF开关。 失真补偿电路与输入节点和输出节点之间的RF开关并联耦合。 RF开关被配置为基于第一开关控制信号选择性地将RF信号从输入节点传递到输出节点。 失真补偿电路被配置为通过选择性地将电流注入到输入节点或输出节点之一时，通过RF信号的幅度高于预定阈值来升高被RF开关压缩的RF信号的一部分。 升高由RF开关压缩的RF信号的一部分允许通过RF开关的信号保持基本上线性，从而提高RF开关电路的性能。

    TUNABLE FILTER FOR LTE BANDS
    247.
    发明申请
    TUNABLE FILTER FOR LTE BANDS 有权
    LTE BANDS的TUNABLE过滤器

    公开(公告)号：US20140307836A1

    公开(公告)日：2014-10-16

    申请号：US14230620

    申请日：2014-03-31

    Applicant: RF Micro Devices, Inc.

    Inventor： Nadim Khlat

    IPC: H04B1/10 ,  H04L5/14

    CPC classification number: H04L5/1461 ,  H04B1/006 ,  H04B1/0064 ,  H04B1/1027 ,  H04B2001/1072 ,  H04L5/08 ,  H04L5/14

    Abstract: A tunable filter reduces the total number of filters used in TDD (Time-Division Duplex) communication circuitry. The communication circuitry may include a tunable filter and a first switch associated with the tunable filter. The tunable filter may include a tuning component and a filtering component. The tuning component may be located with the first switch on a first die. The filtering component may be located in a laminate underneath the first switch. Power amplifiers for amplifying transmission signals may be located on a second die, and the second die may be located on the laminate.

    Abstract translation: 可调滤波器减少了TDD（时分双工）通信电路中使用的滤波器总数。 通信电路可以包括可调谐滤波器和与可调谐滤波器相关联的第一开关。 可调谐滤波器可以包括调谐部件和滤波部件。 调谐部件可以与第一开关位于第一管芯上。 过滤部件可以位于第一开关下方的层压板中。 用于放大传输信号的功率放大器可以位于第二模具上，并且第二模具可以位于层压板上。

    HIGH Q FACTOR INDUCTOR STRUCTURE
    248.
    发明申请
    HIGH Q FACTOR INDUCTOR STRUCTURE 有权
    高Q因子电感结构

    公开(公告)号：US20140266544A1

    公开(公告)日：2014-09-18

    申请号：US14099007

    申请日：2013-12-06

    Applicant: RF Micro Devices, Inc.

    Inventor： Dirk Robert Walter Leipold ,  Danny W. Chang ,  George Maxim

    IPC: H01F5/00

    CPC classification number: H01F5/003 ,  H01F17/0013 ,  H01F2017/002 ,  H01F2017/0073

    Abstract: The present disclosure provides a vertical inductor structure in which the magnetic field is closed such that the magnetic field of the vertical inductor structure is cancelled in the design direction outside the vertical inductor structure, yielding a small, or substantially zero, coupling factor of the vertical inductor structure. In one embodiment, several vertical inductor structures of the present disclosure can be placed in close proximity to create small resonant circuits and filter chains.

    Abstract translation: 本公开提供了垂直电感器结构，其中磁场被闭合，使得垂直电感器结构的磁场在垂直电感器结构外部的设计方向上消除，产生垂直的垂直电感器结构的小的或基本为零的耦合因子 电感结构。 在一个实施例中，本公开的几个垂直电感器结构可以紧邻地设置，以产生小的谐振电路和滤波器链。

    PATTERNED SILICON-ON-PLASTIC (SOP) TECHNOLOGY AND METHODS OF MANUFACTURING THE SAME
    249.
    发明申请
    PATTERNED SILICON-ON-PLASTIC (SOP) TECHNOLOGY AND METHODS OF MANUFACTURING THE SAME 有权
    图形硅胶（SOP）技术及其制造方法

    公开(公告)号：US20140252567A1

    公开(公告)日：2014-09-11

    申请号：US14261029

    申请日：2014-04-24

    Applicant: RF Micro Devices, Inc.

    Inventor： Michael Carroll ,  Julio Costa ,  Daniel Charles Kerr ,  Don Willis ,  Elizabeth Glass

    IPC: H01L29/02 ,  H01L21/02

    CPC classification number: H01L21/0237 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/293 ,  H01L23/3107 ,  H01L23/36 ,  H01L23/3737 ,  H01L23/485 ,  H01L29/0657 ,  H01L29/78606 ,  H01L2221/68318 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68381 ,  H01L2224/13

    Abstract: A semiconductor device and methods for manufacturing the same are disclosed. The semiconductor device includes a semiconductor stack structure attached to a wafer handle having at least one aperture that extends through the wafer handle to an exposed portion of the semiconductor stack structure. A thermally conductive and electrically resistive polymer substantially fills the at least one aperture and contacts the exposed portion of the semiconductor stack structure. One method for manufacturing the semiconductor device includes forming patterned apertures in the wafer handle to expose a portion of the semiconductor stack structure. The patterned apertures may or may not be aligned with sections of RF circuitry making up the semiconductor stack structure. A following step includes contacting the exposed portion of the semiconductor stack structure with a polymer and substantially filling the patterned apertures with the polymer, wherein the polymer is thermally conductive and electrically resistive.

    Abstract translation: 公开了一种半导体器件及其制造方法。 半导体器件包括附接到晶片把手的半导体堆叠结构，其具有至少一个孔，其延伸穿过晶片把手到达半导体堆叠结构的暴露部分。 导热和电阻聚合物基本上填充至少一个孔并接触半导体堆叠结构的暴露部分。 用于制造半导体器件的一种方法包括在晶片手柄中形成图案化孔以暴露半导体堆叠结构的一部分。 图案化的孔可以或可以不与构成半导体堆叠结构的RF电路的部分对准。 接下来的步骤包括使半导体堆叠结构的暴露部分与聚合物接触，并且用聚合物基本上填充图案化的孔，其中聚合物是导热的并具有电阻性。

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