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    THROUGH SILICON VIA (TSV) ISOLATION STRUCTURES FOR NOISE REDUCTION IN 3D INTEGRATED CIRCUIT
    21.
    发明申请
    THROUGH SILICON VIA (TSV) ISOLATION STRUCTURES FOR NOISE REDUCTION IN 3D INTEGRATED CIRCUIT 审中-公开
    通过硅（TSV）隔离结构减少3D集成电路中的噪声

    公开(公告)号：US20140008817A1

    公开(公告)日：2014-01-09

    申请号：US14024925

    申请日：2013-09-12

    Applicant: Jaw-Juinn HORNG ,  Chia-Lin Yu ,  Chung-Hui Chen ,  Der-Chyang Yeh ,  Yung-Chow Peng

    Inventor： Jaw-Juinn HORNG ,  Chia-Lin Yu ,  Chung-Hui Chen ,  Der-Chyang Yeh ,  Yung-Chow Peng

    IPC: H01L23/48

    CPC classification number: H01L23/481 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: Through silicon via (TSV) isolation structures are provided and suppress electrical noise such as may be propagated through a semiconductor substrate when caused by a signal carrying active TSV such as used in 3D integrated circuit packaging. The isolation TSV structures are surrounded by an oxide liner and surrounding dopant impurity regions. The surrounding dopant impurity regions may be P-type dopant impurity regions that are coupled to ground or N-type dopant impurity regions that may advantageously be coupled to VDD. The TSV isolation structure is advantageously disposed between an active, signal carrying TSV and active semiconductor devices and the TSV isolation structures may be formed in an array that isolates an active, signal carrying TSV structure from active semiconductor devices.

    Abstract translation: 提供通过硅通孔（TSV）隔离结构，并且抑制诸如在由3D集成电路封装中使用的携带有源TSV的信号引起的时候可能通过半导体衬底传播的电噪声。 隔离TSV结构被氧化物衬垫和周围的掺杂剂杂质区包围。 周围的掺杂剂杂质区域可以是耦合到接地的P型掺杂剂杂质区域或者可以有利地连接到VDD的N型掺杂剂杂质区域。 TSV隔离结构有利地设置在有源信号承载TSV和有源半导体器件之间，并且TSV隔离结构可以形成为将有源信号传输TSV结构与有源半导体器件隔离的阵列。

    III-V compound semiconductor epitaxy from a non-III-V substrate
    22.
    发明授权
    III-V compound semiconductor epitaxy from a non-III-V substrate 有权
    III-V族化合物半导体外延从非III-V衬底

    公开(公告)号：US08377796B2

    公开(公告)日：2013-02-19

    申请号：US12539374

    申请日：2009-08-11

    Applicant: Chia-Lin Yu ,  Chen-Hua Yu ,  Ding-Yuan Chen ,  Wen-Chih Chiou

    Inventor： Chia-Lin Yu ,  Chen-Hua Yu ,  Ding-Yuan Chen ,  Wen-Chih Chiou

    IPC: H01L21/768

    CPC classification number: H01L21/02365 ,  H01L21/02104 ,  H01L21/0237 ,  H01L21/02381 ,  H01L21/02458 ,  H01L21/02491 ,  H01L21/02502 ,  H01L21/02538 ,  H01L21/02639 ,  H01L21/02642 ,  H01L21/02645 ,  H01L29/12

    Abstract: A method of forming a circuit structure includes providing a substrate; forming recesses in the substrate; forming a mask layer over the substrate, wherein the mask layer covers non-recessed portions of the substrate, with the recesses exposed through openings in the mask layer; forming a buffer/nucleation layer on exposed portions of the substrate in the recesses; and growing a group-III group-V (III-V) compound semiconductor material from the recesses until portions of the III-V compound semiconductor material grown from the recesses join each other to form a continuous III-V compound semiconductor layer.

    Abstract translation: 形成电路结构的方法包括提供基板; 在基板上形成凹部; 在所述基板上形成掩模层，其中所述掩模层覆盖所述基板的非凹部，所述凹部通过所述掩模层中的开口暴露; 在所述凹部中的所述基板的暴露部分上形成缓冲/成核层; 以及从所述凹部生长第III族V族化合物半导体材料，直到从所述凹部生长的所述III-V族化合物半导体材料的部分相互连接形成连续的III-V族化合物半导体层。

    Light-emitting diodes on concave texture substrate
    25.
    发明授权
    Light-emitting diodes on concave texture substrate 有权
    凹面纹理基板上的发光二极管

    公开(公告)号：US08134163B2

    公开(公告)日：2012-03-13

    申请号：US12247895

    申请日：2008-10-08

    Applicant: Chen-Hua Yu ,  Hung-Ta Lin ,  Wen-Chih Chiou ,  Ding-Yuan Chen ,  Chia-Lin Yu

    Inventor： Chen-Hua Yu ,  Hung-Ta Lin ,  Wen-Chih Chiou ,  Ding-Yuan Chen ,  Chia-Lin Yu

    IPC: H01L33/08

    CPC classification number: H01L33/48 ,  H01L33/20 ,  H01L33/24

    Abstract: A semiconductor device having light-emitting diodes (LEDs) formed on a concave textured substrate is provided. A substrate is patterned and etched to form recesses. A separation layer is formed along the bottom of the recesses. An LED structure is formed along the sidewalls and, optionally, along the surface of the substrate between adjacent recesses. In these embodiments, the surface area of the LED structure is increased as compared to a planar surface. In another embodiment, the LED structure is formed within the recesses such that the bottom contact layer is non-conformal to the topology of the recesses. In these embodiments, the recesses in a silicon substrate result in a cubic structure in the bottom contact layer, such as an n-GaN layer, which has a non-polar characteristic and exhibits higher external quantum efficiency.

    Abstract translation: 提供了一种形成在凹面纹理基板上的发光二极管（LED）的半导体器件。 对衬底进行图案化和蚀刻以形成凹陷。 沿着凹部的底部形成分离层。 沿着侧壁和任选地沿着相邻凹部之间的基板的表面形成LED结构。 在这些实施例中，与平面表面相比，LED结构的表面积增加。 在另一个实施例中，LED结构形成在凹部内，使得底部接触层与凹部的拓扑不一致。 在这些实施例中，硅衬底中的凹陷导致底接触层中的立方结构，例如具有非极性特性并且表现出更高外部量子效率的n-GaN层。

    III-V Compound Semiconductor Epitaxy From a Non-III-V Substrate
    26.
    发明申请
    III-V Compound Semiconductor Epitaxy From a Non-III-V Substrate 有权
    III-V族化合物半导体外延从非III-V基片

    公开(公告)号：US20100068866A1

    公开(公告)日：2010-03-18

    申请号：US12539374

    申请日：2009-08-11

    Applicant: Chia-Lin Yu ,  Chen-Hua Yu ,  Ding-Yuan Chen ,  Wen-Chih Chiou

    Inventor： Chia-Lin Yu ,  Chen-Hua Yu ,  Ding-Yuan Chen ,  Wen-Chih Chiou

    IPC: H01L21/768

    CPC classification number: H01L21/02365 ,  H01L21/02104 ,  H01L21/0237 ,  H01L21/02381 ,  H01L21/02458 ,  H01L21/02491 ,  H01L21/02502 ,  H01L21/02538 ,  H01L21/02639 ,  H01L21/02642 ,  H01L21/02645 ,  H01L29/12

    Abstract: A method of forming a circuit structure includes providing a substrate; forming recesses in the substrate; forming a mask layer over the substrate, wherein the mask layer covers non-recessed portions of the substrate, with the recesses exposed through openings in the mask layer; forming a buffer/nucleation layer on exposed portions of the substrate in the recesses; and growing a group-III group-V (III-V) compound semiconductor material from the recesses until portions of the III-V compound semiconductor material grown from the recesses join each other to form a continuous III-V compound semiconductor layer.

    Abstract translation: 形成电路结构的方法包括提供基板; 在基板上形成凹部; 在所述基板上形成掩模层，其中所述掩模层覆盖所述基板的非凹部，所述凹部通过所述掩模层中的开口暴露; 在所述凹部中的所述基板的暴露部分上形成缓冲/成核层; 以及从所述凹部生长第III族V族化合物半导体材料，直到从所述凹部生长的所述III-V族化合物半导体材料的部分相互连接形成连续的III-V族化合物半导体层。

    Light-emitting diode with textured substrate
    28.
    发明授权
    Light-emitting diode with textured substrate 有权
    具纹理衬底的发光二极管

    公开(公告)号：US08659033B2

    公开(公告)日：2014-02-25

    申请号：US13267701

    申请日：2011-10-06

    Applicant: Chen-Hua Yu ,  Wen-Chih Chiou ,  Ding-Yuan Chen ,  Chia-Lin Yu ,  Hung-Ta Lin

    Inventor： Chen-Hua Yu ,  Wen-Chih Chiou ,  Ding-Yuan Chen ,  Chia-Lin Yu ,  Hung-Ta Lin

    IPC: H01L27/15 ,  H01L29/26 ,  H01L31/12 ,  H01L33/00

    CPC classification number: H01L33/22 ,  H01L33/007 ,  H01L33/0075 ,  H01L33/06 ,  H01L33/24 ,  H01L33/32

    Abstract: A light-emitting diode (LED) device is provided. The LED device has raised semiconductor regions formed on a substrate. LED structures are formed over the raised semiconductor regions such that bottom contact layers and active layers of the LED device are conformal layers. The top contact layer has a planar surface. In an embodiment, the top contact layers are continuous over a plurality of the raised semiconductor regions while the bottom contact layers and the active layers are discontinuous between adjacent raised semiconductor regions.

    Abstract translation: 提供了一种发光二极管（LED）装置。 LED装置已经凸起形成在基板上的半导体区域。 在凸起的半导体区域上形成LED结构，使得LED器件的底部接触层和有源层是保形层。 顶部接触层具有平坦的表面。 在一个实施例中，顶部接触层在多个凸起的半导体区域上是连续的，而底部接触层和有源层在相邻凸起的半导体区域之间是不连续的。

    THROUGH SILICON VIA (TSV) ISOLATION STRUCTURES FOR NOISE REDUCTION IN 3D INTEGRATED CIRCUIT
    29.
    发明申请
    THROUGH SILICON VIA (TSV) ISOLATION STRUCTURES FOR NOISE REDUCTION IN 3D INTEGRATED CIRCUIT 有权
    通过硅（TSV）隔离结构减少3D集成电路中的噪声

    公开(公告)号：US20130147057A1

    公开(公告)日：2013-06-13

    申请号：US13324405

    申请日：2011-12-13

    Applicant: Jaw-Juinn HORNG ,  Chia-Lin YU ,  Chung-Hui CHEN ,  Der-Chyang YEH ,  Yung-Chow PENG

    Inventor： Jaw-Juinn HORNG ,  Chia-Lin YU ,  Chung-Hui CHEN ,  Der-Chyang YEH ,  Yung-Chow PENG

    IPC: H01L23/48 ,  H01L21/768

    CPC classification number: H01L23/481 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: Through silicon via (TSV) isolation structures are provided and suppress electrical noise such as may be propagated through a semiconductor substrate when caused by a signal carrying active TSV such as used in 3D integrated circuit packaging. The isolation TSV structures are surrounded by an oxide liner and surrounding dopant impurity regions. The surrounding dopant impurity regions may be P-type dopant impurity regions that are coupled to ground or N-type dopant impurity regions that may advantageously be coupled to VDD. The TSV isolation structure is advantageously disposed between an active, signal carrying TSV and active semiconductor devices and the TSV isolation structures may be formed in an array that isolates an active, signal carrying TSV structure from active semiconductor devices.

    Abstract translation: 提供通过硅通孔（TSV）隔离结构，并且抑制诸如在由3D集成电路封装中使用的携带有源TSV的信号引起的时候可能传播通过半导体衬底的电噪声。 隔离TSV结构被氧化物衬垫和周围的掺杂剂杂质区包围。 周围的掺杂剂杂质区域可以是耦合到接地的P型掺杂剂杂质区域或者可以有利地连接到VDD的N型掺杂剂杂质区域。 TSV隔离结构有利地设置在有源信号承载TSV和有源半导体器件之间，并且TSV隔离结构可以形成为将有源信号传输TSV结构与有源半导体器件隔离的阵列。

    Light-Emitting Diodes on Concave Texture Substrate
    30.
    发明申请
    Light-Emitting Diodes on Concave Texture Substrate 有权
    凹面纹理基板上的发光二极管

    公开(公告)号：US20120119236A1

    公开(公告)日：2012-05-17

    申请号：US13358327

    申请日：2012-01-25

    Applicant: Chen-Hua Yu ,  Hung-Ta Lin ,  Wen-Chih Chiou ,  Ding-Yuan Chen ,  Chia-Lin Yu

    Inventor： Chen-Hua Yu ,  Hung-Ta Lin ,  Wen-Chih Chiou ,  Ding-Yuan Chen ,  Chia-Lin Yu

    IPC: H01L27/15 ,  H01L33/48

    CPC classification number: H01L33/48 ,  H01L33/20 ,  H01L33/24

    Abstract: A semiconductor device having light-emitting diodes (LEDs) formed on a concave textured substrate is provided. A substrate is patterned and etched to form recesses. A separation layer is formed along the bottom of the recesses. An LED structure is formed along the sidewalls and, optionally, along the surface of the substrate between adjacent recesses. In these embodiments, the surface area of the LED structure is increased as compared to a planar surface. In another embodiment, the LED structure is formed within the recesses such that the bottom contact layer is non-conformal to the topology of the recesses. In these embodiments, the recesses in a silicon substrate result in a cubic structure in the bottom contact layer, such as an n-GaN layer, which has a non-polar characteristic and exhibits higher external quantum efficiency.

    Abstract translation: 提供了一种形成在凹面纹理基板上的发光二极管（LED）的半导体器件。 对衬底进行图案化和蚀刻以形成凹陷。 沿着凹部的底部形成分离层。 沿着侧壁和任选地沿着相邻凹部之间的基板的表面形成LED结构。 在这些实施例中，与平面表面相比，LED结构的表面积增加。 在另一个实施例中，LED结构形成在凹部内，使得底部接触层与凹部的拓扑不一致。 在这些实施例中，硅衬底中的凹陷导致底接触层中的立方结构，例如具有非极性特性并且表现出更高外部量子效率的n-GaN层。

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