公开(公告)号：US07799699B2

公开(公告)日：2010-09-21

申请号：US11421654

申请日：2006-06-01

Applicant: Ralph G. Nuzzo ,  John A. Rogers ,  Etienne Menard ,  Keon Jae Lee ,  Dahl-Young Khang ,  Yugang Sun ,  Matthew Meitl ,  Zhengtao Zhu ,  Heung Cho Ko ,  Shawn Mack

Inventor： Ralph G. Nuzzo ,  John A. Rogers ,  Etienne Menard ,  Keon Jae Lee ,  Dahl-Young Khang ,  Yugang Sun ,  Matthew Meitl ,  Zhengtao Zhu ,  Heung Cho Ko ,  Shawn Mack

IPC: H01L21/31 ,  C23F1/00 ,  B65C11/02

CPC classification number: H01L29/72 ,  B81C2201/0185 ,  B82Y10/00 ,  H01L21/02628 ,  H01L21/30 ,  H01L21/3083 ,  H01L21/31612 ,  H01L27/1285 ,  H01L27/1292 ,  H01L29/045 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/068 ,  H01L29/1606 ,  H01L29/66265 ,  H01L29/66462 ,  H01L29/7781 ,  H01L29/78603 ,  H01L29/78681 ,  H01L29/78684 ,  H01L29/78696 ,  H01L31/0392 ,  H01L31/03925 ,  H01L31/03926 ,  H01L31/18 ,  H01L31/1804 ,  H01L2924/0002 ,  H01L2924/12041 ,  H01L2924/13091 ,  Y02E10/547 ,  Y02P70/521 ,  H01L2924/00

Abstract: The present invention provides a high yield pathway for the fabrication, transfer and assembly of high quality printable semiconductor elements having selected physical dimensions, shapes, compositions and spatial orientations. The compositions and methods of the present invention provide high precision registered transfer and integration of arrays of microsized and/or nanosized semiconductor structures onto substrates, including large area substrates and/or flexible substrates. In addition, the present invention provides methods of making printable semiconductor elements from low cost bulk materials, such as bulk silicon wafers, and smart-materials processing strategies that enable a versatile and commercially attractive printing-based fabrication platform for making a broad range of functional semiconductor devices.

Abstract translation: 本发明提供了用于制造，传输和组装具有选定的物理尺寸，形状，组成和空间取向的高质量可印刷半导体元件的高产率路径。 本发明的组合物和方法提供了高精度的记录转印和将微尺寸和/或纳米半导体结构的阵列集成到包括大面积衬底和/或柔性衬底的衬底上。 此外，本发明提供了从诸如散装硅晶片的低成本散装材料制造可印刷的半导体元件的方法，以及能够实现通用和商业上有吸引力的基于印刷的制造平台的智能材料处理策略，以制造广泛的功能性 半导体器件。

公开(公告)号：US20090199960A1

公开(公告)日：2009-08-13

申请号：US11423192

申请日：2006-06-09

Applicant: Ralph G. Nuzzo ,  John A. Rogers ,  Etienne Menard ,  Keon Jae Lee ,  Dahl-Young Khang ,  Yugang Sun ,  Matthew Meitl ,  Zhengtao Zhu

Inventor： Ralph G. Nuzzo ,  John A. Rogers ,  Etienne Menard ,  Keon Jae Lee ,  Dahl-Young Khang ,  Yugang Sun ,  Matthew Meitl ,  Zhengtao Zhu

IPC: H01L21/02

CPC classification number: H01L29/0665 ,  B82Y10/00 ,  B82Y20/00 ,  H01L29/0673 ,  H01L29/1606 ,  H01L29/78603 ,  H01L31/035281 ,  H01L31/0392 ,  H01L31/03925 ,  H01L31/072 ,  H01L31/109 ,  H01L31/18 ,  H01L31/1804 ,  H01L31/1892 ,  H01L2924/12041 ,  H01L2924/13091 ,  Y02E10/547 ,  Y02P70/521 ,  H01L2924/00

Abstract: The present invention provides methods, systems and system components for transferring, assembling and integrating features and arrays of features having selected nanosized and/or microsized physical dimensions, shapes and spatial orientations. Methods of the present invention utilize principles of ‘soft adhesion’ to guide the transfer, assembly and/or integration of features, such as printable semiconductor elements or other components of electronic devices. Methods of the present invention are useful for transferring features from a donor substrate to the transfer surface of an elastomeric transfer device and, optionally, from the transfer surface of an elastomeric transfer device to the receiving surface of a receiving substrate. The present methods and systems provide highly efficient, registered transfer of features and arrays of features, such as printable semiconductor element, in a concerted manner that maintains the relative spatial orientations of transferred features.

Abstract translation: 本发明提供用于传送，组装和集成特征的阵列的方法，系统和系统组件，其具有所选择的纳米尺寸和/或微尺寸的物理尺寸，形状和空间取向。 本发明的方法利用“软粘附”的原理来引导诸如可印刷半导体元件或电子器件的其它部件的特征的转移，组装和/或集成。 本发明的方法可用于将特征从供体基底转移到弹性体转移装置的转移表面，并且可选地从弹性体转移装置的转移表面转移到接收基底的接收表面。 本方法和系统以一致的方式提供特征和特征阵列的高效，注册传输，例如可印刷半导体元件，其保持所传送特征的相对空间取向。

公开(公告)号：US08808860B2

公开(公告)日：2014-08-19

申请号：US13322385

申请日：2010-09-20

Applicant: Sang Ouk Kim ,  Won Jong Lee ,  Duck Hyun Lee ,  Tae Hee Han ,  Ji Eun Kim ,  Jin Ah Lee ,  Keon Jae Lee

Inventor： Sang Ouk Kim ,  Won Jong Lee ,  Duck Hyun Lee ,  Tae Hee Han ,  Ji Eun Kim ,  Jin Ah Lee ,  Keon Jae Lee

IPC: B32B9/00

CPC classification number: H01L29/0665 ,  B82Y10/00 ,  B82Y40/00 ,  H01J1/304 ,  H01J9/025 ,  H01L51/0048 ,  Y10T428/25 ,  Y10T428/30

Abstract: The present invention relates to a 3-dimensional nanostructure having nanomaterials stacked on a graphene substrate; and more specifically, to a 3-dimensional nanostructure having at least one nanomaterial selected from nanotubes, nanowires, nanorods, nanoneedles and nanoparticles grown on a reduced graphene substrate. The present invention enables the achievement of a synergy effect of the 3-dimensional nanostructure hybridizing 1-dimensional nanomaterials and 2-dimensional graphene. The nanostructure according to the present invention is excellent in flexibility and elasticity, and can easily be transferred to any substrate having a non-planar surface. Also, all junctions in nanomaterials, a metal catalyst and a graphene film system form the ohmic electrical contact, which allows the nanostructure to easily be incorporated into a field-emitting device.

Abstract translation: 本发明涉及一种具有层叠在石墨烯衬底上的纳米材料的三维纳米结构; 更具体地说，涉及一种具有至少一种纳米材料的纳米结构的纳米结构，所述纳米材料选自在还原的石墨烯衬底上生长的纳米管，纳米线，纳米针和纳米线。 本发明能够实现3维纳米结构与1维纳米材料和2维石墨烯杂交的协同作用。 本发明的纳米结构体的柔软性和弹性优异，可以容易地转移到具有非平面的任何基材。 而且，纳米材料中的所有结，金属催化剂和石墨烯膜系统形成欧姆电接触，这允许纳米结构容易地结合到场发射器件中。

公开(公告)号：US08803406B2

公开(公告)日：2014-08-12

申请号：US13307870

申请日：2011-11-30

Applicant: Keon Jae Lee ,  Kwi-Il Park ,  Do Kyung Kim ,  Sang Ouk Kim ,  Geon-Tae Hwang

Inventor： Keon Jae Lee ,  Kwi-Il Park ,  Do Kyung Kim ,  Sang Ouk Kim ,  Geon-Tae Hwang

IPC: H01L41/113 ,  H01L41/18

CPC classification number: H01L41/37 ,  B82Y30/00 ,  H01L41/113 ,  H01L41/183

Abstract: There are provided a flexible nanocomposite generator and a method of manufacturing the same. A flexible nanocomposite generator according to the present invention includes a piezoelectric layer formed of a flexible matrix containing piezoelectric nanoparticles and carbon nanostructures; and electrode layers disposed on the upper and lower surfaces of both sides of the piezoelectric layer, in which according to a method for manufacturing a flexible nanocomposite generator according to the present invention and a flexible nanogenerator, it is possible to manufacture a flexible nanogenerator with a large area and a small thickness. Therefore, the nanogenerator may be used as a portion of a fiber or cloth. Accordingly, the nanogenerator according to the present invention generates power in accordance with bending of attached cloth, such that it is possible to continuously generate power in accordance with movement of a human body.

Abstract translation: 提供了一种柔性纳米复合发生器及其制造方法。 根据本发明的柔性纳米复合发生器包括由含有压电纳米颗粒和碳纳米结构的柔性基体形成的压电层; 以及设置在压电体层的两侧的上表面和下表面上的电极层，其中根据本发明的柔性纳米复合材料发生器的制造方法和柔性纳米发生器，可以制造具有 面积大，厚度小。 因此，纳米发生器可以用作纤维或布的一部分。 因此，根据本发明的纳米发生器根据附着的布的弯曲产生动力，使得可以根据人体的运动连续发电。

公开(公告)号：US08661634B2

公开(公告)日：2014-03-04

申请号：US12730907

申请日：2010-03-24

Applicant: Keon Jae Lee ,  Suk Joong L. Kang ,  Jaemyung Chang ,  Kwi-il Park ,  Seungjun Kim ,  Sang Yong Lee

Inventor： Keon Jae Lee ,  Suk Joong L. Kang ,  Jaemyung Chang ,  Kwi-il Park ,  Seungjun Kim ,  Sang Yong Lee

IPC: H01L41/22 ,  H01L41/053

CPC classification number: H01L27/20 ,  H01L41/1871 ,  H01L41/257 ,  H01L41/312 ,  H01L41/318

Abstract: A method of manufacturing a flexible piezoelectric device including laminating a first metal layer on a silicon oxide layer on a silicon substrate. The method further includes laminating a device on the first metal layer and annealing the first metal layer to oxidize the first metal into a first metal oxide. The method further includes etching the first metal oxide to separate the device from the silicon oxide layer and transferring the separated device to a flexible substrate using a transfer layer. The metal oxide layer laminated on the silicon substrate is etched to separate the device from the substrate. As a result, physical damage of the silicon substrate is prevented and a cost of using expensive single-crystal silicon substrate is reduced.

Abstract translation: 一种制造柔性压电器件的方法，包括在硅衬底上的氧化硅层上层叠第一金属层。 该方法还包括在第一金属层上层叠器件并退火第一金属层以将第一金属氧化成第一金属氧化物。 该方法还包括蚀刻第一金属氧化物以将器件与氧化硅层分离，并使用转移层将分离的器件转移到柔性衬底。 蚀刻层叠在硅衬底上的金属氧化物层，以使器件与衬底分离。 结果，防止了硅衬底的物理损坏，并且降低了使用昂贵的单晶硅衬底的成本。

公开(公告)号：US08482041B2

公开(公告)日：2013-07-09

申请号：US13412959

申请日：2012-03-06

Applicant: Fujio Masuoka ,  Keon Jae Lee

Inventor： Fujio Masuoka ,  Keon Jae Lee

IPC: H01L29/78

CPC classification number: H01L29/7827 ,  H01L21/823807 ,  H01L21/823828 ,  H01L21/823885 ,  H01L27/0922 ,  H01L29/045 ,  H01L29/0657 ,  H01L29/42356 ,  H01L29/66666 ,  H01L29/78642

Abstract: In contrast to a conventional planar CMOS technique in design and fabrication for a field-effect transistor (FET), the present invention provides an SGT CMOS device formed on a conventional substrate using various crystal planes in association with a channel type and a pillar shape of an FET, without a need for a complicated device fabrication process. Further, differently from a design technique of changing a surface orientation in each planar FET, the present invention is designed to change a surface orientation in each SGT to achieve improvement in carrier mobility. Thus, a plurality of SGTs having various crystal planes can be formed on a common substrate to achieve a plurality of different carrier mobilities so as to obtain desired performance.

Abstract translation: 与用于场效应晶体管（FET）的设计和制造中的常规平面CMOS技术相反，本发明提供了一种SGT CMOS器件，其形成在常规基板上，该传统基板使用与通道类型和柱形 FET，而不需要复杂的器件制造工艺。 此外，与改变每个平面FET中的表面取向的设计技术不同，本发明被设计为改变每个SGT中的表面取向以实现载流子迁移率的改善。 因此，可以在公共基板上形成具有各种晶面的多个SGT，以实现多种不同的载流子迁移率，从而获得期望的性能。

公开(公告)号：US08394706B2

公开(公告)日：2013-03-12

申请号：US13270954

申请日：2011-10-11

Applicant: Ralph G. Nuzzo ,  John A. Rogers ,  Etienne Menard ,  Keon Jae Lee ,  Dahl-Young Khang ,  Yugang Sun ,  Matthew Meitl ,  Zhengtao Zhu ,  Heung Cho Ko ,  Shawn Mack

Inventor： Ralph G. Nuzzo ,  John A. Rogers ,  Etienne Menard ,  Keon Jae Lee ,  Dahl-Young Khang ,  Yugang Sun ,  Matthew Meitl ,  Zhengtao Zhu ,  Heung Cho Ko ,  Shawn Mack

IPC: H01L21/30 ,  H01L21/46

CPC classification number: H01L29/72 ,  B81C2201/0185 ,  B82Y10/00 ,  H01L21/02628 ,  H01L21/30 ,  H01L21/3083 ,  H01L21/31612 ,  H01L27/1285 ,  H01L27/1292 ,  H01L29/045 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/068 ,  H01L29/1606 ,  H01L29/66265 ,  H01L29/66462 ,  H01L29/7781 ,  H01L29/78603 ,  H01L29/78681 ,  H01L29/78684 ,  H01L29/78696 ,  H01L31/0392 ,  H01L31/03925 ,  H01L31/03926 ,  H01L31/18 ,  H01L31/1804 ,  H01L2924/0002 ,  H01L2924/12041 ,  H01L2924/13091 ,  Y02E10/547 ,  Y02P70/521 ,  H01L2924/00

Abstract: The present invention provides a high yield pathway for the fabrication, transfer and assembly of high quality printable semiconductor elements having selected physical dimensions, shapes, compositions and spatial orientations. The compositions and methods of the present invention provide high precision registered transfer and integration of arrays of microsized and/or nanosized semiconductor structures onto substrates, including large area substrates and/or flexible substrates. In addition, the present invention provides methods of making printable semiconductor elements from low cost bulk materials, such as bulk silicon wafers, and smart-materials processing strategies that enable a versatile and commercially attractive printing-based fabrication platform for making a broad range of functional semiconductor devices.

Abstract translation: 本发明提供了用于制造，传输和组装具有选定的物理尺寸，形状，组成和空间取向的高质量可印刷半导体元件的高产率路径。 本发明的组合物和方法提供了高精度的记录转印和将微尺寸和/或纳米半导体结构的阵列集成到包括大面积衬底和/或柔性衬底的衬底上。 此外，本发明提供了从诸如散装硅晶片的低成本散装材料制造可印刷的半导体元件的方法，以及能够实现通用和商业上有吸引力的基于印刷的制造平台的智能材料处理策略，以制造广泛的功能性 半导体器件。

公开(公告)号：US08183628B2

公开(公告)日：2012-05-22

申请号：US12704975

申请日：2010-02-12

Applicant: Fujio Masuoka ,  Keon Jae Lee

Inventor： Fujio Masuoka ,  Keon Jae Lee

IPC: H01L29/78

CPC classification number: H01L29/7827 ,  H01L21/823807 ,  H01L21/823828 ,  H01L21/823885 ,  H01L27/0922 ,  H01L29/045 ,  H01L29/0657 ,  H01L29/42356 ,  H01L29/66666 ,  H01L29/78642

Abstract: In contrast to a conventional planar CMOS technique in design and fabrication for a field-effect transistor (FET), the present invention provides an SGT CMOS device formed on a conventional substrate using various crystal planes in association with a channel type and a pillar shape of an FET, without a need for a complicated device fabrication process. Further, differently from a design technique of changing a surface orientation in each planar FET, the present invention is designed to change a surface orientation in each SGT to achieve improvement in carrier mobility. Thus, a plurality of SGTs having various crystal planes can be formed on a common substrate to achieve a plurality of different carrier mobilities so as to obtain desired performance.

Abstract translation: 与用于场效应晶体管（FET）的设计和制造中的常规平面CMOS技术相反，本发明提供了一种SGT CMOS器件，其形成在常规基板上，该传统基板使用与通道类型和柱形 FET，而不需要复杂的器件制造工艺。 此外，与改变每个平面FET中的表面取向的设计技术不同，本发明被设计为改变每个SGT中的表面取向以实现载流子迁移率的改善。 因此，可以在公共基板上形成具有各种晶面的多个SGT，以实现多种不同的载流子迁移率，从而获得期望的性能。

公开(公告)号：US20120121891A1

公开(公告)日：2012-05-17

申请号：US13322385

申请日：2010-09-20

Applicant: Sang Ouk Kim ,  Won Jong Lee ,  Duck Hyun Lee ,  Tae Hee Han ,  Ji Eun Kim ,  Jin Ah Lee ,  Keon Jae Lee

Inventor： Sang Ouk Kim ,  Won Jong Lee ,  Duck Hyun Lee ,  Tae Hee Han ,  Ji Eun Kim ,  Jin Ah Lee ,  Keon Jae Lee

IPC: B32B5/16 ,  C23C16/50 ,  B05D5/12 ,  B05D5/00 ,  C23C16/26 ,  B82Y99/00 ,  B82Y40/00 ,  B82Y30/00

CPC classification number: H01L29/0665 ,  B82Y10/00 ,  B82Y40/00 ,  H01J1/304 ,  H01J9/025 ,  H01L51/0048 ,  Y10T428/25 ,  Y10T428/30

Abstract: The present invention relates to a 3-dimensional nanostructure having nanomaterials stacked on a graphene substrate; and more specifically, to a 3-dimensional nanostructure having at least one nanomaterial selected from nanotubes, nanowires, nanorods, nanoneedles and nanoparticles grown on a reduced graphene substrate. The present invention enables the achievement of a synergy effect of the 3-dimensional nanostructure hybridizing 1-dimensional nanomaterials and 2-dimensional graphene. The nanostructure according to the present invention is excellent in flexibility and elasticity, and can easily be transferred to any substrate having a non-planar surface. Also, all junctions in nanomaterials, a metal catalyst and a graphene film system form the ohmic electrical contact, which allows the nanostructure to easily be incorporated into a field-emitting device.

Abstract translation: 本发明涉及一种具有层叠在石墨烯衬底上的纳米材料的三维纳米结构; 更具体地说，涉及一种具有至少一种纳米材料的纳米结构的纳米结构，所述纳米材料选自在还原的石墨烯衬底上生长的纳米管，纳米线，纳米针和纳米线。 本发明能够实现3维纳米结构与1维纳米材料和2维石墨烯杂交的协同作用。 本发明的纳米结构体的柔软性和弹性优异，可以容易地转移到具有非平面的任何基材。 而且，纳米材料中的所有结，金属催化剂和石墨烯膜系统形成欧姆电接触，这允许纳米结构容易地结合到场发射器件中。

公开(公告)号：US20120083099A1

公开(公告)日：2012-04-05

申请号：US13270954

申请日：2011-10-11

Applicant: Ralph G. NUZZO ,  John A. ROGERS ,  Etienne MENARD ,  Keon Jae LEE ,  Dahl-Young KHANG ,  Yugang SUN ,  Matthew MEITL ,  Zhengtao ZHU ,  Heung Cho KO ,  Shawn MACK

Inventor： Ralph G. NUZZO ,  John A. ROGERS ,  Etienne MENARD ,  Keon Jae LEE ,  Dahl-Young KHANG ,  Yugang SUN ,  Matthew MEITL ,  Zhengtao ZHU ,  Heung Cho KO ,  Shawn MACK

IPC: H01L21/322

CPC classification number: H01L29/72 ,  B81C2201/0185 ,  B82Y10/00 ,  H01L21/02628 ,  H01L21/30 ,  H01L21/3083 ,  H01L21/31612 ,  H01L27/1285 ,  H01L27/1292 ,  H01L29/045 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/068 ,  H01L29/1606 ,  H01L29/66265 ,  H01L29/66462 ,  H01L29/7781 ,  H01L29/78603 ,  H01L29/78681 ,  H01L29/78684 ,  H01L29/78696 ,  H01L31/0392 ,  H01L31/03925 ,  H01L31/03926 ,  H01L31/18 ,  H01L31/1804 ,  H01L2924/0002 ,  H01L2924/12041 ,  H01L2924/13091 ,  Y02E10/547 ,  Y02P70/521 ,  H01L2924/00

Abstract: The present invention provides a high yield pathway for the fabrication, transfer and assembly of high quality printable semiconductor elements having selected physical dimensions, shapes, compositions and spatial orientations. The compositions and methods of the present invention provide high precision registered transfer and integration of arrays of microsized and/or nanosized semiconductor structures onto substrates, including large area substrates and/or flexible substrates. In addition, the present invention provides methods of making printable semiconductor elements from low cost bulk materials, such as bulk silicon wafers, and smart-materials processing strategies that enable a versatile and commercially attractive printing-based fabrication platform for making a broad range of functional semiconductor devices.

Abstract translation: 本发明提供了用于制造，传输和组装具有选定的物理尺寸，形状，组成和空间取向的高质量可印刷半导体元件的高产率路径。 本发明的组合物和方法提供了高精度的记录转印和将微尺寸和/或纳米半导体结构的阵列集成到包括大面积衬底和/或柔性衬底的衬底上。 此外，本发明提供了从诸如散装硅晶片的低成本散装材料制造可印刷的半导体元件的方法，以及能够实现通用和商业上有吸引力的基于印刷的制造平台的智能材料处理策略，以制造广泛的功能性 半导体器件。