公开(公告)号：US4162203A

公开(公告)日：1979-07-24

申请号：US920741

申请日：1978-06-28

申请人： Richard C. Eden ,  Kenichi Nakano

发明人： Richard C. Eden ,  Kenichi Nakano

IPC分类号： H01L31/107 ,  H01L31/18

CPC分类号： H01L31/107

摘要： A narrow-band, inverted homo-heterojunction avalanche photodiode, configured in the shape of a mesa situated upon a substrate which is transparent to selected light energy wavelengths. The diode is inverted for operation such that the incoming light energy enters the substrate side, passes through a wavelength selective buffer layer and is absorbed upon entering the succeeding, active region. Avalanche gain is attained by drift from the area of absorption to the high field p-n homo-heterojunction located immediately thereafter. The device exhibits low levels of noise during operation because absorption is occurring in a low field region and because the ionization and breakdown noise associated with lattice mismatches is avoided through the formation of the p-n homo-heterojunction in one continuous growth process. Appropriate passivation of the mesa walls inhibits surface leakage and breakdown effects.

摘要翻译： 窄带，反相同异质结雪崩光电二极管，其被配置为位于对选择的光能波长透明的衬底上的台面形状。 二极管被反相操作，使得入射光能进入衬底侧，通过波长选择缓冲层，并在进入后续有源区时被吸收。 通过从吸收区域漂移到紧邻的高场p-n同异质结获得雪崩增益。 该装置在操作期间表现出低水平的噪声，因为在低场区域中发生吸收，并且由于通过在一个连续生长过程中形成p-n同异质结来避免与晶格失配相关的电离和击穿噪声。 台面壁的适当钝化可以抑制表面渗漏和击穿效应。

公开(公告)号：US4110661A

公开(公告)日：1978-08-29

申请号：US783882

申请日：1977-04-01

申请人： James S. Harris, Jr. ,  Richard C. Eden ,  Earl S. Cory ,  Fred W. Scholl

发明人： James S. Harris, Jr. ,  Richard C. Eden ,  Earl S. Cory ,  Fred W. Scholl

IPC分类号： G02B6/42 ,  H01L33/00 ,  H05B33/16 ,  H05B33/24

CPC分类号： H01L33/38 ,  G02B6/4202 ,  H01L33/0025 ,  H01L33/405

摘要： A high-speed, light emitting device which utilizes a solid state source for generating light for use in fiber optical communications. The source is an active, narrow band gap layer of semiconductive material between heterojunctions formed with a p.sup.+ -type material on one side of an n.sup.+ -type material on the other side. A mirror on the back of the source reflects light toward an optical fiber abutting the substrate on the front of the source. A side mirror traverses the edge of the active layer at an angle of about 45.degree. and reflects light traveling parallel to the active layer toward the optical fiber. Contacts are coupled to the semiconductor material for applying an electrical signal across the active layer to generate light. In a preferred embodiment, the active layer is GaAsSb joined to GaAlAsSb and the substrate is GaAs.

摘要翻译： 一种利用固态光源产生用于光纤通信的光的高速发光装置。 源是在另一侧的n +型材料的一侧上由p +型材料形成的异质结之间的半导体材料的有源窄带隙层。 源的背面上的反射镜将光反射到邻近源的前面的基板的光纤。 侧镜以约45°的角度横越有源层的边缘，并将平行于有源层的光朝向光纤反射。 触点耦合到半导体材料，用于跨有源层施加电信号以产生光。 在优选实施例中，有源层是连接到GaAlAsSb的GaAsSb，衬底是GaAs。

公开(公告)号：US4021836A

公开(公告)日：1977-05-03

申请号：US566159

申请日：1976-04-12

申请人： Austin M. Andrews, II ,  John E. Clarke ,  Edward R. Gertner ,  Joseph T. Longo ,  Richard C. Eden

发明人： Austin M. Andrews, II ,  John E. Clarke ,  Edward R. Gertner ,  Joseph T. Longo ,  Richard C. Eden

IPC分类号： H01L27/146 ,  H01L31/0352 ,  H01L31/109 ,  H01L27/14 ,  H01L29/161

CPC分类号： H01L27/14649 ,  H01L31/035281 ,  H01L31/109 ,  H01L2224/45144 ,  H01L2224/48463 ,  H01L2224/73265 ,  Y02E10/50 ,  Y10S148/064 ,  Y10S148/115 ,  Y10S148/135

摘要： An inverted heterojunction photodiode for use as a laser detector sensitive to the 8 - 14 .mu.m portion of the infrared spectrum and operable above 77.degree. K. The diode structure comprises a PbTe substrate, a first buffer layer of a Pb.sub..90 Sn.sub..10 Te material on said substrate and a second active layer of a Pb.sub..80 Sn.sub..20 Te material on said buffer layer. The first and second layers are grown by liquid phase epitaxy.

摘要翻译： 用作激光检测器的反相异质结光电二极管，用于对红外光谱的8-14μm部分敏感且可在77°K以上操作。二极管结构包括PbTe衬底，Pb.90Sn.10Te材料的第一缓冲层 在所述衬底上和在所述缓冲层上的Pb.80Sn.20Te材料的第二有源层。 第一层和第二层通过液相外延生长。

公开(公告)号：US07019337B2

公开(公告)日：2006-03-28

申请号：US10703921

申请日：2003-11-07

申请人： Richard C. Eden ,  Bruce A. Smetana

发明人： Richard C. Eden ,  Bruce A. Smetana

IPC分类号： H01L29/74

CPC分类号： H01L24/17 ,  H01L23/4824 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/50 ,  H01L23/642 ,  H01L27/088 ,  H01L29/41725 ,  H01L29/4238 ,  H01L29/78 ,  H01L29/7802 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/0101 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01023 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01037 ,  H01L2924/01038 ,  H01L2924/01039 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01043 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01051 ,  H01L2924/01052 ,  H01L2924/01056 ,  H01L2924/01057 ,  H01L2924/01061 ,  H01L2924/01068 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01076 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/01094 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/12032 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2924/15747 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H02M3/33507 ,  H02M3/33576 ,  H02M3/33592 ,  Y02B70/1475 ,  H01L2924/00 ,  H01L2224/0401

摘要： Power semiconductor switching devices, power converters, integrated circuit assemblies, integrated circuitry, power current switching methods, methods of forming a power semiconductor switching device, power conversion methods, power semiconductor switching device packaging methods, and methods of forming a power transistor are described. One exemplary aspect provides a power semiconductor device including a semiconductive substrate having a surface; and a power transistor having a planar configuration and comprising a plurality of electrically coupled sources and a plurality of electrically coupled drains formed using the semiconductive substrate and adjacent the surface.

摘要翻译： 描述了功率半导体开关器件，功率转换器，集成电路组件，集成电路，功率电流切换方法，形成功率半导体开关器件的方法，功率转换方法，功率半导体开关器件封装方法和形成功率晶体管的方法。 一个示例性方面提供一种功率半导体器件，其包括具有表面的半导体衬底; 以及功率晶体管，其具有平面构造并且包括多个电耦合源和使用所述半导体衬底并且邻近所述表面形成的多个电耦合漏极。

公开(公告)号：US06737301B2

公开(公告)日：2004-05-18

申请号：US09904575

申请日：2001-07-12

申请人： Richard C. Eden ,  Bruce A. Smetana

发明人： Richard C. Eden ,  Bruce A. Smetana

IPC分类号： H01L2182

CPC分类号： H01L24/17 ,  H01L23/4824 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/50 ,  H01L23/642 ,  H01L27/088 ,  H01L29/41725 ,  H01L29/4238 ,  H01L29/78 ,  H01L29/7802 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/0101 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01023 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01037 ,  H01L2924/01038 ,  H01L2924/01039 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01043 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01051 ,  H01L2924/01052 ,  H01L2924/01056 ,  H01L2924/01057 ,  H01L2924/01061 ,  H01L2924/01068 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01076 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/01094 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/12032 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2924/15747 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H02M3/33507 ,  H02M3/33576 ,  H02M3/33592 ,  Y02B70/1475 ,  H01L2924/00 ,  H01L2224/0401

摘要： Power semiconductor switching devices, power converters, integrated circuit assemblies, integrated circuitry, power current switching methods, methods of forming a power semiconductor switching device, power conversion methods, power semiconductor switching device packaging methods, and methods of forming a power transistor are described. One exemplary aspect provides a power semiconductor device including a semiconductive substrate having a surface; and a power transistor having a planar configuration and comprising a plurality of electrically coupled sources and a plurality of electrically coupled drains formed using the semiconductive substrate and adjacent the surface.

摘要翻译： 描述了功率半导体开关器件，功率转换器，集成电路组件，集成电路，功率电流切换方法，形成功率半导体开关器件的方法，功率转换方法，功率半导体开关器件封装方法和形成功率晶体管的方法。 一个示例性方面提供一种功率半导体器件，其包括具有表面的半导体衬底; 以及功率晶体管，其具有平面构造并且包括多个电耦合源和使用所述半导体衬底并且邻近所述表面形成的多个电耦合漏极。

公开(公告)号：US06553044B1

公开(公告)日：2003-04-22

申请号：US09175235

申请日：1998-10-20

申请人： Richard C. Eden

发明人： Richard C. Eden

IPC分类号： H01S300

CPC分类号： H01S5/4031 ,  H01L2224/48091 ,  H01L2224/48472 ,  H01S5/02216 ,  H01S5/0224 ,  H01S5/02276 ,  H01S5/02284 ,  H01S5/0427 ,  H01S5/06226 ,  H01S5/06804 ,  H01S5/4025 ,  H01S5/4087 ,  H01L2924/00014

摘要： Active compensation techniques are used for control of temperature, wavelength, and other characteristics of lasers within a laser array. The laser array includes a plurality of lasers and a plurality of dissipation elements. The dissipation elements can be interstitial to the lasers and can be implemented as non-lasing diodes. The dissipation elements are selectively activated (i.e., turned “on” to dissipate power) to adjust the temperature at the laser junctions. The change in junction temperature allows the lasers to operate at their specified wavelengths. The dissipation elements can be individually controlled and two or more bits of resolution can be provided. Active compensation can be used to adjust (i.e., to compensate) the temperature of selected lasers when one or more lasers are deselected. Active compensation can also be used to adjust (i.e., “tweak”) the wavelengths of the lasers within the laser array to be within their specified wavelengths.

摘要翻译： 有源补偿技术用于控制激光器阵列内的激光器的温度，波长和其他特性。 激光器阵列包括多个激光器和多个耗散元件。 耗散元件可以是激光器的间隙，并且可以被实现为非激光二极管。 选择性地激活耗散元件（即，“开”以耗散功率）来调节激光连接处的温度。 结温变化允许激光器在其指定波长下工作。 可以单独控制耗散元件，并可提供两位或更多位的分辨率。 当取消选择一个或多个激光器时，可以使用有源补偿来调整（即补偿）所选择的激光器的温度。 还可以使用有源补偿来调整（即，“调整”）激光器阵列内的激光波长在其指定波长内。

公开(公告)号：US4405870A

公开(公告)日：1983-09-20

申请号：US214924

申请日：1980-12-10

申请人： Richard C. Eden

发明人： Richard C. Eden

IPC分类号： H03K19/0956 ,  H03K19/094 ,  H03K19/017 ,  H03K19/12 ,  H03K19/20

CPC分类号： H03K19/0956

摘要： Disclosed is a logic circuit with a plurality of AND logic elements, each including a plurality of Schottky diodes with each cathode connected to a logic input and the anodes connected in common to establish an AND output. A diode pull up FET is provided for each AND output, with the source connected to the AND output, the gate connected to the source, and the drain connected to a source of positive bias potential. An OR logic element includes a plurality of Schottky diodes with each anode connected to one of the AND outputs and the cathodes connected in common to establish an OR output, while a diode pull down FET has its drain connected to the OR output, with the gate connected to the source and the source connected to a source of negative bias potential. A level shifting diode is placed between the OR output and the pull down FET. An output FET is connected through its gate to the drain of the diode pull down FET, with the source connected to ground and the drain providing a logic output from the circuit. An output pull up FET has its source connected to the drain of the output FET, the gate connected to the source, and the drain connected to the source of positive bias potential.

摘要翻译： 公开了具有多个AND逻辑元件的逻辑电路，每个逻辑元件包括多个肖特基二极管，每个阴极连接到逻辑输入端，并且共同连接的阳极以建立与输出。 为每个AND输出提供二极管上拉FET，其源极连接到AND输出，栅极连接到源极，漏极连接到正偏置电位源。 OR逻辑元件包括多个肖特基二极管，其中每个阳极连接到一个AND输出，阴极共同连接以建立OR输出，而二极管下拉FET的漏极连接到OR输出，栅极 连接到源极和源极连接到负偏置电位源。 电平移位二极管放置在OR输出和下拉FET之间。 输出FET通过其栅极连接到二极管下拉FET的漏极，源极接地，漏极提供来自电路的逻辑输出。 输出上拉FET的源极连接到输出FET的漏极，栅极连接到源极，漏极连接到正偏置电位源。