公开(公告)号：US08700833B2

公开(公告)日：2014-04-15

申请号：US13743072

申请日：2013-01-16

申请人： SanDisk Corporation

发明人： Yoram Cedar ,  Micky Holtzman ,  Yosi Pinto

IPC分类号： G06F13/00

CPC分类号： G06F13/1694 ,  G06F12/0653 ,  G06F12/0661 ,  G06F13/385 ,  G06F13/387 ,  G06F13/4239 ,  G06F2212/2022 ,  G06F2213/0052

摘要： A data storage device includes one or more data paths through electrical contacts of the data storage device. The data paths are operably connected to allow bits to be transferred into and out of the data storage device. The data storage device stores an indication of a number of the one or more data paths in a configuration register. A method includes performing, while the data storage device is operatively coupled to a host device, receiving a command of the host device to read the configuration register and providing the indication via at least one of the one or more data paths. Providing the indication enables indicating to the host device the number of the one or more data paths.

摘要翻译： 数据存储装置包括通过数据存储装置的电触点的一个或多个数据路径。 数据路径被可操作地连接以允许位被传入和传出数据存储设备。 数据存储装置将一个或多个数据路径的数量的指示存储在配置寄存器中。 一种方法包括在数据存储设备可操作地耦合到主机设备的同时执行主机设备的命令以读取配置寄存器并通过一个或多个数据路径中的至少一个提供指示。 提供指示使得能够向主机设备指示一个或多个数据路径的号码。

公开(公告)号：US20130138846A1

公开(公告)日：2013-05-30

申请号：US13743072

申请日：2013-01-16

申请人： SANDISK CORPORATION

发明人： YORAM CEDAR ,  MICKY HOLTZMAN ,  YOSI PINTO

IPC分类号： G06F13/16

CPC分类号： G06F13/1694 ,  G06F12/0653 ,  G06F12/0661 ,  G06F13/385 ,  G06F13/387 ,  G06F13/4239 ,  G06F2212/2022 ,  G06F2213/0052

摘要： A data storage device includes one or more data paths through electrical contacts of the data storage device. The data paths are operably connected to allow bits to be transferred into and out of the data storage device. The data storage device stores an indication of a number of the one or more data paths in a configuration register. A method includes performing, while the data storage device is operatively coupled to a host device, receiving a command of the host device to read the configuration register and providing the indication via at least one of the one or more data paths. Providing the indication enables indicating to the host device the number of the one or more data paths.

摘要翻译： 数据存储装置包括通过数据存储装置的电触点的一个或多个数据路径。 数据路径被可操作地连接以允许位被传入和传出数据存储设备。 数据存储装置将一个或多个数据路径的数量的指示存储在配置寄存器中。 一种方法包括在数据存储设备可操作地耦合到主机设备的同时执行主机设备的命令以读取配置寄存器并通过一个或多个数据路径中的至少一个提供指示。 提供指示使得能够向主机设备指示一个或多个数据路径的号码。

公开(公告)号：US20040150464A1

公开(公告)日：2004-08-05

申请号：US10356098

申请日：2003-01-30

申请人： SanDisk Corporation

发明人： Shahzad Khalid

IPC分类号： G05F001/10

CPC分类号： G11C27/005 ,  G11C27/028 ,  H03F1/342 ,  H03F3/45475 ,  H03F3/505 ,  H03F2200/297 ,  H03F2200/366 ,  H03F2200/453 ,  H03F2200/78 ,  H03F2203/5021 ,  H03F2203/5027

摘要： A voltage buffer for capacitive loads isolates the load from the feedback loop. Using a variation of a follower arrangement, a second transistor outside of the feedback loop introduced. The current to the load is supplied through the second transistor, which is connected to have the same control gate level as the transistor in the feedback loop and provide an output voltage based on the reference input voltage. The output voltage is dependent upon the input voltage, but the load is removed from the feedback loop. By removing the load from the feedback loop, the loop is stabilized with only a very small or no compensating capacitor, allowing the quiescent current of the buffer to be reduced and the settling time to be improved. One preferred use of the present invention is to drive the data storage elements of a non-volatile memory.

摘要翻译： 用于电容负载的电压缓冲器将负载与反馈回路隔离。 使用从动装置的变型，引入反馈回路外部的第二晶体管。 通过第二晶体管提供到负载的电流，第二晶体管被连接以具有与反馈回路中的晶体管相同的控制栅极电平，并且基于参考输入电压提供输出电压。 输出电压取决于输入电压，但负载从反馈回路中移除。 通过从反馈回路中消除负载，仅通过非常小的补偿电容器或无补偿电容器使环路稳定，从而可以减小缓冲器的静态电流并提高稳定时间。 本发明的一个优选的用途是驱动非易失性存储器的数据存储元件。

公开(公告)号：US20040109354A1

公开(公告)日：2004-06-10

申请号：US10313738

申请日：2002-12-06

申请人： SanDisk Corporation

发明人： Chi-Ming Wang ,  Kuo-Lung Chen ,  Shouchang Tsao

IPC分类号： G11C011/34

CPC分类号： G11C16/12

摘要： A current-limited latch circuit is used within a nonvolatile memory integrated circuit for decoding, programming, erase, and other operations. In one implementation, there are a number of latches connected together in parallel between two power supply lines. A current mirroring scheme limits current supplied to the latch. This reduces a difference of the two supplies, positive voltage, ground, or negative voltages, during data changes. The circuit provides smaller device sizes and fast speeds when data changes in the latch, while also providing lower power consumption. The technique provides greater benefits as the voltage difference between the two power supplies is greater.

摘要翻译： 在用于解码，编程，擦除和其他操作的非易失性存储器集成电路中使用限流锁存电路。 在一个实现中，在两个电源线之间并联连接有多个锁存器。 当前的镜像方案限制提供给锁存器的电流。 在数据更改期间，可以减少两个电源，正电压，接地或负电压的差异。 当锁存器中的数据变化时，该电路提供较小的器件尺寸和快速速度，同时还提供较低的功耗。 当两个电源之间的电压差较大时，该技术提供了更大的益处。

公开(公告)号：US20030222338A1

公开(公告)日：2003-12-04

申请号：US10039615

申请日：2002-01-04

申请人： SanDisk Corporation

发明人： Robert F. Wallace

IPC分类号： H01L023/52

CPC分类号： H01L24/85 ,  H01L23/49575 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/48472 ,  H01L2224/48479 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/85051 ,  H01L2224/85986 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01073 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2224/85186 ,  H01L2224/78 ,  H01L2224/48227 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/4554 ,  H01L2224/85399 ,  H01L2224/05599

摘要： Thin molded semiconductor device packages that contain two semiconductor dice and techniques for forming such packages are described. The packages and techniques mainly involve reverse wirebonding the bonding wires that connect the dice to surrounding conductive contact leads. Techniques for ball bonding a first end of a bonding wire to a contact lead and a second end of the bonding wire to a semiconductor die are described. Techniques for stitch bonding a bonding wire to both a contact lead and a semiconductor die is also described.

摘要翻译： 描述了包含两个半导体晶片的薄模制半导体器件封装以及用于形成这种封装的技术。 封装和技术主要涉及将引线连接到周围导电接触引线的接合线的反向引线接合。 描述了将接合线的第一端与接合引线和接合线的第二端球接合到半导体管芯的技术。 还描述了用于将接合引线接合到接触引线和半导体管芯的技术。

公开(公告)号：US20030086293A1

公开(公告)日：2003-05-08

申请号：US10053339

申请日：2001-11-02

申请人： SanDisk Corporation

发明人： Geoffrey S. Gongwer ,  Shahzad B. Khalid ,  Daniel C. Guterman

IPC分类号： G11C011/34 ,  G11C016/06 ,  G11C005/00

CPC分类号： G11C16/349 ,  G11C11/5621 ,  G11C11/5642 ,  G11C16/28 ,  G11C29/00

摘要： A memory system (e.g., memory card) having error management for stored levels (e.g., reference levels) used in discrimination of logic levels for data storage units providing data storage is disclosed. The stored levels can be stored in predetermined storage units (e.g., writable tracking storage units) in the memory system. The memory system is typically a non-volatile memory product or device that provides binary or multi-state data storage.

摘要翻译： 公开了一种对提供数据存储的数据存储单元的逻辑电平进行辨别的存储电平（例如参考电平）的错误管理的存储器系统（例如，存储卡）。 存储的电平可以存储在存储器系统中的预定存储单元（例如，可写跟踪存储单元）中。 存储器系统通常是提供二进制或多状态数据存储的非易失性存储器产品或设备。

公开(公告)号：US20020186842A1

公开(公告)日：2002-12-12

申请号：US10006554

申请日：2001-12-06

申请人： SANDISK CORPORATION

发明人： Farshid Sabet-Sharghi ,  Bahman Qawami ,  Robert C. Chang

IPC分类号： H04N007/167

CPC分类号： G06F21/79 ,  G06F21/10 ,  G06F21/72 ,  G06F21/83 ,  G06F2221/0711 ,  G06F2221/0784 ,  G06F2221/2137 ,  G06Q20/3674 ,  G11B20/00086 ,  G11B20/00094 ,  G11B20/00166 ,  G11B20/0021 ,  G11B20/00246 ,  G11B20/00275 ,  G11B20/00347 ,  G11B20/00362 ,  G11B20/00528 ,  G11B20/00673 ,  G11B20/10 ,  G11B27/005 ,  G11B27/105 ,  G11B2020/10546 ,  G11B2220/60 ,  H04L9/0844 ,  H04L9/16 ,  H04L9/3271 ,  H04L2209/60 ,  H04N5/781 ,  H04N5/85 ,  H04N5/907 ,  H04N5/913 ,  H04N2005/91364

摘要： A secure software package for original equipment manufacturers to run in electronic devices in order to access and dynamically decrypt encrypted audio video or other content from a memory storage device such as a memory card, optical or hard disk such that the user interface of the device need only send simple commands and the decrypted content is output.

摘要翻译： 一种用于原始设备制造商在电子设备中运行的安全软件包，以便从诸如存储卡，光学或硬盘的存储器存储设备访问和动态解密加密的音频视频或其他内容，使得设备的用户界面需要 只发送简单命令，并输出解密的内容。

公开(公告)号：US20160111147A1

公开(公告)日：2016-04-21

申请号：US14983802

申请日：2015-12-30

申请人： Kabushiki Kaisha Toshiba ,  SanDisk Corporation

发明人： Tomoharu Tanaka ,  Jian Chen

IPC分类号： G11C11/56

CPC分类号： G11C11/5628 ,  G11C11/5642 ,  G11C16/0483 ,  G11C16/10 ,  G11C16/12 ,  G11C16/34 ,  G11C16/3418 ,  G11C16/3427 ,  G11C16/3459 ,  G11C16/3481 ,  G11C2211/5621 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11524

摘要： A non-volatile semiconductor memory device includes an electrically data rewritable non-volatile semiconductor memory cell and a write circuit for writing data in the memory cell, the write circuit writing a data in the memory cells by supplying a write voltage Vpgm and a write control voltage VBL to the memory cell, continuing the writing of the data in the memory cell by changing the value of the write control voltage VBL in response to an advent of a first write state of the memory cell and inhibiting any operation of writing a data to the memory cell by further changing the value of the write control voltage VBL to Vdd in response to an advent of a second write state of the memory cell.

公开(公告)号：US09257189B2

公开(公告)日：2016-02-09

申请号：US14559265

申请日：2014-12-03

申请人： Kabushiki Kaisha Toshiba ,  SanDisk Corporation

发明人： Tomoharu Tanaka ,  Jian Chen

IPC分类号： G11C7/10 ,  G11C16/10 ,  G11C11/56 ,  G11C16/04 ,  G11C16/12 ,  G11C16/34 ,  H01L27/115

CPC分类号： G11C11/5628 ,  G11C11/5642 ,  G11C16/0483 ,  G11C16/10 ,  G11C16/12 ,  G11C16/34 ,  G11C16/3418 ,  G11C16/3427 ,  G11C16/3459 ,  G11C16/3481 ,  G11C2211/5621 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11524

摘要： A non-volatile semiconductor memory device includes an electrically data rewritable non-volatile semiconductor memory cell and a write circuit for writing data in the memory cell, the write circuit writing a data in the memory cells by supplying a write voltage Vpgm and a write control voltage VBL to the memory cell, continuing the writing of the data in the memory cell by changing the value of the write control voltage VBL in response to an advent of a first write state of the memory cell and inhibiting any operation of writing a data to the memory cell by further changing the value of the write control voltage VBL to Vdd in response to an advent of a second write state of the memory cell.

公开(公告)号：US20150078092A1

公开(公告)日：2015-03-19

申请号：US14559265

申请日：2014-12-03

申请人： Kabushiki Kaisha Toshiba ,  SanDisk Corporation

发明人： Tomoharu Tanaka ,  Jian Chen

IPC分类号： G11C16/10

CPC分类号： G11C11/5628 ,  G11C11/5642 ,  G11C16/0483 ,  G11C16/10 ,  G11C16/12 ,  G11C16/34 ,  G11C16/3418 ,  G11C16/3427 ,  G11C16/3459 ,  G11C16/3481 ,  G11C2211/5621 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11524

摘要： A non-volatile semiconductor memory device includes an electrically data rewritable non-volatile semiconductor memory cell and a write circuit for writing data in the memory cell, the write circuit writing a data in the memory cells by supplying a write voltage Vpgm and a write control voltage VBL to the memory cell, continuing the writing of the data in the memory cell by changing the value of the write control voltage VBL in response to an advent of a first write state of the memory cell and inhibiting any operation of writing a data to the memory cell by further changing the value of the write control voltage VBL to Vdd in response to an advent of a second write state of the memory cell.

摘要翻译： 非易失性半导体存储器件包括电数据可重写非易失性半导体存储单元和用于在存储单元中写入数据的写入电路，写入电路通过提供写入电压Vpgm和写入控制将数据写入存储单元 电压VBL到存储器单元，响应于存储单元的第一写入状态的到来改变写入控制电压VBL的值，继续写入存储单元中的数据，并且禁止写入数据的任何操作 该存储单元响应于存储单元的第二写入状态的进入而进一步将写入控制电压VBL的值改变为Vdd。