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    Silicon Texturing Formulations for Solar Applications
    21.
    发明申请
    Silicon Texturing Formulations for Solar Applications 审中-公开
    太阳能应用的硅纹理配方

    公开(公告)号：US20110070744A1

    公开(公告)日：2011-03-24

    申请号：US12885360

    申请日：2010-09-17

    Applicant: Zhi-Wen Sun ,  Minh Anh Nguyen

    Inventor： Zhi-Wen Sun ,  Minh Anh Nguyen

    IPC: H01L21/306 ,  C09K13/02

    CPC classification number: H01L31/02363 ,  Y02E10/50

    Abstract: The current invention describes a process and texturing solution for texturing a crystalline silicon substrate to provide a light trapping surface within a crystalline silicon based solar cell. In an embodiment the texturing process includes a pre-treatment of hydrofluoric acid followed by the application of a texturing solution that includes potassium hydroxide (KOH) and butanol. The application of the texturing solution may be followed by a hydrofluoric acid post-treatment. A combinatorial method of optimizing the textured surface of a crystalline silicon substrate is also described.

    Abstract translation: 本发明描述了一种用于纹理化晶体硅衬底以在晶体硅基太阳能电池内提供光捕获表面的工艺和纹理解决方案。 在一个实施方案中，变形过程包括氢氟酸的预处理，然后施加包括氢氧化钾（KOH）和丁醇的变形溶液。 变形溶液的应用之后可以是氢氟酸后处理。 还描述了优化结晶硅衬底的纹理表面的组合方法。

    Methods For Improving Selectivity of Electroless Deposition Processes
    22.
    发明申请
    Methods For Improving Selectivity of Electroless Deposition Processes 有权
    提高无电沉积工艺选择性的方法

    公开(公告)号：US20090291275A1

    公开(公告)日：2009-11-26

    申请号：US12471310

    申请日：2009-05-22

    Applicant: Jinhong Tong ,  Zhi-Wen Sun ,  Chi-I Lang ,  Nitin Kumar ,  Bob Kong ,  Zachary Fresco

    Inventor： Jinhong Tong ,  Zhi-Wen Sun ,  Chi-I Lang ,  Nitin Kumar ,  Bob Kong ,  Zachary Fresco

    IPC: B32B3/00 ,  B05D5/12 ,  B05D3/04

    CPC classification number: H01L21/288 ,  C23C18/1605 ,  C23C18/168 ,  C23C18/50 ,  H01L21/0332 ,  H01L21/3105 ,  H01L21/76829 ,  H01L21/76849

    Abstract: Methods for improving selective deposition of a capping layer on a patterned substrate are presented, the method including: receiving the patterned substrate, the patterned substrate including a conductive region and a dielectric region; forming a molecular masking layer (MML) on the dielectric region; preparing an electroless (ELESS) plating bath, where the ELESS plating bath includes: a cobalt (Co) ion source: a complexing agent: a buffer: a tungsten (W) ion source: and a reducing agent; and reacting the patterned substrate with the ELESS plating bath for an ELESS period at an ELESS temperature and an ELESS pH so that the capping layer is selectively formed on the conductive region. In some embodiments, methods further include a pH adjuster for adjusting the ELESS pH to a range of approximately 9.0 pH to 9.2 pH. In some embodiments, the pH adjuster is tetramethylammonium hydroxide (TMAH). In some embodiments, the MML is hydrophilic.

    Abstract translation: 提出了用于改善在图案化衬底上的覆盖层的选择性沉积的方法，所述方法包括：接收图案化衬底，所述图案化衬底包括导电区域和电介质区域; 在介电区上形成分子屏蔽层（MML）; 制备无电镀（ELESS）电镀浴，其中ELESS电镀浴包括：钴（Co）离子源：络合剂：缓冲剂：钨（W）离子源和还原剂; 并在ELESS温度和ELESS pH下使图案化衬底与ELESS电镀浴反应ELESS周期，从而在导电区域上选择性地形成覆盖层。 在一些实施方案中，方法还包括用于将ELESS pH调节至约9.0 pH至9.2 pH范围的pH调节剂。 在一些实施方案中，pH调节剂是氢氧化四甲基铵（TMAH）。 在一些实施方案中，MML是亲水的。

    Methods for forming resistive switching memory elements
    25.
    发明申请
    Methods for forming resistive switching memory elements 有权
    形成电阻式开关存储元件的方法

    公开(公告)号：US20080185567A1

    公开(公告)日：2008-08-07

    申请号：US11702966

    申请日：2007-02-05

    Applicant: Nitin Kumar ,  Chi-I Lang ,  Tony Chiang ,  Zhi-wen Sun ,  Jihhong Tong

    Inventor： Nitin Kumar ,  Chi-I Lang ,  Tony Chiang ,  Zhi-wen Sun ,  Jihhong Tong

    IPC: H01L47/00 ,  H01L21/00

    CPC classification number: H01L45/145 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/146 ,  H01L45/1633

    Abstract: Resistive switching memory elements are provided that may contain electroless metal electrodes and metal oxides formed from electroless metal. The resistive switching memory elements may exhibit bistability and may be used in high-density multi-layer memory integrated circuits. Electroless conductive materials such as nickel-based materials may be selectively deposited on a conductor on a silicon wafer or other suitable substrate. The electroless conductive materials can be oxidized to form a metal oxide for a resistive switching memory element. Multiple layers of conductive materials can be deposited each of which has a different oxidation rate. The differential oxidization rates of the conductive layers can be exploited to ensure that metal oxide layers of desired thicknesses are formed during fabrication.

    Abstract translation: 提供电阻式开关存储器元件，其可以包含由无电金属形成的化学金属电极和金属氧化物。 电阻式开关存储器元件可以表现出双稳态，并且可以用于高密度多层存储器集成电路中。 诸如镍基材料的无电导电材料可以选择性地沉积在硅晶片或其它合适的衬底上的导体上。 无电导电材料可以被氧化以形成用于电阻式开关存储元件的金属氧化物。 可以沉积多层导电材料，每层具有不同的氧化速率。 可以利用导电层的差异氧化速率来确保在制造期间形成所需厚度的金属氧化物层。

    Method of direct plating of copper on a ruthenium alloy
    26.
    发明申请
    Method of direct plating of copper on a ruthenium alloy 审中-公开
    在钌合金上直接电镀铜的方法

    公开(公告)号：US20060283716A1

    公开(公告)日：2006-12-21

    申请号：US11373635

    申请日：2006-03-09

    Applicant: Hooman Hafezi ,  Aron Rosenfeld ,  Zhi-Wen Sun ,  Hua Chung ,  Lei Zhu

    Inventor： Hooman Hafezi ,  Aron Rosenfeld ,  Zhi-Wen Sun ,  Hua Chung ,  Lei Zhu

    IPC: C25D3/38

    CPC classification number: C25D5/34 ,  C25D3/38 ,  C25D5/10 ,  C25D5/18 ,  C25D5/54 ,  H01L21/2885 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76861 ,  H01L21/76862 ,  H01L21/76868 ,  H01L21/76873 ,  H01L21/76877 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A method is disclosed for depositing a copper seed layer onto a substrate surface, generally onto a barrier layer that is an alloy of a group VIII metal and a refractory metal. In one aspect, the alloy consists of at least 50% ruthenium and the balance a copper diffusion barrier material. A copper layer is electroplated on the alloy directly. In one aspect, the surface of the barrier layer is conditioned prior to plating to improve adhesion and reduce the critical current density for plating on the barrier layer. The conditioning may include cathodic pre-treatment or a plasma pre-treatment in a hydrogen or hydrogen/helium mixture. In one aspect, the substrate surface is immersed in an acidic plating bath and a nucleation waveform is applied to form a seed layer. In another aspect, the substrate is immersed in a neutral or alkaline copper solution that includes complexed copper ions.

    Abstract translation: 公开了一种用于将铜籽晶层沉积到基底表面上的方法，通常在作为VIII族金属和难熔金属的合金的阻挡层上。 一方面，合金由至少50％的钌组成，余量为铜扩散阻挡材料。 铜层直接电镀在合金上。 在一个方面，阻隔层的表面在镀覆之前被调节以提高粘附性并降低在阻挡层上电镀的临界电流密度。 调理可以包括阴极预处理或氢或氢/氦混合物中的等离子体预处理。 在一个方面，将基材表面浸入酸性电镀浴中并施加成核波形以形成种子层。 另一方面，将衬底浸入包括络合的铜离子的中性或碱性铜溶液中。

    Sol-gel based antireflective coatings using alkyltrialkoxysilane binders having low refractive index and high durability
    27.
    发明授权
    Sol-gel based antireflective coatings using alkyltrialkoxysilane binders having low refractive index and high durability 有权
    使用具有低折射率和高耐久性的烷基三烷氧基硅烷粘合剂的溶胶 - 凝胶基抗反射涂层

    公开(公告)号：US09109121B2

    公开(公告)日：2015-08-18

    申请号：US13273007

    申请日：2011-10-13

    Applicant: Nikhil D. Kalyankar ,  Zhi-Wen Sun ,  Jeroen Van Duren ,  Mark Lewis ,  Liang Liang

    Inventor： Nikhil D. Kalyankar ,  Zhi-Wen Sun ,  Jeroen Van Duren ,  Mark Lewis ,  Liang Liang

    IPC: C03C17/00 ,  C03C17/22 ,  C03C17/30 ,  C09D1/00 ,  C09D5/00 ,  C09D7/12 ,  G02B1/115 ,  C08K3/36

    CPC classification number: C09D1/00 ,  C03C17/008 ,  C03C17/22 ,  C03C17/30 ,  C08K3/36 ,  C09D5/006 ,  C09D7/61 ,  C09D7/67 ,  G02B1/115

    Abstract: Methods and compositions for forming porous low refractive index coatings on substrates are provided. The method comprises coating a substrate with a sol-formulation comprising silica based nanoparticles and an alkyltrialkoxysilane based binder. Use of the alkyltrialkoxysilane based binder results in a porous low refractive index coating having bimodal pore distribution including mesopores formed from particle packing and micropores formed from the burning off of organics including the alkyl chain covalently bonded to the silicon. The mass ratio of binder to particles may vary from 0.1 to 20. Porous coatings formed according to the embodiments described herein demonstrate good optical properties (e.g. a low refractive index) while maintaining good mechanical durability due to the presence of a high amount of binder and a close pore structure.

    Abstract translation: 提供了在基底上形成多孔低折射率涂层的方法和组合物。 该方法包括用包含二氧化硅基纳米颗粒和烷基三烷氧基硅烷基粘合剂的溶胶制剂涂覆基材。 使用烷基三烷氧基硅烷基粘合剂导致具有双峰孔分布的多孔低折射率涂层，包括由颗粒填充形成的介孔和由共价键合到硅上的烷基链的有机物燃烧形成的微孔。 粘合剂与颗粒的质量比可以在0.1至20之间变化。根据本文所述实施方案形成的多孔涂层表现出良好的光学性能（例如低折射率），同时由于存在大量粘合剂而保持良好的机械耐久性， 密闭孔结构。

    Method of generating high purity bismuth oxide
    29.
    发明授权
    Method of generating high purity bismuth oxide 有权
    产生高纯铋氧化物的方法

    公开(公告)号：US08747626B2

    公开(公告)日：2014-06-10

    申请号：US13307301

    申请日：2011-11-30

    Applicant: Guowen Ding ,  Mohd Fadzli Anwar Hassan ,  Hien Minh Huu Le ,  Zhi-Wen Sun

    Inventor： Guowen Ding ,  Mohd Fadzli Anwar Hassan ,  Hien Minh Huu Le ,  Zhi-Wen Sun

    IPC: C23C14/08 ,  C23C14/58

    CPC classification number: C23C14/086 ,  C23C14/024 ,  C23C14/5806 ,  Y10T428/12549 ,  Y10T428/265

    Abstract: A method for forming and protecting high quality bismuth oxide films comprises depositing a transparent thin film on a substrate comprising one of Si, alkali metals, or alkaline earth metals. The transparent thin film is stable at room temperature and at higher temperatures and serves as a diffusion barrier for the diffusion of impurities from the substrate into the bismuth oxide. Reactive sputtering, sputtering from a compound target, or reactive evaporation are used to deposit a bismuth oxide film above the diffusion barrier.

    Abstract translation: 用于形成和保护高质量氧化铋膜的方法包括在包含Si，碱金属或碱土金属之一的衬底上沉积透明薄膜。 透明薄膜在室温和较高温度下是稳定的，并且用作扩散阻挡层，用于将杂质从基底扩散到氧化铋中。 使用反应溅射，来自化合物靶的溅射或反应性蒸发来在扩散阻挡层上沉积氧化铋膜。

    SEED LAYER FOR ZnO AND DOPED-ZnO THIN FILM NUCLEATION AND METHODS OF SEED LAYER DEPOSITION
    30.
    发明申请
    SEED LAYER FOR ZnO AND DOPED-ZnO THIN FILM NUCLEATION AND METHODS OF SEED LAYER DEPOSITION 审中-公开
    用于ZnO和掺杂的ZnO薄膜晶核的种子层和种子层沉积的方法

    公开(公告)号：US20140048013A1

    公开(公告)日：2014-02-20

    申请号：US13588764

    申请日：2012-08-17

    Applicant: Guowen Ding ,  Hien Minh Huu Le ,  Zhi-Wen Sun

    Inventor： Guowen Ding ,  Mohd Fadzli Anwar Hassan ,  Hien Minh Huu Le ,  Zhi-Wen Sun

    IPC: C30B25/06 ,  C30B23/02 ,  C30B25/02 ,  C30B19/00

    CPC classification number: C30B33/005 ,  C30B23/025 ,  C30B25/18 ,  C30B29/16 ,  G02F1/13439

    Abstract: Zinc oxide layer, including pure zinc oxide and doped zinc oxide, can be deposited with preferred crystal orientation and improved electrical conductivity by employing a seed layer comprising a metallic element. By selecting metallic elements that can easily crystallized at low temperature on glass substrates, together with possessing preferred crystal orientations and sizes, zinc oxide layer with preferred crystal orientation and large grain size can be formed, leading to potential optimization of transparent conductive oxide layer stacks.

    Abstract translation: 包括纯氧化锌和掺杂的氧化锌的氧化锌层可以通过采用包含金属元素的种子层而沉积具有优选的晶体取向和改进的导电性。 通过选择可以在玻璃基板上容易地在低温下结晶的金属元素，并且具有优选的晶体取向和尺寸，可以形成具有优选晶体取向和大晶粒尺寸的氧化锌层，导致透明导电氧化物层叠层的潜在优化。

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