公开(公告)号：US20180261500A1

公开(公告)日：2018-09-13

申请号：US15452394

申请日：2017-03-07

Applicant: APPLIED MATERIALS, INC.

Inventor： Geetika Bajaj ,  Tapash Chakraborty ,  Prerna Sonthalia Goradia ,  Robert Jan Visser ,  Bhaskar Kumar ,  Deenesh Padhi

IPC: H01L21/768 ,  H01L21/32

Abstract: Methods of discouraging poreseal deposition on metal (e.g. copper) at the bottom of a via during a poresealing process are described. A self-assembled monolayer (SAM) is selectively formed on the exposed metal surface and prevents or discourages formation of poreseal on the metal. The SAM is selectively formed by exposing a patterned substrate to a SAM molecule which preferentially binds to exposed metal surfaces rather than exposed dielectric surfaces. The selected SAM molecules tend to not bind to low-k films. The SAM and SAM molecule are also chosen so the SAM tolerates subsequent processing at relatively high processing temperatures above 140° C. or 160° C. Aliphatic or aromatic SAM molecules with thiol head moieties may be used to form the SAM.

公开(公告)号：US09780223B2

公开(公告)日：2017-10-03

申请号：US15210637

申请日：2016-07-14

Applicant: Applied Materials, Inc.

Inventor： Kaushal K. Singh ,  Robert Jan Visser ,  Bhaskar Kumar

IPC: H01L21/00 ,  H01L29/786 ,  B82Y30/00 ,  C23C16/30 ,  C23C16/56 ,  H01L21/02 ,  H01L31/0224 ,  H01L31/0352 ,  H01L31/072 ,  H01L31/075 ,  H01L31/18 ,  H01L51/42 ,  B82Y10/00 ,  H01L21/324 ,  H01L27/12 ,  H01L29/207 ,  H01L29/45 ,  H01L29/66 ,  H01L51/00

CPC classification number: H01L29/78681 ,  B82Y10/00 ,  B82Y30/00 ,  C23C16/301 ,  C23C16/56 ,  H01L21/0237 ,  H01L21/02491 ,  H01L21/02546 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02601 ,  H01L21/0262 ,  H01L21/02628 ,  H01L21/02631 ,  H01L21/3245 ,  H01L27/1225 ,  H01L27/127 ,  H01L29/207 ,  H01L29/454 ,  H01L29/66742 ,  H01L29/78618 ,  H01L29/78696 ,  H01L31/022425 ,  H01L31/035227 ,  H01L31/072 ,  H01L31/075 ,  H01L31/184 ,  H01L31/1864 ,  H01L51/0048 ,  H01L51/424 ,  Y02E10/544 ,  Y02E10/548 ,  Y02E10/549 ,  Y02P70/521

Abstract: Embodiments of the invention provide a method of forming a group III-V material utilized in thin film transistor devices. In one embodiment, a gallium arsenide based (GaAs) layer with or without dopants formed from a solution based precursor may be utilized in thin film transistor devices. The gallium arsenide based (GaAs) layer formed from the solution based precursor may be incorporated in thin film transistor devices to improve device performance and device speed. In one embodiment, a thin film transistor structure includes a gate insulator layer disposed on a substrate, a GaAs based layer disposed over the gate insulator layer, and a source-drain metal electrode layer disposed adjacent to the GaAs based layer.

公开(公告)号：US09252392B2

公开(公告)日：2016-02-02

申请号：US14203426

申请日：2014-03-10

Applicant: Applied Materials, Inc.

Inventor： Bhaskar Kumar ,  Dieter Haas

IPC: H01L35/24 ,  H01L51/00 ,  H01L51/40 ,  H01L21/31 ,  H01L21/469 ,  H01L51/52

CPC classification number: H01L51/5253

Abstract: A method and apparatus for depositing a multilayer barrier structure is disclosed herein. In one embodiment, a thin barrier layer formed over an organic semiconductor includes a non-conformal organic layer, an inorganic layer formed over the non-conformal organic layer, a metallic layer formed over the inorganic layer and a second organic layer formed over the metallic layer. In another embodiment, a method of depositing a barrier layer includes forming an organic semiconductor device over the exposed surface of a substrate, depositing an inorganic layer using CVD, depositing a metallic layer comprising one or more metal oxide or metal nitride layers over the inorganic layer by ALD, each of the metal oxide or metal nitride layers comprising a metal, wherein the metal is selected from the group consisting of aluminum, hafnium, titanium, zirconium, silicon or combinations thereof and depositing an organic layer over the metallic layer.

Abstract translation: 本文公开了一种用于沉积多层阻挡结构的方法和装置。 在一个实施例中，形成在有机半导体上的薄势垒层包括非共形有机层，在非保形有机层上形成的无机层，形成在无机层上的金属层和形成在金属上的第二有机层 层。 在另一个实施例中，沉积阻挡层的方法包括在衬底的暴露表面上形成有机半导体器件，使用CVD沉积无机层，在无机层上沉积包含一个或多个金属氧化物或金属氮化物层的金属层 通过ALD，每个金属氧化物或金属氮化物层包含金属，其中金属选自铝，铪，钛，锆，硅或其组合，并在金属层上沉积有机层。

公开(公告)号：US12142468B2

公开(公告)日：2024-11-12

申请号：US17460900

申请日：2021-08-30

Applicant: Applied Materials, Inc.

Inventor： Vinayak Vishwanath Hassan ,  Bhaskar Kumar ,  Meng Cai ,  Sowjanya Musunuru ,  Kaushik Alayavalli ,  Andrew Nguyen

IPC: H01J37/32 ,  B24B7/22 ,  C23C16/44

Abstract: Exemplary methods of manufacturing a semiconductor cover wafer may include sintering aluminum nitride particles into a substrate characterized by a thickness and characterized by a disc shape. The methods may include grinding a surface of the substrate to reduce the thickness to less than or about 2 mm. The methods may include polishing the surface of the substrate to reduce a roughness. The methods may include annealing the substrate at a temperature of greater than or about 800° C. for a time period of greater than or about 60 minutes.

公开(公告)号：US11721545B2

公开(公告)日：2023-08-08

申请号：US17035107

申请日：2020-09-28

Applicant: Applied Materials, Inc.

Inventor： Anup Kumar Singh ,  Rick Kustra ,  Vinayak Vishwanath Hassan ,  Bhaskar Kumar ,  Krishna Nittala ,  Pramit Manna ,  Kaushik Comandoor Alayavalli ,  Ganesh Balasubramanian

IPC: H01L21/02 ,  H01L21/033 ,  H01J37/32 ,  B08B7/00 ,  C23C16/505 ,  C23C16/26 ,  C23C16/44

CPC classification number: H01L21/02274 ,  B08B7/0035 ,  C23C16/26 ,  C23C16/4405 ,  C23C16/505 ,  H01J37/3244 ,  H01J37/32082 ,  H01J37/32862 ,  H01L21/02115 ,  H01L21/0332

Abstract: Embodiments of the present disclosure generally relate to methods of depositing carbon film layers greater than 3,000 Å in thickness over a substrate and surface of a lid of a chamber using dual frequency, top, sidewall and bottom sources. The method includes introducing a gas to a processing volume of a chamber. A first radiofrequency (RF) power is provided having a first frequency of about 40 MHz or greater to a lid of the chamber. A second RF power is provided having a second frequency to a bias electrode disposed in a substrate support within the processing volume. The second frequency is about 10 MHz to about 40 MHz. An additional third RF power is provided having lower frequency of about 400 kHz to about 2 MHz to the bias electrode.

公开(公告)号：US11545376B2

公开(公告)日：2023-01-03

申请号：US16940957

申请日：2020-07-28

Applicant: Applied Materials, Inc.

Inventor： Sidharth Bhatia ,  Edward P. Hammond, IV ,  Bhaskar Kumar ,  Anup Kumar Singh ,  Vivek Bharat Shah ,  Ganesh Balasubramanian

IPC: H01J37/32 ,  H01L21/67 ,  H01L21/3065 ,  G06T7/00

Abstract: Embodiments of the present disclosure relate to a method and an apparatus for monitoring plasma behavior inside a plasma processing chamber. In one example, a method for monitoring plasma behavior includes acquiring at least one image of a plasma, and determining a plasma parameter based on the at least one image.

公开(公告)号：US11515191B2

公开(公告)日：2022-11-29

申请号：US16598665

申请日：2019-10-10

Applicant: Applied Materials, Inc.

Inventor： Vivek B. Shah ,  Bhaskar Kumar ,  Ganesh Balasubramanian

IPC: H01L21/683 ,  H05B1/02 ,  H01L21/67

Abstract: Embodiments disclosed herein may include a heater pedestal. In an embodiment, the heater pedestal may comprise a heater pedestal body and a conductive mesh embedded in the heater pedestal. In an embodiment, the conductive mesh is electrically coupled to a voltage source In an embodiment, the heater pedestal may further comprise a support surface on the heater pedestal body. In an embodiment, the support surface comprises a plurality of pillars extending out from the heater pedestal body and arranged in concentric rings. In an embodiment pillars in an outermost concentric ring have a height that is greater than a height of pillars in an innermost concentric ring.

公开(公告)号：US20210351020A1

公开(公告)日：2021-11-11

申请号：US17381162

申请日：2021-07-20

Applicant: Applied Materials, Inc.

Inventor： Vivek B. Shah ,  Vinayak Vishwanath Hassan ,  Bhaskar Kumar ,  Ganesh Balasubramanian

IPC: H01J37/32

Abstract: Apparatus and methods for generating a flow of radicals are provided. An ion blocker is positioned a distance from a faceplate of a remote plasma source. The ion blocker has openings to allow the plasma to flow through. The ion blocker is polarized relative to a showerhead positioned on an opposite side of the ion blocker so that there are substantially no plasma gas ions passing through the showerhead.

公开(公告)号：US11120976B2

公开(公告)日：2021-09-14

申请号：US16927618

申请日：2020-07-13

Applicant: Applied Materials, Inc.

Inventor： Bhaskar Kumar ,  Anup Kumar Singh ,  Vivek Bharat Shah ,  Sidharth Bhatia ,  Ganesh Balasubramanian

IPC: H01J37/32 ,  H01L21/67

Abstract: A method and apparatus for operating a plasma processing chamber includes performing a plasma process at a process pressure and a pressure power to generate a plasma. A first ramping-down stage starts in which the process power and the process pressure are ramped down substantially simultaneously to an intermediate power level and an intermediate pressure level, respectively. The intermediate power level and intermediate pressure level are preselected so as to raise a plasma sheath boundary above a threshold height from a surface of a substrate. A purge gas is flowed from a showerhead assembly at a sufficiently high rate to sweep away contaminant particles trapped in the plasma such that one or more contaminant particles move outwardly of an edge of the substrate. A second ramping-down stage starts where the intermediate power level and the intermediate pressure level decline to a zero level and a base pressure, respectively.

公开(公告)号：US10892143B2

公开(公告)日：2021-01-12

申请号：US15718087

申请日：2017-09-28

Applicant: Applied Materials, Inc.

Inventor： Vivek Bharat Shah ,  Bhaskar Kumar ,  Anup Kumar Singh ,  Ganesh Balasubramanian

IPC: H01J37/32 ,  C23C16/44 ,  B08B9/00 ,  B08B5/00 ,  B08B7/00 ,  B08B9/08 ,  C23C16/24 ,  C23C16/50

Abstract: Implementations of the present disclosure provide methods for treating a processing chamber. In one implementation, the method includes purging a 300 mm substrate processing chamber, without the presence of a substrate, by flowing a purging gas into the substrate processing chamber at a flow rate of about 0.14 sccm/mm2 to about 0.33 sccm/mm2 and a chamber pressure of about 1 Torr to about 30 Torr, with a throttle valve of a vacuum pump system of the substrate processing chamber in a fully opened position, wherein the purging gas is chemically reactive with deposition residue on exposed surfaces of the substrate processing chamber.