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47 条记录 (耗时 0.033 秒)

    POWER MANAGEMENT SYSTEM AND METHOD THEREOF
    22.
    发明申请
    POWER MANAGEMENT SYSTEM AND METHOD THEREOF 审中-公开
    电力管理系统及其方法

    公开(公告)号：US20120274263A1

    公开(公告)日：2012-11-01

    申请号：US13236616

    申请日：2011-09-19

    申请人： Kuo-Sen Kung ,  Chun-Hao Tu ,  Ren-Hong Jhan ,  Yu-Jung Liu ,  Wei-Cheng Wu ,  Jiun-Jye Chang ,  Po-Lun Chen ,  Wei-Jhih Lian ,  Liu-Yi Huang ,  Lin-Yuan You ,  Ying-Hung Lin ,  Wei-Ming Lee

    发明人： Kuo-Sen Kung ,  Chun-Hao Tu ,  Ren-Hong Jhan ,  Yu-Jung Liu ,  Wei-Cheng Wu ,  Jiun-Jye Chang ,  Po-Lun Chen ,  Wei-Jhih Lian ,  Liu-Yi Huang ,  Lin-Yuan You ,  Ying-Hung Lin ,  Wei-Ming Lee

    IPC分类号： H02J7/00 ,  G05F3/02

    CPC分类号： G05F1/67 ,  Y02E10/58

    摘要： A system for power management electrically connected to a solar cell is provided. The system for power management includes a photo-sensor, a controller electrically connected to the photo-sensor, and a power manager. The photo-sensor detects an illumination (illuminance or irradiance) of an environment where the solar cell is located. A look-up table of illumination vs. maximum output power is built in the controller, wherein a corresponding maximum output power is determined by the controller according to the illumination detected by the photo-sensor. The power manager is electrically connected to the controller and the solar cell. The power manager controls the output current of the solar cell so as to equalize an output power of solar cell and the corresponding maximum output power. A method for power management is also provided.

    摘要翻译： 提供一种与太阳能电池电连接的电力管理系统。 用于电源管理的系统包括光电传感器，电连接到光电传感器的控制器和电源管理器。 光电传感器检测太阳能电池所处的环境的照度（照度或照度）。 在控制器中内置有照明与最大输出功率的查找表，其中相应的最大输出功率由控制器根据光传感器检测到的照度来确定。 电源管理器电连接到控制器和太阳能电池。 功率管理器控制太阳能电池的输出电流，以使太阳能电池的输出功率和相应的最大输出功率相等。 还提供了一种用于电源管理的方法。

    Integrated structure for MEMS device and semiconductor device and method of fabricating the same
    24.
    发明申请
    Integrated structure for MEMS device and semiconductor device and method of fabricating the same 有权
    MEMS器件和半导体器件的集成结构及其制造方法

    公开(公告)号：US20090243004A1

    公开(公告)日：2009-10-01

    申请号：US12056286

    申请日：2008-03-27

    申请人： Bang-Chiang Lan ,  Li-Hsun Ho ,  Wei-Cheng Wu ,  Hui-Min Wu ,  Min Chen ,  Tzung-I Su ,  Chien-Hsin Huang

    发明人： Bang-Chiang Lan ,  Li-Hsun Ho ,  Wei-Cheng Wu ,  Hui-Min Wu ,  Min Chen ,  Tzung-I Su ,  Chien-Hsin Huang

    IPC分类号： H01L29/84 ,  H01L21/00

    CPC分类号： B81C1/00246 ,  B81C1/00801 ,  B81C2201/014 ,  B81C2203/0714 ,  B81C2203/0742 ,  B81C2203/0792 ,  H01L27/0688

    摘要： The present invention relates to an integrated structure for a MEMS device and a semiconductor device and a method of fabricating the same, in which an etch stopping device is included on a substrate between the MEMS device and the semiconductor device for protecting the semiconductor device from lateral damage when an oxide releasing process is performed to fabricate the MEMS device. The etch stopping device has various profiles and is selectively formed by an individual fabricating process or is simultaneously formed with the semiconductor device in the same fabricating process. It is a singular structure or a combined stacked multilayered structure, for example, a plurality of rows of pillared etch-resistant material plugs, one or a plurality of wall-shaped etch-resistant material plugs, or a multilayered structure of a stack of which and an etch-resistant material layer.

    摘要翻译： 本发明涉及用于MEMS器件和半导体器件的集成结构及其制造方法，其中在MEMS器件和半导体器件之间的衬底上包括蚀刻停止器件，用于保护半导体器件免受横向 执行氧化物释放处理以制造MEMS器件时的损坏。 蚀刻停止装置具有各种形状，并且通过单独的制造工艺选择性地形成，或者在相同的制造工艺中与半导体器件同时形成。 它是单一结构或组合堆叠的多层结构，例如多排支撑的耐蚀刻材料插塞，一个或多个壁状耐蚀刻材料插塞或其堆叠的多层结构 和耐蚀刻材料层。

    Pulse type layer-ID detector for 3D-IC and method of the same
    25.
    发明授权
    Pulse type layer-ID detector for 3D-IC and method of the same 有权
    用于3D-IC的脉冲型层ID检测器及其方法

    公开(公告)号：US08829887B2

    公开(公告)日：2014-09-09

    申请号：US12896429

    申请日：2010-10-01

    申请人： Ming-Pin Chen ,  Meng-Fan Chang ,  Wei-Cheng Wu

    发明人： Ming-Pin Chen ,  Meng-Fan Chang ,  Wei-Cheng Wu

    IPC分类号： G01R31/28

    CPC分类号： H03K21/023 ,  H03K21/026 ,  H03K21/38

    摘要： A 3D-IC detector for each layer of a stacked device comprises a pulse generator to receive an initial signal and generate a pulse-in signal to a next stage detector. A latch is coupled to the pulse generator to receive an output signal from the pulse generator and generate a layer identifying signal. A counter is coupled to previous stage detector and the initial signal to perform a counting operation; and an adder coupled to the counter to add a number to a counting output from the counter and input added signal to the pulse generator.

    摘要翻译： 用于层叠器件的每层的3D-IC检测器包括用于接收初始信号并向下一级检测器产生脉冲信号的脉冲发生器。 锁存器耦合到脉冲发生器以接收来自脉冲发生器的输出信号并产生层识别信号。 计数器耦合到前一级检测器和初始信号以执行计数操作; 以及加法器，其耦合到计数器以向计数器的计数输出添加数字，并将附加的信号输入到脉冲发生器。

    CONTROL SCHEME FOR 3D MEMORY IC
    26.
    发明申请
    CONTROL SCHEME FOR 3D MEMORY IC 有权
    3D存储IC控制方案

    公开(公告)号：US20130148402A1

    公开(公告)日：2013-06-13

    申请号：US13524980

    申请日：2012-06-15

    申请人： Meng-Fan CHANG ,  Wei-Cheng Wu ,  Tsung-Hsien Huang ,  Chien-Yuan Chen

    发明人： Meng-Fan CHANG ,  Wei-Cheng Wu ,  Tsung-Hsien Huang ,  Chien-Yuan Chen

    IPC分类号： G11C5/06

    CPC分类号： G11C29/023 ,  G11C8/08 ,  G11C11/417 ,  G11C29/028 ,  G11C29/04 ,  G11C29/26 ,  G11C2029/1202 ,  G11C2029/1206 ,  G11C2029/2602

    摘要： The present invention discloses a control scheme for 3D memory IC that includes a master chip and at least one slave chip. The master chip includes a main memory core, a first local timer, an I/O buffer, a first pad and a second pad. The at least one slave chip is stacked with the master chip. Each of the slave chip includes a slave memory core, a second local timer and a third pad. A first TSV is coupled to the first pad and the third pad. A logic control circuit layer includes a logic control circuit and a fourth pad, and the logic control circuit is coupled to the fourth pad. A second TSV is coupled to the second pad and the fourth pad.

    摘要翻译： 本发明公开了一种包括主芯片和至少一个从芯片的3D存储器IC的控制方案。 主芯片包括主存储器核心，第一本地定时器，I / O缓冲器，第一焊盘和第二焊盘。 至少一个从芯片与主芯片堆叠。 每个从芯片包括从存储器核心，第二本地定时器和第三焊盘。 第一TSV耦合到第一焊盘和第三焊盘。 逻辑控制电路层包括逻辑控制电路和第四焊盘，逻辑控制电路耦合到第四焊盘。 第二TSV耦合到第二焊盘和第四焊盘。

    MEMS device and method of making the same
    27.
    发明申请
    MEMS device and method of making the same 有权
    MEMS器件及其制作方法

    公开(公告)号：US20100002894A1

    公开(公告)日：2010-01-07

    申请号：US12168057

    申请日：2008-07-03

    申请人： Bang-Chiang Lan ,  Li-Hsun Ho ,  Wei-Cheng Wu ,  Hui-Min Wu ,  Min Chen ,  Chien-Hsin Huang ,  Ming-I Wang

    发明人： Bang-Chiang Lan ,  Li-Hsun Ho ,  Wei-Cheng Wu ,  Hui-Min Wu ,  Min Chen ,  Chien-Hsin Huang ,  Ming-I Wang

    IPC分类号： H04R7/02 ,  B81C5/00 ,  H05K5/02

    CPC分类号： H04R31/00 ,  H04R2201/003 ,  Y10T29/49005

    摘要： A MEMS device includes a vent hole structure and a MEMS structure disposed on a same side of a substrate. The vent hole structure adjoins the MEMS structure with an etch stop structure therebetween. The MEMS structure includes a chamber, the vent hole structure includes a metal layer having at least a hole thereon as a vent hole to connect the chamber of the MEMS structure through the etch stop structure. Accordingly, the MEMS device has a lateral vent hole. Furthermore, as the vent hole structure and the MEMS structure are disposed on the same side of the substrate, the manufacturing process is convenient and timesaving.

    摘要翻译： MEMS器件包括设置在基板的同一侧上的通气孔结构和MEMS结构。 通气孔结构与MEMS结构相邻，其间具有蚀刻停止结构。 MEMS结构包括腔室，通气孔结构包括金属层，其上具有至少一个孔，作为通气孔，以通过蚀刻停止结构连接MEMS结构的室。 因此，MEMS器件具有侧向通气孔。 此外，由于通气孔结构和MEMS结构设置在基板的同一侧，所以制造过程方便且节省时间。

    Power tracking device and power tracking method
    29.
    发明授权
    Power tracking device and power tracking method 有权
    功率跟踪装置和功率跟踪方法

    公开(公告)号：US09128506B2

    公开(公告)日：2015-09-08

    申请号：US13600531

    申请日：2012-08-31

    申请人： Kuo-Sen Kung ,  Chun-Hao Tu ,  Ren-Hong Jhan ,  Wei-Cheng Wu ,  Ya-Zhi Hsiao ,  Ting-Chun Lin ,  Jen-Pei Tseng ,  Yu-Jung Liu ,  Jiun-Jye Chang

    发明人： Kuo-Sen Kung ,  Chun-Hao Tu ,  Ren-Hong Jhan ,  Wei-Cheng Wu ,  Ya-Zhi Hsiao ,  Ting-Chun Lin ,  Jen-Pei Tseng ,  Yu-Jung Liu ,  Jiun-Jye Chang

    IPC分类号： G05F5/00 ,  G05F1/67

    CPC分类号： G05F1/67

    摘要： A power tracking device and a power tracking method is disclosed herein. The power tracking device includes a power voltage setting circuit, a switch, a switching signal circuit, and a voltage memory circuit. The switching signal circuit is configured for sending a first control signal to the switch. When the switch receives the first control signal and electrically isolates the power source and the power voltage setting circuit, the voltage memory circuit stores an open circuit voltage of the power source and sends a setting voltage relative to the open circuit voltage, and when the switch receives the first control signal and electrically connects the power source and the power voltage setting circuit, the power voltage setting circuit sets an output voltage of the power source to correspond with the setting voltage.

    摘要翻译： 本文公开了功率跟踪装置和功率跟踪方法。 功率跟踪装置包括电源电压设定电路，开关，开关信号电路和电压存储电路。 开关信号电路被配置为向开关发送第一控制信号。 当开关接收到第一控制信号并且电隔离电源和电源电压设置电路时，电压存储电路存储电源的开路电压并发送相对于开路电压的设定电压，并且当开关 接收第一控制信号并电连接电源和电源电压设定电路，电源电压设定电路将电源的输出电压设定为与设定电压对应。

    POWER TRACKING DEVICE AND POWER TRACKING METHOD
    30.
    发明申请
    POWER TRACKING DEVICE AND POWER TRACKING METHOD 有权
    电力跟踪装置和电力跟踪方法

    公开(公告)号：US20130285636A1

    公开(公告)日：2013-10-31

    申请号：US13600531

    申请日：2012-08-31

    申请人： Kuo-Sen KUNG ,  Chun-Hao Tu ,  Ren-Hong Jhan ,  Wei-Cheng Wu ,  Ya-Zhi Hsiao ,  Ting-Chun Lin ,  Jen-Pei Tseng ,  Yu-Jung Liu ,  Jiun-Jye Chang

    发明人： Kuo-Sen KUNG ,  Chun-Hao Tu ,  Ren-Hong Jhan ,  Wei-Cheng Wu ,  Ya-Zhi Hsiao ,  Ting-Chun Lin ,  Jen-Pei Tseng ,  Yu-Jung Liu ,  Jiun-Jye Chang

    IPC分类号： G05F5/00

    CPC分类号： G05F1/67

    摘要： A power tracking device and a power tracking method is disclosed herein. The power tracking device includes a power voltage setting circuit, a switch, a switching signal circuit, and a voltage memory circuit. The switching signal circuit is configured for sending a first control signal to the switch. When the switch receives the first control signal and electrically isolates the power source and the power voltage setting circuit, the voltage memory circuit stores an open circuit voltage of the power source and sends a setting voltage relative to the open circuit voltage, and when the switch receives the first control signal and electrically connects the power source and the power voltage setting circuit, the power voltage setting circuit sets an output voltage of the power source to correspond with the setting voltage.

    摘要翻译： 本文公开了功率跟踪装置和功率跟踪方法。 功率跟踪装置包括电源电压设定电路，开关，开关信号电路和电压存储电路。 开关信号电路被配置为向开关发送第一控制信号。 当开关接收到第一控制信号并且电隔离电源和电源电压设置电路时，电压存储电路存储电源的开路电压并发送相对于开路电压的设定电压，并且当开关 接收第一控制信号并电连接电源和电源电压设定电路，电源电压设定电路将电源的输出电压设定为与设定电压对应。