公开(公告)号：US20170077258A1

公开(公告)日：2017-03-16

申请号：US15278925

申请日：2016-09-28

申请人： International Business Machines Corporation ,  GLOBALFOUNDRIES Inc.

发明人： Kangguo Cheng ,  Ruilong Xie ,  Tenko Yamashita

IPC分类号： H01L29/49 ,  H01L21/768 ,  H01L23/535

CPC分类号： H01L29/4991 ,  H01L21/76805 ,  H01L21/7682 ,  H01L21/76831 ,  H01L21/76843 ,  H01L21/76895 ,  H01L21/76897 ,  H01L29/66568

摘要： Techniques for preventing leakage of contact material into air-gap spacers during contact formation. For example, a method comprises forming a contact trench on a semiconductor structure over an air-gap spacer and depositing a liner in the contact trench. The liner deposition material fills a portion of the air-gap spacer pinching off the contact trench to the air-gap spacer.

公开(公告)号：US20170053997A1

公开(公告)日：2017-02-23

申请号：US14829843

申请日：2015-08-19

申请人： International Business Machines Corporation ,  GlobalFoundries, Inc.

发明人： Kangguo Cheng ,  Ruilong Xie ,  Tenko Yamashita

IPC分类号： H01L29/66 ,  H01L29/417 ,  H01L29/78

CPC分类号： H01L29/66553 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/0228 ,  H01L21/28079 ,  H01L21/76897 ,  H01L29/41791 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/785

摘要： A method of making a semiconductor device includes patterning a fin in a substrate; forming a gate between source/drain regions over the substrate, the gate having a dielectric spacer along a sidewall; removing a portion of the dielectric spacer and filling with a metal oxide to form a spacer having a first spacer portion and a second spacer portion; forming a source/drain contact over at least one of the source/drain regions; recessing the source/drain contact and forming a via contact over the source/drain contact; and forming a gate contact over the gate, the gate contact having a first gate contact portion contacting the gate and a second gate contact portion positioned over the first gate contact portion; wherein the first spacer portion isolates the first gate contact portion from the source/drain contact, and the second spacer portion isolates the second gate contact portion from the source/drain contact.

摘要翻译： 制造半导体器件的方法包括：在衬底中图形化翅片; 在衬底上的源极/漏极区域之间形成栅极，栅极具有沿侧壁的电介质间隔物; 去除电介质间隔物的一部分并填充金属氧化物以形成具有第一间隔部分和第二间隔部分的间隔物; 在所述源/漏区中的至少一个上形成源极/漏极接触; 凹陷源极/漏极接触并在源极/漏极接触件上形成通孔接触; 以及在所述栅极上形成栅极接触，所述栅极接触具有接触所述栅极的第一栅极接触部分和位于所述第一栅极接触部分上方的第二栅极接触部分; 其中所述第一间隔部分将所述第一栅极接触部分与所述源极/漏极接触部隔离，并且所述第二间隔部分将所述第二栅极接触部分与所述源极/漏极接触部隔离。

公开(公告)号：US20170047411A1

公开(公告)日：2017-02-16

申请号：US14824349

申请日：2015-08-12

申请人： International Business Machines Corporation ,  GlobalFoundries, Inc.

发明人： Kangguo Cheng ,  Zuoguang Liu ,  Ruilong Xie ,  Tenko Yamashita

IPC分类号： H01L29/417 ,  H01L29/66 ,  H01L29/78 ,  H01L29/06 ,  H01L29/08 ,  H01L21/285 ,  H01L21/324 ,  H01L29/45 ,  H01L27/088 ,  H01L21/8234 ,  H01L21/02

CPC分类号： H01L29/66636 ,  H01L21/02164 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/02178 ,  H01L21/28518 ,  H01L21/324 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823468 ,  H01L21/823481 ,  H01L27/0886 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/161 ,  H01L29/165 ,  H01L29/24 ,  H01L29/267 ,  H01L29/41791 ,  H01L29/45 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785 ,  H01L29/7851 ,  H01L2029/7858

摘要： A method of making a semiconductor device includes forming a fin in a substrate; depositing a first spacer material to form a first spacer around the fin; depositing a second spacer material to form a second spacer over the first spacer; recessing the first spacer and the second spacer; removing the first spacer; and performing an epitaxial growth process to form epitaxial growth on an end of the fin, along a sidewall of the fin, and adjacent to the fin.

公开(公告)号：US20170047256A1

公开(公告)日：2017-02-16

申请号：US14824360

申请日：2015-08-12

申请人： International Business Machines Corporation ,  GlobalFoundries, Inc.

发明人： Kangguo Cheng ,  Ruilong Xie ,  Tenko Yamashita

IPC分类号： H01L21/8234 ,  H01L29/66 ,  H01L27/088 ,  H01L29/45 ,  H01L29/417 ,  H01L29/78 ,  H01L21/283

CPC分类号： H01L21/28518 ,  H01L21/283 ,  H01L21/76897 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823475 ,  H01L27/0886 ,  H01L29/0847 ,  H01L29/41791 ,  H01L29/45 ,  H01L29/456 ,  H01L29/665 ,  H01L29/66795 ,  H01L29/7851 ,  H01L2029/7858

摘要： A method of making a semiconductor device includes forming a recessed fin in a substrate, the recessed fin being substantially flush with a surface of the substrate; performing an epitaxial growth process over the recessed fin to form a source/drain over the recessed fin; and disposing a conductive metal around the source/drain.

摘要翻译： 制造半导体器件的方法包括在衬底中形成凹形翅片，所述凹形翅片基本上与所述衬底的表面齐平; 在所述凹入的翅片上执行外延生长工艺以在所述凹入的翅片上形成源极/漏极; 并且在源极/漏极周围设置导电金属。

公开(公告)号：US20170040453A1

公开(公告)日：2017-02-09

申请号：US14817504

申请日：2015-08-04

申请人： International Business Machines Corporation ,  GlobalFoundries, Inc.

发明人： Rama Kambhampati ,  Junli Wang ,  Ruilong Xie ,  Tenko Yamashita

IPC分类号： H01L29/78 ,  H01L27/092 ,  H01L29/66 ,  H01L21/8238

CPC分类号： H01L27/0924 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823864 ,  H01L29/1054 ,  H01L29/16 ,  H01L29/161 ,  H01L29/66545 ,  H01L29/7848

摘要： A method for forming field effect transistors comprises forming a first dummy gate stack over a first fin, forming a second dummy gate stack over a second fin, depositing a first layer of spacer material on the first dummy gate stack, the first fin, the second dummy gate stack, and the second fin, patterning a first masking layer on the first dummy gate stack and the first fin, etching to remove portions of the first layer of spacer material and form a spacer adjacent to the second dummy gate stack, removing the first masking layer, epitaxially growing a silicon material on the second fin, depositing a layer of oxide material on the first layer of spacer material, the first epitaxial material and the second dummy gate stack, and depositing a second layer of spacer material on the layer of oxide material.

摘要翻译： 一种用于形成场效应晶体管的方法包括在第一鳍上形成第一虚拟栅极堆叠，在第二鳍片上形成第二虚拟栅极叠层，在第一伪栅极叠层上沉积第一层间隔物材料， 虚拟栅极堆叠和第二鳍片，在第一伪栅极堆叠和第一鳍片上构图第一掩模层，蚀刻以去除第一层间隔物材料的部分并形成邻近第二伪栅极叠层的间隔区， 第一掩模层，在所述第二鳍上外延生长硅材料，在所述第一隔离层材料层上沉积氧化物层，所述第一外延材料和所述第二伪栅极堆叠，以及在所述层上沉积第二隔离层材料层 的氧化物质。

公开(公告)号：US09548388B1

公开(公告)日：2017-01-17

申请号：US14817504

申请日：2015-08-04

申请人： International Business Machines Corporation ,  GlobalFoundries, Inc.

发明人： Rama Kambhampati ,  Junli Wang ,  Ruilong Xie ,  Tenko Yamashita

IPC分类号： H01L29/78 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/66

CPC分类号： H01L27/0924 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823864 ,  H01L29/1054 ,  H01L29/16 ,  H01L29/161 ,  H01L29/66545 ,  H01L29/7848

摘要： A method for forming field effect transistors comprises forming a first dummy gate stack over a first fin, forming a second dummy gate stack over a second fin, depositing a first layer of spacer material on the first dummy gate stack, the first fin, the second dummy gate stack, and the second fin, patterning a first masking layer on the first dummy gate stack and the first fin, etching to remove portions of the first layer of spacer material and form a spacer adjacent to the second dummy gate stack, removing the first masking layer, epitaxially growing a silicon material on the second fin, depositing a layer of oxide material on the first layer of spacer material, the first epitaxial material and the second dummy gate stack, and depositing a second layer of spacer material on the layer of oxide material.

摘要翻译： 一种用于形成场效应晶体管的方法包括在第一鳍上形成第一虚拟栅极堆叠，在第二鳍片上形成第二虚拟栅极叠层，在第一伪栅极叠层上沉积第一层间隔物材料， 虚拟栅极堆叠和第二鳍片，在第一伪栅极堆叠和第一鳍片上构图第一掩模层，蚀刻以去除第一层间隔物材料的部分并形成邻近第二伪栅极叠层的间隔区， 第一掩模层，在所述第二鳍上外延生长硅材料，在所述第一隔离层材料层上沉积氧化物层，所述第一外延材料和所述第二伪栅极堆叠，以及在所述层上沉积第二隔离层材料层 的氧化物质。

公开(公告)号：US20170012042A1

公开(公告)日：2017-01-12

申请号：US15157861

申请日：2016-05-18

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION ,  GLOBALFOUNDRIES INC.

发明人： Xiuyu Cai ,  Kangguo Cheng ,  Ali Khakifirooz ,  Ruilong Xie ,  Tenko Yamashita

IPC分类号： H01L27/088 ,  H01L29/06 ,  H01L29/66 ,  H01L29/417 ,  H01L27/02 ,  H01L29/78

CPC分类号： H01L27/0886 ,  H01L27/0207 ,  H01L29/0649 ,  H01L29/41791 ,  H01L29/6656 ,  H01L29/66795 ,  H01L29/6681 ,  H01L29/7848 ,  H01L29/785

摘要： A method of forming a semiconductor device that includes forming a plurality of semiconductor pillars. A dielectric spacer is formed between at least one set of adjacent semiconductor pillars. Semiconductor material is epitaxially formed on sidewalls of the adjacent semiconductor pillars, wherein the dielectric spacer obstructs a first portion of epitaxial semiconductor material formed on a first semiconductor pillar from merging with a second portion of epitaxial semiconductor material formed on a second semiconductor pillar.

摘要翻译： 一种形成包括形成多个半导体柱的半导体器件的方法。 在至少一组相邻的半导体柱之间形成介电间隔物。 半导体材料外延地形成在相邻半导体柱的侧壁上，其中电介质间隔物阻挡形成在第一半导体柱上的外延半导体材料的第一部分与形成在第二半导体柱上的第二部分外延半导体材料合并。

公开(公告)号：US20160365450A1

公开(公告)日：2016-12-15

申请号：US15208121

申请日：2016-07-12

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION ,  GLOBALFOUNDRIES INC.

发明人： Hyun-Jin Cho ,  Tenko Yamashita ,  Hui Zang

IPC分类号： H01L29/78 ,  H01L29/66 ,  H01L21/02 ,  H01L21/8238 ,  H01L29/49 ,  H01L29/423 ,  H01L27/092

CPC分类号： H01L29/512 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/28088 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823828 ,  H01L21/823842 ,  H01L21/823864 ,  H01L21/845 ,  H01L27/0922 ,  H01L27/0924 ,  H01L27/1211 ,  H01L29/42364 ,  H01L29/42376 ,  H01L29/4238 ,  H01L29/4958 ,  H01L29/4966 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/7851

摘要： A method of forming a gate structure for a semiconductor device that includes forming first spacers on the sidewalls of replacement gate structures that are present on a fin structure, wherein an upper surface of the first spacers is offset from an upper surface of the replacement gate structure, and forming at least second spacers on the first spacers and the exposed surfaces of the replacement gate structure. The method may further include substituting the replacement gate structure with a functional gate structure having a first width portion in a first space between adjacent first spacers, and a second width portion having a second width in a second space between adjacent second spacers, wherein the second width is greater than the first width.

公开(公告)号：US20160365346A1

公开(公告)日：2016-12-15

申请号：US14735984

申请日：2015-06-10

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION ,  GLOBALFOUNDRIES INC.

发明人： Hyun-Jin Cho ,  Tenko Yamashita ,  Hui Zang

IPC分类号： H01L27/092 ,  H01L29/423 ,  H01L29/49 ,  H01L29/78 ,  H01L29/66

CPC分类号： H01L29/512 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/28088 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823828 ,  H01L21/823842 ,  H01L21/823864 ,  H01L21/845 ,  H01L27/0922 ,  H01L27/0924 ,  H01L27/1211 ,  H01L29/42364 ,  H01L29/42376 ,  H01L29/4238 ,  H01L29/4958 ,  H01L29/4966 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/7851

摘要： A method of forming a gate structure for a semiconductor device that includes forming first spacers on the sidewalls of replacement gate structures that are present on a fin structure, wherein an upper surface of the first spacers is offset from an upper surface of the replacement gate structure, and forming at least second spacers on the first spacers and the exposed surfaces of the replacement gate structure. The method may further include substituting the replacement gate structure with a functional gate structure having a first width portion in a first space between adjacent first spacers, and a second width portion having a second width in a second space between adjacent second spacers, wherein the second width is greater than the first width.

摘要翻译： 一种形成用于半导体器件的栅极结构的方法，包括在存在于鳍状结构上的置换栅极结构的侧壁上形成第一间隔物，其中第一间隔物的上表面偏离替换栅极结构的上表面 并且在所述第一间隔物和所述替换栅极结构的所述暴露表面上形成至少第二间隔物。 该方法还可以包括用相邻的第一间隔件之间的第一空间中具有第一宽度部分的功能栅极结构代替替换栅极结构，以及在相邻的第二间隔物之间​​的第二空间中具有第二宽度的第二宽度部分，其中第二 宽度大于第一宽度。

公开(公告)号：US20160020335A1

公开(公告)日：2016-01-21

申请号：US14334950

申请日：2014-07-18

申请人： GLOBALFOUNDRIES Inc. ,  International Business Machines Corporation

发明人： Steven J. Bentley ,  Ajey Poovannummoottil Jacob ,  Chia-Yu Chen ,  Tenko Yamashita

IPC分类号： H01L29/808 ,  H01L29/45 ,  H01L29/66

CPC分类号： H01L29/495 ,  H01L21/0217 ,  H01L21/0228 ,  H01L21/02532 ,  H01L29/0847 ,  H01L29/1033 ,  H01L29/167 ,  H01L29/42376 ,  H01L29/45 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/6656 ,  H01L29/78

摘要： Embodiments of the present invention provide transistors with controlled junctions and methods of fabrication. A dummy spacer is used during the majority of front end of line (FEOL) processing. Towards the end of the FEOL processing, the dummy spacers are removed and replaced with a final spacer material. Embodiments of the present invention allow the use of a very low-k material, which is highly thermally-sensitive, by depositing it late in the flow. Additionally, the position of the gate with respect to the doped regions is highly controllable, while dopant diffusion is minimized through reduced thermal budgets. This allows the creation of extremely abrupt junctions whose surface position is defined using a sacrificial spacer. This spacer is then removed prior to final gate deposition, allowing a fixed gate overlap that is defined by the spacer thickness and any diffusion of the dopant species.

摘要翻译： 本发明的实施例提供具有受控结的晶体管和制造方法。 在大多数前端（FEOL）处理中使用虚拟间隔器。 在FEOL处理结束之后，去除虚拟间隔物并用最后的间隔物材料代替。 本发明的实施例允许使用非常低k的材料，其通过在流动中较晚沉积而具有高度热敏感性。 此外，栅极相对于掺杂区域的位置是高度可控的，而掺杂剂扩散通过减少的热预算被最小化。 这允许创建极其突出的接头，其表面位置使用牺牲隔离物限定。 然后在最终栅极沉积之前去除该间隔物，允许由间隔物厚度和掺杂剂物质的任何扩散限定的固定栅极重叠。