公开(公告)号：US20180293965A1

公开(公告)日：2018-10-11

申请号：US15482535

申请日：2017-04-07

Applicant: Intel Corporation

Inventor： BALAJI VEMBU ,  JASON TANNER ,  JOYDEEP RAY ,  ALTUG KOKER ,  ABHISHEK R. APPU ,  PATTABHIRAMAN K

IPC: G09G5/395 ,  G06F9/455 ,  G06T1/60 ,  G09G5/36 ,  G06T15/00 ,  H04N19/42 ,  G06T1/20 ,  G06T9/00

CPC classification number: G09G5/395 ,  G06F3/1423 ,  G06F9/452 ,  G06F9/45533 ,  G06T1/20 ,  G06T1/60 ,  G06T9/004 ,  G06T15/005 ,  G09G3/003 ,  G09G5/36 ,  G09G5/363 ,  G09G2340/02 ,  G09G2352/00 ,  G09G2360/08 ,  G09G2360/121 ,  G09G2370/022 ,  H04N19/42

Abstract: An apparatus and method are described for efficiently rendering an transmitting to a remote display. For example, one embodiment of a remote display apparatus comprises: a display engine to render a sequence of video images; an encoder to compress the sequence of video images to generate a sequence of compressed video images; a network interface controller to transmit the compressed video images over a network link to a remote display; a plurality of buffer pointer registers to store read pointers and write pointers identifying read locations and write locations, respectively, in a frame buffer and a compressed stream buffer; a central processing unit (CPU) to initialize the read pointers and write pointers for processing one or more of the video images; and the display engine to access a first write pointer to write to a specified location in the frame buffer, the encoder to begin reading from the frame buffer based on a first read pointer value, the encoder to write to the compressed stream buffer based on a second write pointer value, and the network interface controller to read from the compressed stream buffer based on a second read pointer value, the first and second write and read pointer values to be updated without intervention from the CPU as the display engine writes to the frame buffer, the encoder reads from the frame buffer and writes to the compressed stream buffer, and the network interface controller reads from the compressed stream buffer.

公开(公告)号：US20160239333A1

公开(公告)日：2016-08-18

申请号：US15025735

申请日：2013-11-27

Applicant: INTEL CORPORATION

Inventor： DAVID J. COWPERTHWAITE ,  MURALI RAMADOSS ,  ANKUR N. SHAH ,  BALAJI VEMBU ,  ALTUG KOKER ,  ADITYA NAVALE

IPC: G06F9/455 ,  G06T1/20

CPC classification number: G06F9/45558 ,  G06F9/5044 ,  G06F9/5077 ,  G06F2009/45579 ,  G06F2009/45583 ,  G06T1/20 ,  G06T2200/28

Abstract: In an embodiment, a system includes a graphics processing unit (GPU) that includes one or more GPU engines, and a microcontroller. The microcontroller is to assign a respective schedule slot for each of a plurality of virtual machines (VMs). When a particular VM is scheduled to access a first GPU engine, the particular VM has exclusive access to the first GPU engine. Other embodiments are described and claimed.

Abstract translation: 在一个实施例中，系统包括包括一个或多个GPU引擎的图形处理单元（GPU）和微控制器。 微控制器将为多个虚拟机（VM）中的每一个分配相应的调度时隙。 当特定VM被安排访问第一GPU引擎时，特定VM具有对第一GPU引擎的独占访问。 描述和要求保护其他实施例。

公开(公告)号：US20230177817A1

公开(公告)日：2023-06-08

申请号：US17966067

申请日：2022-10-14

Applicant: Intel Corporation

Inventor： BARNAN DAS ,  MAYURESH M. VARERKAR ,  NARAYAN BISWAL ,  STANLEY J. BARAN ,  GOKCEN CILINGIR ,  NILESH V. SHAH ,  ARCHIE SHARMA ,  SHERINE ABDELHAK ,  PRANEETHA KOTHA ,  NEELAY PANDIT ,  JOHN C. WEAST ,  MIKE B. MACPHERSON ,  DUKHWAN KIM ,  LINDA L. HURD ,  ABHISHEK R. APPU ,  ALTUG KOKER ,  JOYDEEP RAY

IPC: G06V10/82 ,  G06F16/783 ,  G06F16/583 ,  G06V10/94 ,  G06V40/10 ,  G06V40/20 ,  G06F18/2413 ,  G06V10/764

CPC classification number: G06V10/82 ,  G06F16/784 ,  G06F16/5838 ,  G06V10/955 ,  G06V40/10 ,  G06V40/23 ,  G06V40/103 ,  G06F18/24143 ,  G06V10/764

Abstract: A mechanism is described for facilitating recognition, reidentification, and security in machine learning at autonomous machines. A method of embodiments, as described herein, includes facilitating a camera to detect one or more objects within a physical vicinity, the one or more objects including a person, and the physical vicinity including a house, where detecting includes capturing one or more images of one or more portions of a body of the person. The method may further include extracting body features based on the one or more portions of the body, comparing the extracted body features with feature vectors stored at a database, and building a classification model based on the extracted body features over a period of time to facilitate recognition or reidentification of the person independent of facial recognition of the person.

公开(公告)号：US20230029176A1

公开(公告)日：2023-01-26

申请号：US17868448

申请日：2022-07-19

Applicant: Intel Corporation

Inventor： JOYDEEP RAY ,  ARAVINDH ANANTARAMAN ,  ABHISHEK R. APPU ,  ALTUG KOKER ,  ELMOUSTAPHA OULD-AHMED-VALL ,  VALENTIN ANDREI ,  SUBRAMANIAM MAIYURAN ,  NICOLAS GALOPPO VON BORRIES ,  VARGHESE GEORGE ,  MIKE MACPHERSON ,  BEN ASHBAUGH ,  MURALI RAMADOSS ,  VIKRANTH VEMULAPALLI ,  WILLIAM SADLER ,  JONATHAN PEARCE ,  SUNGYE KIM

IPC: G06F15/80 ,  G06F9/30 ,  G06F9/38 ,  G06T15/00

Abstract: Methods and apparatus relating to scalar core integration in a graphics processor. In an example, an apparatus comprises a processor to receive a set of workload instructions for a graphics workload from a host complex, determine a first subset of operations in the set of operations that is suitable for execution by a scalar processor complex of the graphics processing device and a second subset of operations in the set of operations that is suitable for execution by a vector processor complex of the graphics processing device, assign the first subset of operations to the scalar processor complex for execution to generate a first set of outputs, assign the second subset of operations to the vector processor complex for execution to generate a second set of outputs. Other embodiments are also disclosed and claimed.

公开(公告)号：US20210279104A1

公开(公告)日：2021-09-09

申请号：US17205905

申请日：2021-03-18

Applicant: INTEL CORPORATION

Inventor： ALTUG KOKER ,  Abhishek R. Appu ,  Kiran C. Veernapu ,  Joydeep Ray ,  Balaji Vembu

IPC: G06F9/50 ,  G06T1/20

Abstract: Methods and apparatus relating to techniques for avoiding cache lookup for cold cache. In an example, an apparatus comprises logic, at least partially comprising hardware logic, to receive a completion acknowledgment from the plurality of graphics processing units and in response to a determination that the workload is finished, to terminate one or more communication connections on the interconnect bridge. Other embodiments are also disclosed and claimed.

公开(公告)号：US20210201556A1

公开(公告)日：2021-07-01

申请号：US17141431

申请日：2021-01-05

Applicant: Intel Corporation

Inventor： JOYDEEP RAY ,  ABHISHEK R. APPU ,  PATTABHIRAMAN K ,  BALAJI VEMBU ,  ALTUG KOKER ,  NIRANJAN L. COORAY ,  JOSH B. MASTRONARDE

IPC: G06T15/00 ,  G06F9/455 ,  G06T1/60 ,  G09G5/36 ,  G09G5/00 ,  G09G5/393 ,  G06F9/48 ,  G06F9/50

Abstract: An apparatus and method are described for allocating local memories to virtual machines. For example, one embodiment of an apparatus comprises: a command streamer to queue commands from a plurality of virtual machines (VMs) or applications, the commands to be distributed from the command streamer and executed by graphics processing resources of a graphics processing unit (GPU); a tile cache to store graphics data associated with the plurality of VMs or applications as the commands are executed by the graphics processing resources; and tile cache allocation hardware logic to allocate a first portion of the tile cache to a first VM or application and a second portion of the tile cache to a second VM or application; the tile cache allocation hardware logic to further allocate a first region in system memory to store spill-over data when the first portion of the tile cache and/or the second portion of the file cache becomes full.

公开(公告)号：US20210150770A1

公开(公告)日：2021-05-20

申请号：US17095544

申请日：2020-11-11

Applicant: Intel Corporation

Inventor： ABHISHEK R. APPU ,  PRASOONKUMAR SURTI ,  JILL BOYCE ,  SUBRAMANIAM MAIYURAN ,  MICHAEL APODACA ,  ADAM T. LAKE ,  JAMES HOLLAND ,  VASANTH RANGANATHAN ,  ALTUG KOKER ,  LIDONG XU ,  NIKOS KABURLASOS

IPC: G06T9/00 ,  G06N3/04 ,  G06T15/00

Abstract: Embodiments described herein provided for an instruction and associated logic to enable a processing resource including a tensor accelerator to perform optimized computation of sparse submatrix operations. One embodiment provides hardware logic to apply a numerical transform to matrix data to increase the sparsity of the data. Increasing the sparsity may result in a higher compression ratio when the matrix data is compressed.

公开(公告)号：US20200293456A1

公开(公告)日：2020-09-17

申请号：US16354859

申请日：2019-03-15

Applicant: Intel Corporation

Inventor： MURALI RAMADOSS ,  VIKRANTH VEMULAPALLI ,  NIRAN COORAY ,  WILLIAM B. SADLER ,  JONATHAN D. PEARCE ,  MARIAN ALIN PETRE ,  BEN ASHBAUGH ,  ELMOUSTAPHA OULD-AHMED-VALL ,  NICOLAS GALOPPO VON BORRIES ,  ALTUG KOKER ,  ARAVINDH ANANTARAMAN ,  SUBRAMANIAM MAIYURAN ,  VARGHESE GEORGE ,  SUNGYE KIM ,  ANDREI VALENTIN

IPC: G06F12/1009 ,  G06N20/00

Abstract: Methods and apparatus relating to predictive page fault handling. In an example, an apparatus comprises a processor to receive a virtual address that triggered a page fault for a compute process, check a virtual memory space for a virtual memory allocation for the compute process that triggered the page fault and manage the page fault according to one of a first protocol in response to a determination that the virtual address that triggered the page fault is a last page in the virtual memory allocation for the compute process, or a second protocol in response to a determination that the virtual address that triggered the page fault is not a last page in the virtual memory allocation for the compute process. Other embodiments are also disclosed and claimed.

公开(公告)号：US20200082059A1

公开(公告)日：2020-03-12

申请号：US16126060

申请日：2018-09-10

Applicant: Intel Corporation

Inventor： BALAJI VEMBU ,  VIDHYA KRISHNAN ,  SANDEEP SODHI ,  SREEKANTH MAVILA ,  ALTUG KOKER ,  ADITYA NAVALE ,  SCOTT JANUS ,  Changliang WANG

IPC: G06F21/12 ,  G06T15/00 ,  H04N21/254 ,  G06F9/48 ,  G06F21/60 ,  H04L9/08

Abstract: Apparatus and method for scalable content protection. For example, one embodiment of an apparatus comprises: cryptographic management circuitry to securely store one or more keys associated with one or more media apps/applications; a plurality of processing engines, each processing engine comprising circuitry to process media content of the one or more media apps/applications; and a scheduler to schedule processing of the media content by the processing engines; wherein the cryptographic management circuitry is to restore a first cryptographic state including a first key associated with a first media app/application and/or first media content responsive to a request to process the first media content on a first processing engine.

公开(公告)号：US20190318550A1

公开(公告)日：2019-10-17

申请号：US16383849

申请日：2019-04-15

Applicant: Intel Corporation

Inventor： BARATH LAKSHAMANAN ,  LINDA l. HURD ,  BEN J. ASHBAUGH ,  ELMOUSTAPHA OULD-AHMED-VALL ,  LIWEI MA ,  JINGYI JIN ,  JUSTIN E. GOTTSCHLICH ,  CHANDRASEKARAN SAKTHIVEL ,  MICHAEL S. STRICKLAND ,  BRIAN T. LEWIS ,  LINDSEY KUPER ,  ALTUG KOKER ,  ABHISHEK R. APPU ,  PRASOONKUMAR SURTI ,  JOYDEEP RAY ,  BALAJI VEMBU ,  JAVIER S. TUREK ,  NAILA FAROOQUI

IPC: G07C5/00 ,  G06F9/50 ,  H04W28/08 ,  B60W30/00 ,  H04L29/08 ,  G01C21/34 ,  G05D1/00 ,  G08G1/01 ,  G06N20/00

Abstract: One embodiment provides for a computing device within an autonomous vehicle, the compute device comprising a wireless network device to enable a wireless data connection with an autonomous vehicle network, a set of multiple processors including a general-purpose processor and a general-purpose graphics processor, the set of multiple processors to execute a compute manager to manage execution of compute workloads associated with the autonomous vehicle, the compute workload associated with autonomous operations of the autonomous vehicle, and offload logic configured to execute on the set of multiple processors, the offload logic to determine to offload one or more of the compute workloads to one or more autonomous vehicles within range of the wireless network device.