公开(公告)号：US06977427B2

公开(公告)日：2005-12-20

申请号：US10723906

申请日：2003-11-26

申请人： Wolfgang Hetzel ,  Jochen Thomas

发明人： Wolfgang Hetzel ,  Jochen Thomas

IPC分类号： H01L23/495 ,  H01L23/02 ,  H01L21/44

CPC分类号： H01L24/48 ,  H01L23/4951 ,  H01L23/49575 ,  H01L24/32 ,  H01L2224/05599 ,  H01L2224/32014 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/48465 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01068 ,  H01L2924/01082 ,  H01L2924/181 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

摘要： An electronic component has a chip stack with a first semiconductor chip, a second semiconductor chip, and a large number of flat conductors configured in between the first semiconductor chip and the a second semiconductor chip. The flat conductors have a central section on which the semiconductor chips are mounted. First bonding connections connect the first semiconductor chip to inner sections of the flat conductors. Second bonding connections connect the second semiconductor chip to transitional sections of the flat conductors. The outer sections of the flat conductors project out of a package.

摘要翻译： 电子部件具有芯片堆叠，其具有第一半导体芯片，第二半导体芯片以及配置在第一半导体芯片和第二半导体芯片之间的多个扁平导体。 扁平导体具有安装半导体芯片的中心部分。 第一接合连接将第一半导体芯片连接到扁平导体的内部部分。 第二接合连接将第二半导体芯片连接到扁平导体的过渡部分。 扁平导体的外部部分从包装中突出出来。

公开(公告)号：US20050098870A1

公开(公告)日：2005-05-12

申请号：US10927952

申请日：2004-08-27

申请人： Jochen Thomas ,  Juergen Grafe ,  Ingo Wennemuth ,  Minka Gospodinova-Daltcheva ,  Maksim Kuzmenka

发明人： Jochen Thomas ,  Juergen Grafe ,  Ingo Wennemuth ,  Minka Gospodinova-Daltcheva ,  Maksim Kuzmenka

IPC分类号： H01L23/31 ,  H01L23/498 ,  H01L23/02

CPC分类号： H01L24/97 ,  H01L23/3128 ,  H01L23/49827 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/06136 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48465 ,  H01L2224/49109 ,  H01L2224/49175 ,  H01L2224/73215 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/0102 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

摘要： The invention relates to an FBGA arrangement, comprising a substrate on which at least one chip is chip-bonded face-down, which has a central row of bonding pads connected to contact islands (landing pads) on the substrate by a bonding channel in the substrate via wire bridges, which substrate, for its part, is provided with soldering balls—arranged in an array—for contact connection to a printed circuit board, and the contact islands and the soldering balls being connected to one another via a rewiring of the substrate. The preferred embodiment of the invention is intended to provide an FBGA arrangement which supports the center pad row technology and at the same time has low electrical parasitics. This is achieved by virtue of the fact that at least two substrates (1, 2) are provided, the substrates (1, 2) are provided substratewise in each case with bonding channels (3, 4) having different dimensions, in a manner forming a multistage bonding channel, the bonding channels (3) in the ball-side substrate (2) having larger dimensions than those in the chip-side substrate (1).

摘要翻译： 本发明涉及一种FBGA布置，其包括基板，其上至少一个芯片正面朝下地被芯片接合，该基板具有通过所述基板中的接合通道连接到所述基板上的接触岛（着陆焊盘）的中心排的接合焊盘 衬底通过导线桥接器，该衬底为其部分设置有排列成阵列的焊球，用于与印刷电路板的接触连接，并且接触岛和焊球通过重新布线 基质。 本发明的优选实施例旨在提供一种支持中心焊盘行技术并同时具有低电寄生效应的FBGA布置。 这是通过提供至少两个基板（1,2）的事实来实现的，基板（1,2）以每种形式设置成具有不同尺寸的接合通道（3,4），以形成 多级接合通道，所述球侧基板（2）中的接合通道（3）的尺寸大于所述芯片侧基板（1）的尺寸。

公开(公告)号：US07345363B2

公开(公告)日：2008-03-18

申请号：US11362507

申请日：2006-02-27

申请人： Minka Gospodinova-Daltcheva ,  Harry Huebert ,  Rajesh Subraya ,  Jochen Thomas ,  Ingo Wennemuth

发明人： Minka Gospodinova-Daltcheva ,  Harry Huebert ,  Rajesh Subraya ,  Jochen Thomas ,  Ingo Wennemuth

IPC分类号： H01L23/48

CPC分类号： H01L25/0657 ,  H01L23/13 ,  H01L23/3114 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/50 ,  H01L23/552 ,  H01L23/66 ,  H01L24/33 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2223/6627 ,  H01L2224/06135 ,  H01L2224/06136 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/4824 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/49 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06575 ,  H01L2225/06582 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/0101 ,  H01L2924/01013 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01052 ,  H01L2924/01068 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2924/181 ,  H01L2924/1903 ,  H01L2924/19043 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/30111 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099

摘要： A semiconductor device includes a plastic package, at least one semiconductor chip and a rewiring level. The rewiring level includes an insulating layer and a rewiring layer. The rewiring layer includes either signal conductor paths and ground or supply conductor paths arranged parallel to one another and alternately, or only signal conductor paths arranged parallel to one another. In the latter case, an electrically conducting layer of metal which can be connected to ground or supply potential is additionally provided as a termination of the rewiring level or in the form of a covering layer.

摘要翻译： 半导体器件包括塑料封装，至少一个半导体芯片和重新布线层。 重新布线层包括绝缘层和重新布线层。 重新布线层包括彼此平行布置的信号导体路径和接地或供电导体路径，并且交替地或者仅包括彼此平行布置的信号导体路径。 在后一种情况下，另外提供可连接到接地或供电电位的导电金属层作为重新布线层的终端或覆盖层的形式。

公开(公告)号：US07297574B2

公开(公告)日：2007-11-20

申请号：US11155277

申请日：2005-06-17

申请人： Jochen Thomas ,  Olaf Schoenfeld

发明人： Jochen Thomas ,  Olaf Schoenfeld

IPC分类号： H01L21/00 ,  H01L23/48 ,  H01L23/52

CPC分类号： H01L25/0657 ,  H01L25/105 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48471 ,  H01L2224/73265 ,  H01L2225/06513 ,  H01L2225/0652 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2225/06572 ,  H01L2225/06589 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/00014 ,  H01L2924/00

摘要： The present invention relates to a multi-chip device comprising a plurality of chip stacks each including a plurality of single chips stacked on each other, wherein the stacked single chips are electrically interconnected by one or more through-chip-connection extending through at least one of the single chips and a substrate providing one or more first contact elements each of which is in contact with one of the through-chip-connections and providing one or more second contact elements being in electrical contact with the first contact elements, wherein the plurality of chip stacks are stacked onto each other and wherein the second contact elements of one of the chip stacks each being arranged to be in contact to one or more third contact elements of an adjacent one of the chip stacks.

摘要翻译： 本发明涉及一种多芯片器件，其包括多个芯片堆叠，每个芯片堆叠包括彼此堆叠的多个单个芯片，其中堆叠的单个芯片通过至少一个延伸的一个或多个贯穿芯片连接电互连 的单个芯片和提供一个或多个第一接触元件的基板，每个第一接触元件与所述贯通芯片连接中的一个接触并提供与所述第一接触元件电接触的一个或多个第二接触元件，其中所述多个 芯片堆叠堆叠在一起，并且其中芯片堆叠之一的第二接触元件各自布置成与相邻芯片堆叠的一个或多个第三接触元件接触。

公开(公告)号：US20070210433A1

公开(公告)日：2007-09-13

申请号：US11371204

申请日：2006-03-08

申请人： Rajesh Subraya ,  Helmut Fischer ,  Ingo Wennemuth ,  Minka Gospodinova ,  Jochen Thomas

发明人： Rajesh Subraya ,  Helmut Fischer ,  Ingo Wennemuth ,  Minka Gospodinova ,  Jochen Thomas

IPC分类号： H01L23/02 ,  H01L21/00

CPC分类号： H01L25/0657 ,  H01L23/13 ,  H01L23/3128 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06551 ,  H01L2225/06586 ,  H01L2225/06589 ,  H01L2225/06596 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/00014 ,  H01L2924/00

摘要： The invention provides an integrated device comprising a plurality of non-individually-encapsulated chip arrangements, each of which having a plurality of contact elements for contacting a contact pad, wherein the plurality of chip arrangements are stacked on each other such that the respective contact elements provide electrical connections to the respective chip arrangement, and a common integral mold arranged to encapsulate the plurality of stacked chip arrangements.

摘要翻译： 本发明提供了一种集成器件，其包括多个非单独封装的芯片布置，每个芯片布置具有用于接触接触焊盘的多个接触元件，其中所述多个芯片布置彼此堆叠，使得各个接触元件 提供到相应芯片布置的电连接，以及布置成封装多个堆叠芯片布置的公共整体模具。

公开(公告)号：US20070023898A1

公开(公告)日：2007-02-01

申请号：US11192663

申请日：2005-07-29

申请人： Minka Gospodinova ,  Jochen Thomas ,  Dominique Savignac

发明人： Minka Gospodinova ,  Jochen Thomas ,  Dominique Savignac

IPC分类号： H01L23/48

CPC分类号： H01L23/66 ,  H01L23/13 ,  H01L23/49822 ,  H01L23/50 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L2223/6611 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/49052 ,  H01L2224/49109 ,  H01L2224/49174 ,  H01L2224/4943 ,  H01L2224/73215 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2224/45099 ,  H01L2924/00

摘要： Embodiments provide for integrated circuit chip and device having such an integrated circuit, in which different types of pads are arranged in separate rows. In one embodiment the pads are intelligently arranged to reduce the loop inductance of corresponding signal and power supply bond wires.

摘要翻译： 实施例提供了具有这种集成电路的集成电路芯片和器件，其中不同类型的焊盘以单独的行布置。 在一个实施例中，焊盘被智能地布置成减小对应的信号和电源接合线的环路电感。

公开(公告)号：US06927484B2

公开(公告)日：2005-08-09

申请号：US10700871

申请日：2003-11-04

申请人： Jochen Thomas ,  Wolfgang Hetzel

发明人： Jochen Thomas ,  Wolfgang Hetzel

IPC分类号： H01L25/065 ,  H01L23/02

CPC分类号： H01L25/0657 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2224/8592 ,  H01L2225/0651 ,  H01L2225/0652 ,  H01L2225/06527 ,  H01L2225/06575 ,  H01L2225/06582 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/00012

摘要： A stack arrangement of discrete components includes a carrier substrate and at least two discrete components, e.g., memory chips. The carrier substrate has line conductor structures and contact pads. Each of the discrete components includes centrally disposed bond pads and a metallic coating, which is electrically connected to the centrally disposed bond pads. The metallic coating is disposed on an active surface area of each discrete component. A protective structure overlies a central region of the discrete component. In the preferred embodiment, the metallic coatings of each discrete component are identical. Preferably, the discrete components are stacked on the carrier substrate so as to have the same orientation, so that the protective structure serves as a spacer between the discrete components. Further, the metallic coating is electrically coupled to the carrier substrate.

摘要翻译： 分立组件的堆叠布置包括载体衬底和至少两个分立组件，例如存储器芯片。 载体衬底具有线路导体结构和接触焊盘。 每个分立元件包括中心布置的接合焊盘和金属涂层，其与中心设置的接合焊盘电连接。 金属涂层设置在每个分立部件的有效表面区域上。 保护结构覆盖分立元件的中心区域。 在优选实施例中，每个离散部件的金属涂层是相同的。 优选地，离散部件堆叠在载体基板上以具有相同的取向，使得保护结构用作分立部件之间的间隔件。 此外，金属涂层电耦合到载体基底。

公开(公告)号：US20050156308A1

公开(公告)日：2005-07-21

申请号：US11038574

申请日：2005-01-21

申请人： Anton Legen ,  Jochen Thomas ,  Ingo Wennemuth

发明人： Anton Legen ,  Jochen Thomas ,  Ingo Wennemuth

IPC分类号： H01L21/44 ,  H01L21/60 ,  H01L23/48 ,  H01L23/485 ,  H01L23/495 ,  H01L23/50 ,  H01L25/065 ,  H01R12/50

CPC分类号： H01L24/10 ,  H01L23/495 ,  H01L24/13 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/00

摘要： Connecting elements on semiconductor chips for semiconductor components and methods for producing connecting elements provide electrical connections between contact areas of a semiconductor chip and contact pads of a superordinate circuit board. The connecting elements have a bent metal strip with two metal limbs with flattened limb ends. One of the two limb ends is electrically connected to the contact areas, while the second limb end is elastically supported on the top side of the semiconductor chip.

摘要翻译： 用于半导体部件的半导体芯片上的连接元件和用于制造连接元件的方法提供半导体芯片的接触区域和上级电路板的接触焊盘之间的电连接。 连接元件具有弯曲的金属条带，具有两个具有扁平端部的金属四肢。 两个肢端中的一个电连接到接触区域，而第二肢端部弹性地支撑在半导体芯片的顶侧上。

公开(公告)号：US06536682B1

公开(公告)日：2003-03-25

申请号：US10049195

申请日：2002-06-17

申请人： Ralf Schnupp ,  Jochen Thomas

发明人： Ralf Schnupp ,  Jochen Thomas

IPC分类号： F04B4304

CPC分类号： B05B17/0607

摘要： An actuator component for a piezoelectrically-driven microatomizer comprises a diaphragm formed in a semiconductor substrate, a piezoelectric actuator which is arranged on a surface of the diaphragm and by means of which the diaphragm can be caused to vibrate, and a passage formed in the semiconductor substrate and used for supplying a liquid to be atomized from an inlet end to the diaphragm surface located opposite the piezoelectric actuator.

摘要翻译： 用于压电驱动的微解胶器的致动器部件包括形成在半导体衬底中的膜片，压电致动器，其布置在膜片的表面上并且能够使膜片振动，并且形成在半导体中的通道 基板，用于从入口端向与压电致动器相对的隔膜表面供给待雾化的液体。

公开(公告)号：US08072085B2

公开(公告)日：2011-12-06

申请号：US10577173

申请日：2004-10-25

申请人： Wolfgang Hetzel ,  Jochen Thomas

发明人： Wolfgang Hetzel ,  Jochen Thomas

IPC分类号： H01L23/28 ,  H01L23/29 ,  H01L23/495

CPC分类号： H01L23/562 ,  H01L23/3114 ,  H01L23/3128 ,  H01L24/48 ,  H01L2224/32225 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01068 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device with a plastic package molding compound, a semiconductor chip and a leadframe is disclosed. In one embodiment, the semiconductor chip is embedded in a plastic package molding compound. The upper side of the semiconductor chip and the plastic package molding compound are arranged on a leadframe. Arranged between the leadframe and the plastic package molding compound with the semiconductor chip is an elastic adhesive layer for the mechanical decoupling of an upper region from a lower region of the semiconductor device.

摘要翻译： 公开了一种具有塑料封装模塑料，半导体芯片和引线框架的半导体器件。 在一个实施例中，将半导体芯片嵌入塑料封装模塑料中。 半导体芯片的上侧和塑料封装模塑料被布置在引线框架上。 在引线框架和具有半导体芯片的塑料封装模制化合物之间布置有用于上部区域与半导体器件的下部区域的机械去耦的弹性粘合剂层。