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    ENVELOPE TRACKING SUPPLY MODULATOR USING LINEAR AMPLIFIER WITH SEGMENTED OUTPUT STAGE AND ASSOCIATED WIRELESS COMMUNICATION SYSTEM
    22.
    发明申请
    ENVELOPE TRACKING SUPPLY MODULATOR USING LINEAR AMPLIFIER WITH SEGMENTED OUTPUT STAGE AND ASSOCIATED WIRELESS COMMUNICATION SYSTEM 有权

    公开(公告)号：US20220021342A1

    公开(公告)日：2022-01-20

    申请号：US17358009

    申请日：2021-06-25

    Applicant: MEDIATEK INC.

    Inventor： Shih-Hsiung Chien ,  Chen-Yen Ho

    IPC: H03F1/02 ,  H03F3/24 ,  H03F3/195

    Abstract: A linear amplifier of an envelope tracking supply modulator includes a pre-driver stage circuit and an output stage circuit. The pre-driver stage circuit receives an envelope input, and generates a pre-driver output according to the envelope input. The output stage circuit receives the pre-driver output, and generates an amplifier output according to the pre-driver output. The amplifier output is involved in setting a modulated supply voltage of a power amplifier. The output stage circuit has a plurality of amplifiers, including a first amplifier and a second amplifier. When the power amplifier has a first output power level, the first amplifier is involved in setting the amplifier output, and the second amplifier is not involved in setting the amplifier output. When the power amplifier has a second output power level different from the first output power level, the first amplifier and the second amplifier are involved in setting the amplifier output.

    Low-ripple latch circuit for reducing short-circuit current effect
    24.
    发明授权
    Low-ripple latch circuit for reducing short-circuit current effect 有权
    低纹波锁存电路，用于降低短路电流效应

    公开(公告)号：US09559674B2

    公开(公告)日：2017-01-31

    申请号：US15044114

    申请日：2016-02-16

    Applicant: MEDIATEK INC.

    Inventor： Chen-Yen Ho ,  Yu-Hsin Lin ,  Hung-Chieh Tsai ,  Tze-Chien Wang

    IPC: H03M1/00 ,  H03K3/356 ,  H03M1/08 ,  H03M1/66

    CPC classification number: H03K3/356113 ,  H03K3/356121 ,  H03K3/356191 ,  H03M1/066 ,  H03M1/0872 ,  H03M1/66 ,  H03M3/464

    Abstract: A latch circuit includes an input stage, an amplifying stage and a clock gating circuit. The input stage is arranged for receiving at least a clock signal and a data control signal. The amplifying stage is coupled to the input stage and supplied by a supply voltage and a ground voltage, and is arranged for retaining a data value and outputting the data value according to the clock signal and the data control signal. The clock gating circuit is coupled to the amplifying stage, and is arranged for avoiding a short-circuit current between the supply voltage and the ground voltage.

    Abstract translation: 锁存电路包括输入级，放大级和时钟门控电路。 输入级被布置成用于接收至少一个时钟信号和数据控制信号。 放大级与输入级耦合，由供电电压和接地电压提供，并被配置为保持数据值并根据时钟信号和数据控制信号输出数据值。 时钟门控电路耦合到放大级，并且被布置为避免电源电压和接地电压之间的短路电流。

    CONTINUOUS TIME DELTA SIGMA MODULATOR, ANALOG TO DIGITAL CONVERTER AND ASSOCIATED COMPENSATION METHOD
    25.
    发明申请
    CONTINUOUS TIME DELTA SIGMA MODULATOR, ANALOG TO DIGITAL CONVERTER AND ASSOCIATED COMPENSATION METHOD 有权
    连续时间DELTA SIGMA调制器，模拟数字转换器和相关补偿方法

    公开(公告)号：US20160336946A1

    公开(公告)日：2016-11-17

    申请号：US15044125

    申请日：2016-02-16

    Applicant: MEDIATEK INC.

    Inventor： Chen-Yen Ho ,  Yu-Hsin Lin

    IPC: H03M1/06 ,  H03M3/00

    CPC classification number: H03M1/06 ,  H03M3/37 ,  H03M3/422 ,  H03M3/464

    Abstract: A continuous time delta sigma modulator includes a summing circuit, a loop filter, an extraction circuit, a quantizer and a digital to analog converter. The summing circuit is arranged for subtracting a feedback signal by an input signal to generate a residual signal. The loop filter includes a plurality of amplifying stages connected in series and is arranged to receive the residual signal to generate a filtered residual signal. The extraction circuit is arranged for extracting a current from one of the amplifying stages and forwarding the extracted current to a following one of the amplifying stages. The quantizer is arranged for generating a digital output signal according to the filtered residual signal. The digital to analog converter is arranged for performing a digital to analog converting operation upon a signal derived from the digital output signal to generate the feedback signal to the summing circuit.

    Abstract translation: 连续时间ΔΣ调制器包括求和电路，环路滤波器，提取电路，量化器和数模转换器。 求和电路被布置为通过输入信号减去反馈信号以产生残余信号。 环路滤波器包括串联连接的多个放大级，并被布置为接收残余信号以产生滤波的残留信号。 提取电路被布置为从一个放大级提取电流，并将提取的电流转发到下一个放大级。 量化器被布置用于根据滤波的残留信号产生数字输出信号。 数模转换器被配置为根据从数字输出信号导出的信号执行数模转换操作，以产生到求和电路的反馈信号。

    Amplifier, fully-differential amplifier and delta-sigma modulator
    26.
    发明授权
    Amplifier, fully-differential amplifier and delta-sigma modulator 有权
    放大器，全差分放大器和Δ-Σ调制器

    公开(公告)号：US09154083B2

    公开(公告)日：2015-10-06

    申请号：US14643240

    申请日：2015-03-10

    Applicant: MediaTek Inc.

    Inventor： Chen-Yen Ho ,  Chi-Lun Lo ,  Hung-Chieh Tsai ,  Yu-Hsin Lin

    IPC: H03M3/00 ,  H03F1/02 ,  H03F3/45

    CPC classification number: H03F1/0205 ,  H03F3/265 ,  H03F3/30 ,  H03F3/3023 ,  H03F3/45071 ,  H03F3/45179 ,  H03F3/45183 ,  H03F3/45475 ,  H03F2200/18 ,  H03F2203/30021 ,  H03F2203/30033 ,  H03F2203/45022 ,  H03F2203/45134 ,  H03F2203/45138 ,  H03M3/39 ,  H03M3/50

    Abstract: An amplifier includes a front-end gain stage and an AC-coupled push-pull output stage. The AC-coupled push-pull output stage includes a first transistor, having a source, a drain and a gate, wherein the source of the first transistor is coupled to a first voltage level. The AC-coupled push-pull output stage further includes a second transistor, having a source, a drain and a gate, wherein the source of the second transistor is coupled to a second voltage level, the gate of the second transistor is coupled to the front-end gain stage, and the drain of the second transistor is coupled to the drain of the first transistor to form an output terminal of the amplifier. Further, the AC-coupled push-pull output stage includes an AC-coupled capacitor, which is a passive two terminal electrical component coupled between the front-end gain stage and the gate of the first transistor.

    Abstract translation: 放大器包括前端增益级和AC耦合推挽输出级。 AC耦合推挽输出级包括具有源极，漏极和栅极的第一晶体管，其中第一晶体管的源极耦合到第一电压电平。 AC耦合推挽输出级还包括具有源极，漏极和栅极的第二晶体管，其中第二晶体管的源极耦合到第二电压电平，第二晶体管的栅极耦合到 前端增益级，第二晶体管的漏极耦合到第一晶体管的漏极，以形成放大器的输出端。 此外，AC耦合推挽输出级包括AC耦合电容器，其是耦合在前端增益级与第一晶体管的栅极之间的无源双端电气部件。

    Sigma-delta modulators with high speed feed-forward architecture
    27.
    发明授权
    Sigma-delta modulators with high speed feed-forward architecture 有权
    具有高速前馈架构的Σ-Δ调制器

    公开(公告)号：US09019136B2

    公开(公告)日：2015-04-28

    申请号：US14097451

    申请日：2013-12-05

    Applicant: MediaTek Inc.

    Inventor： Chen-Yen Ho ,  Hung-Chieh Tsai ,  Yu-Hsin Lin

    IPC: H03M3/00 ,  H03M1/00 ,  H03M1/12

    CPC classification number: H03M3/32 ,  H03M1/00 ,  H03M1/12 ,  H03M3/30 ,  H03M3/452 ,  H03M2201/4233

    Abstract: A sigma-delta modulator is provided for generating a digital output signal. The sigma-delta modulator is used to generate a digital output signal. The sigma-delta modulator includes a multi-stage loop filter and a quantizer. The multi-stage loop filter receives an analog input signal and generates an integrated output signal according to the analog input signal. The quantizer is coupled to the multi-stage loop filter. The quantizer receives the integrated output signal and quantizes the integrated output signal to generate the digital output signal. Different feed-forward paths of the sigma-delta modulator are available for different frequency bands.

    Abstract translation: 提供Σ-Δ调制器用于产生数字输出信号。 Σ-Δ调制器用于产生数字输出信号。 Σ-Δ调制器包括多级环路滤波器和量化器。 多级环路滤波器接收模拟输入信号，并根据模拟输入信号产生积分输出信号。 量化器耦合到多级环路滤波器。 量化器接收积分输出信号并量化积分输出信号以产生数字输出信号。 Σ-Δ调制器的不同前馈路径可用于不同的频带。

    Sigma-delta modulators with excess loop delay compensation
    28.
    发明授权
    Sigma-delta modulators with excess loop delay compensation 有权
    具有多余环路延迟补偿的Σ-Δ调制器

    公开(公告)号：US08791848B2

    公开(公告)日：2014-07-29

    申请号：US13760379

    申请日：2013-02-06

    Applicant: MediaTek Inc.

    Inventor： Chen-Yen Ho ,  Chi-Lun Lo ,  Hung-Chieh Tsai ,  Yu-Hsin Lin

    IPC: H03M3/00

    CPC classification number: H03M3/458 ,  H03M3/37 ,  H03M3/454

    Abstract: A sigma-delta modulator is provided for generating a digital output signal. The sigma-delta modulator includes a multi-stage loop filter, a quantizer, and a digital-to-analog converter. The multi-stage loop filter receives an analog input signal and generates an integrated output signal according to the analog input signal. Each stage of the multi-stage loop filter includes a feedback network. The quantizer receives the integrated output signal and quantizes the integrated output signal to generate the digital output signal. The digital-to-analog converter receives the digital output signal and converts the digital output signal to a compensation signal. The digital-to-analog converter provides the compensation signal to a plurality of internal nodes in the feedback network of the last stage of the multi-stage loop filter.

    Abstract translation: 提供Σ-Δ调制器用于产生数字输出信号。 Σ-Δ调制器包括多级环路滤波器，量化器和数模转换器。 多级环路滤波器接收模拟输入信号，并根据模拟输入信号产生积分输出信号。 多级环路滤波器的每一级都包括反馈网络。 量化器接收积分输出信号并量化积分输出信号以产生数字输出信号。 数模转换器接收数字输出信号并将数字输出信号转换成补偿信号。 数模转换器向多级环路滤波器的最后级的反馈网络中的多个内部节点提供补偿信号。

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