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    MEMORY DEVICE ON-DIE ECC DATA
    23.
    发明申请
    MEMORY DEVICE ON-DIE ECC DATA 有权

    公开(公告)号：US20230031842A1

    公开(公告)日：2023-02-02

    申请号：US17391830

    申请日：2021-08-02

    Applicant: Micron Technology, Inc.

    Inventor： Anthony D. Veches ,  Randall J. Rooney ,  Debra M. Bell

    IPC: G11C29/42 ,  G11C29/44 ,  G11C29/14 ,  G11C29/18

    Abstract: Methods, devices, and systems related to memory device on-die ECC data are described. In an example, a scrub operation can be performed on data in order to determine which rows of memory cells in an array include a particular number of errors. The particular number of errors can be a number of errors that exceed a threshold number of errors. An address of the determined rows with the particular number of errors can be stored in memory cells of the array for later access. The address of the determined rows can be accessed to perform a user-initiated repair operation, a self-repair operation, a refresh operation, and/or to alter timing of access of the cells or alter voltage of the cells.

    MEMORY WITH PROGRAMMABLE REFRESH ORDER AND STAGGER TIME
    24.
    发明申请
    MEMORY WITH PROGRAMMABLE REFRESH ORDER AND STAGGER TIME 有权

    公开(公告)号：US20230029003A1

    公开(公告)日：2023-01-26

    申请号：US17949836

    申请日：2022-09-21

    Applicant: Micron Technology, Inc.

    Inventor： Vaughn N. Johnson ,  Debra M. Bell ,  Miles S. Wiscombe ,  Brian T. Pecha ,  Kyle Alexander

    IPC: G11C11/406 ,  G11C11/408 ,  G11C11/4076

    Abstract: Memory devices and systems with programmable refresh order and stagger times are disclosed herein. In one embodiment, a memory device includes a first memory bank group and a second memory bank group. The memory device is configured, in response to a refresh command, to perform a first refresh operation on the first memory bank group at a first time and a second refresh operation on the second memory bank group at a second time after the first time. The memory device is further configured to perform, in response to a read or write command, a read or write operation on the first memory bank group, the second memory bank group, or both the first and second memory bank groups after beginning the first refresh operation and before completing the second refresh operation.

    MEMORY DEVICE SENSORS
    25.
    发明申请
    MEMORY DEVICE SENSORS 有权

    公开(公告)号：US20220404892A1

    公开(公告)日：2022-12-22

    申请号：US17892629

    申请日：2022-08-22

    Applicant: Micron Technology, Inc.

    Inventor： Debra M. Bell ,  Roya Baghi ,  Erica M. Gove ,  Zahra Hosseinimakarem ,  Cheryl M. O'Donnell

    IPC: G06F1/3234 ,  G11C16/26 ,  G11C11/56

    Abstract: Systems, apparatuses, and methods related to using memory device sensors are described. Some memory system or device types include sensors embedded in their circuitry. For instance, a device can be coupled to a memory device with an embedded sensor. The memory device can transmit the data generated by the embedded sensor using a sensor output coupled to the device. The memory device may generate, based at least in part on a characteristic of a memory device, a signal from a sensor embedded in the memory device and transmit the signal generated by the sensor from the memory device to another device coupled to the memory device.

    Persistent health monitoring for volatile memory systems
    28.
    发明授权
    Persistent health monitoring for volatile memory systems 有权

    公开(公告)号：US11481265B2

    公开(公告)日：2022-10-25

    申请号：US16433820

    申请日：2019-06-06

    Applicant: Micron Technology, Inc.

    Inventor： Debra M. Bell ,  Kristen M. Hopper ,  Erika Prosser ,  Aaron P. Boehm

    IPC: G06F11/00 ,  G06F11/07 ,  G06F3/06 ,  G06F1/30 ,  G06F1/20 ,  G06F11/30

    Abstract: Methods, systems, and devices for persistent health monitoring for volatile memory devices are described. A memory device may determine that an operating condition associated with an array of memory cells on the device, such as a temperature, current, voltage, or other metric of health status is outside of a range associated with a risk of device degradation. The memory device may monitor a duration over which the operating condition is outside of the range, and may determine whether the duration satisfies a threshold. In some cases, the memory device may store an indication of when (e.g., each time) the duration satisfied the threshold. The memory device may store the one or more indications in one or more non-volatile storage elements, such as fuses, which may enable the memory device to maintain a persistent indication of a cumulative duration over which the memory device is operated with operating conditions outside of the range.

    MEMORY WITH PARTIAL ARRAY REFRESH
    30.
    发明申请
    MEMORY WITH PARTIAL ARRAY REFRESH 有权

    公开(公告)号：US20220189540A1

    公开(公告)日：2022-06-16

    申请号：US17684235

    申请日：2022-03-01

    Applicant: Micron Technology, Inc.

    Inventor： Dale H. Hiscock ,  Debra M. Bell ,  Michael Kaminski ,  Joshua E. Alzheimer ,  Anthony D. Veches ,  James S. Rehmeyer

    IPC: G11C11/406 ,  G11C11/4074 ,  G11C16/10 ,  G11C11/4072

    Abstract: Memory devices and systems with partial array refresh control over memory regions in a memory array, and associated methods, are disclosed herein. In one embodiment, a memory device includes a memory array having a first memory region and a second memory region. The memory device is configured to write data to the memory array in accordance with a programming sequence by initially writing data to unutilized memory cells of the first memory region before initially writing data to unutilized memory cells of the second memory region. The memory device is further configured to determine that the data stored on the first and/or second memory regions is not consolidated, and to consolidate at least a portion of the data by rewriting the portion of the data to physically or logically contiguous memory cells of the first memory region and/or the second memory region.

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