TEST STRUCTURE FOR OPC-RELATED SHORTS BETWEEN LINES IN A SEMICONDUCTOR DEVICE
    22.
    发明申请
    TEST STRUCTURE FOR OPC-RELATED SHORTS BETWEEN LINES IN A SEMICONDUCTOR DEVICE 有权
    在半导体器件中的线之间的与OPC相关的短路的测试结构

    公开(公告)号:US20080099761A1

    公开(公告)日:2008-05-01

    申请号:US11747320

    申请日:2007-05-11

    IPC分类号: H01L21/66 H01L23/58

    摘要: OPC results may be efficiently evaluated on the basis of a test structure containing a plurality of line features with opposing end portions. Thus, for different line parameters, the effect of OPC may be determined for a given critical tip-to-tip distance by determining the leakage behavior of the test assemblies, each having different design parameter values for line width and lateral distance between adjacent lines.

    摘要翻译: 可以基于包含具有相对端部的多个线特征的测试结构来有效地评估OPC结果。 因此,对于不同的线路参数,可以通过确定测试组件的泄漏行为来确定给定的临界尖端到尖端距离的OPC的效果,每个测试组件对于线宽和相邻线之间的横向距离具有不同的设计参数值。

    METHOD OF FORMING AN ETCH INDICATOR LAYER FOR REDUCING ETCH NON-UNIFORMITIES
    23.
    发明申请
    METHOD OF FORMING AN ETCH INDICATOR LAYER FOR REDUCING ETCH NON-UNIFORMITIES 有权
    形成蚀刻指示剂层以减少蚀刻非均匀性的方法

    公开(公告)号:US20080026487A1

    公开(公告)日:2008-01-31

    申请号:US11688280

    申请日:2007-03-20

    IPC分类号: H01L21/02

    摘要: By incorporating an etch control material after the formation of a material layer to be patterned, an appropriate material having a highly distinctive radiation wavelength may be used for generating a distinctive endpoint detection signal during an etch process. Advantageously, the material may be incorporated by ion implantation which provides reduced non-uniformity compared to etch non-uniformities, while the implantation process provides the potential for introducing even very “exotic” implantation species. In some embodiments, the substrate-to-substrate uniformity of the patterning of dual damascene structures may be increased.

    摘要翻译: 通过在形成待图案化的材料层之后并入蚀刻控制材料,可以使用具有高度显着的辐射波长的适当材料来在蚀刻工艺期间产生独特的端点检测信号。 有利地,该材料可以通过离子注入并入,与蚀刻非均匀性相比,其提供了降低的不均匀性,而植入工艺提供了引入甚至非常“异乎寻常”的植入物种的潜力。 在一些实施例中,可以增加双镶嵌结构的图案化的基板到基板的均匀性。

    TEST STRUCTURE FOR MONITORING LEAKAGE CURRENTS IN A METALLIZATION LAYER
    26.
    发明申请
    TEST STRUCTURE FOR MONITORING LEAKAGE CURRENTS IN A METALLIZATION LAYER 有权
    用于监测金属化层中漏电流的测试结构

    公开(公告)号:US20070296439A1

    公开(公告)日:2007-12-27

    申请号:US11623372

    申请日:2007-01-16

    IPC分类号: G01R31/02

    摘要: By providing a plurality of resistors and a plurality of test patterns within a leakage current test structure, the number of probe pads required for estimating the plurality of test patterns may be significantly reduced, wherein, in some illustrative embodiments, several test patterns may be simultaneously assessed on the basis of two probe pads. Consequently, process parameters and/or design parameters for manufacturing metallization structures of semiconductor devices may be efficiently monitored and controlled.

    摘要翻译: 通过在泄漏电流测试结构内提供多个电阻器和多个测试图案,可以显着地减少用于估计多个测试图案所需的探针焊盘的数量,其中在一些说明性实施例中,可以同时进行几个测试图案 基于两个探针垫进行评估。 因此,可以有效地监测和控制用于制造半导体器件的金属化结构的工艺参数和/或设计参数。