公开(公告)号：US20070045805A1

公开(公告)日：2007-03-01

申请号：US11491037

申请日：2006-07-24

Applicant: Ryosuke Watanabe ,  Daiki Yamada

Inventor： Ryosuke Watanabe ,  Daiki Yamada

IPC: H01L23/02

CPC classification number: G06K19/07749 ,  H01L23/49855 ,  H01L27/12 ,  H01L27/1266 ,  H01L27/1292 ,  H01L27/13 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device which is excellent in chemical and physical strength and circumstance resistance is provided. A first stacked film including a first base material and a first adhesive layer is adhered so as to cover one surface of a stacked body including an integrated circuit, the stacked body is sealed by adhering a second stacked film including a second base material and a second adhesive layer so as to cover the other surface of the stacked body, and the first stacked film and the second stacked film are cut. Then, a side surface of the first stacked film and the second stacked film, which is exposed by the cutting, is irradiated with laser light.

Abstract translation: 提供了具有优异的化学和物理强度和环境阻力的半导体器件。 将包括第一基材和第一粘合剂层的第一叠层膜粘合以覆盖包括集成电路的层叠体的一个表面，通过将包括第二基材和第二基材的第二叠层膜 粘合剂层以覆盖层叠体的另一面，并且切割第一层叠膜和第二层叠膜。 然后，用激光照射通过切割曝光的第一层叠膜和第二层叠膜的侧面。

公开(公告)号：US20060011288A1

公开(公告)日：2006-01-19

申请号：US11168353

申请日：2005-06-29

Applicant: Ryosuke Watanabe ,  Hidekazu Takahashi ,  Takuya Tsurume ,  Yasuyuki Arai ,  Yasuko Watanabe ,  Miyuki Higuchi

Inventor： Ryosuke Watanabe ,  Hidekazu Takahashi ,  Takuya Tsurume ,  Yasuyuki Arai ,  Yasuko Watanabe ,  Miyuki Higuchi

IPC: B32B37/00 ,  B29C65/00

CPC classification number: H01L21/56 ,  B32B37/153 ,  B32B37/226 ,  B32B2305/342 ,  B32B2519/02 ,  G06K19/07718 ,  G06K19/07749 ,  H01L21/67132 ,  H01L2924/0002 ,  Y10T29/41 ,  Y10T156/1095 ,  Y10T156/1734 ,  H01L2924/00

Abstract: The invention provides a laminating system in which one of second and third substrates for sealing a thin film integrated circuit is supplied to a first substrate having the plurality of thin film integrated circuit while being extruded in a heated and melted state, and further rollers are used for supplying the other substrate, receiving IC chips, separating, and sealing. Processes of separating the thin film integrated circuits provided over the first substrate, sealing the separated thin film integrated circuits, and receiving the sealed thin film integrated circuits can be continuously carried out by rotating the rollers. Thus, the production efficiency can be extremely improved.

公开(公告)号：US09935202B2

公开(公告)日：2018-04-03

申请号：US13528009

申请日：2012-06-20

Applicant: Shunpei Yamazaki ,  Masayuki Sakakura ,  Ryosuke Watanabe ,  Junichiro Sakata ,  Kengo Akimoto ,  Akiharu Miyanaga ,  Takuya Hirohashi ,  Hideyuki Kishida

Inventor： Shunpei Yamazaki ,  Masayuki Sakakura ,  Ryosuke Watanabe ,  Junichiro Sakata ,  Kengo Akimoto ,  Akiharu Miyanaga ,  Takuya Hirohashi ,  Hideyuki Kishida

IPC: H01L29/10 ,  H01L29/786 ,  H01L27/12 ,  H01L29/04

CPC classification number: H01L29/7869 ,  H01L27/1225 ,  H01L29/04 ,  H01L29/045 ,  H01L29/78618 ,  H01L29/78693 ,  H01L29/78696

Abstract: To provide a transistor having a favorable electric characteristics and high reliability and a display device including the transistor. The transistor is a bottom-gate transistor formed using an oxide semiconductor for a channel region. An oxide semiconductor layer subjected to dehydration or dehydrogenation through heat treatment is used as an active layer. The active layer includes a first region of a superficial portion microcrystallized and a second region of the rest portion. By using the oxide semiconductor layer having such a structure, a change to an n-type, which is attributed to entry of moisture to the superficial portion or elimination of oxygen from the superficial portion, and generation of a parasitic channel can be suppressed. In addition, contact resistance between the oxide semiconductor layer and source and drain electrodes can be reduced.

公开(公告)号：US08232181B2

公开(公告)日：2012-07-31

申请号：US12953066

申请日：2010-11-23

Applicant: Shunpei Yamazaki ,  Ryosuke Watanabe ,  Jun Koyama

Inventor： Shunpei Yamazaki ,  Ryosuke Watanabe ,  Jun Koyama

IPC: H01L21/30 ,  H01L21/46 ,  H01L21/00 ,  G06K19/077 ,  G06K19/07

CPC classification number: H01L21/6835 ,  H01L23/552 ,  H01L23/60 ,  H01L24/75 ,  H01L24/83 ,  H01L27/1248 ,  H01L27/1266 ,  H01L27/13 ,  H01L2221/68354 ,  H01L2221/68363 ,  H01L2221/68368 ,  H01L2223/6677 ,  H01L2224/16 ,  H01L2224/2919 ,  H01L2224/83101 ,  H01L2224/83192 ,  H01L2224/838 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01054 ,  H01L2924/0106 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01076 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/00

Abstract: A manufacturing method of a semiconductor device is provided, which includes a process in which a transistor is formed over a first substrate; a process in which a first insulating layer is formed over the transistor; a process in which a first conductive layer connected to a source or a drain of the transistor is formed; a process in which a second substrate provided with a second insulating layer is arranged so that the first insulating layer is attached to the second insulating layer; a process in which the second insulating layer is separated from the second substrate; and a process in which a third substrate provided with a second conductive layer which functions as an antenna is arranged so that the first conductive layer is electrically connected to the second conductive layer.

Abstract translation: 提供一种半导体器件的制造方法，其包括在第一衬底上形成晶体管的工艺; 在晶体管上形成第一绝缘层的工艺; 形成与晶体管的源极或漏极连接的第一导电层的工序; 其中设置有第二绝缘层的第二基板被布置成使得第一绝缘层附接到第二绝缘层的工艺; 第二绝缘层与第二基板分离的工序; 并且其中设置有用作天线的第二导电层的第三基板被布置成使得第一导电层电连接到第二导电层的工艺。

公开(公告)号：US07932126B2

公开(公告)日：2011-04-26

申请号：US12349026

申请日：2009-01-06

Applicant: Junya Maruyama ,  Toru Takayama ,  Masafumi Morisue ,  Ryosuke Watanabe ,  Eiji Sugiyama ,  Susumu Okazaki ,  Kazuo Nishi ,  Jun Koyama ,  Takeshi Osada ,  Takanori Matsuzaki

Inventor： Junya Maruyama ,  Toru Takayama ,  Masafumi Morisue ,  Ryosuke Watanabe ,  Eiji Sugiyama ,  Susumu Okazaki ,  Kazuo Nishi ,  Jun Koyama ,  Takeshi Osada ,  Takanori Matsuzaki

IPC: H01L21/00

CPC classification number: H01L27/1266 ,  H01L27/1214 ,  H01L27/1218 ,  H01L27/14609 ,  H01L27/14665 ,  H01L2224/16225

Abstract: The area occupied by a photo-sensor element may be reduced and multiple elements may be integrated in a limited area so that the sensor element can have higher output and smaller size. Higher output and miniaturization are achieved by uniting a sensor element using an amorphous semiconductor film (typically an amorphous silicon film) and an output amplifier circuit including a TFT with a semiconductor film having a crystal structure (typically a poly-crystalline silicon film) used as an active layer over a plastic film substrate that can resist the temperature in the process for mounting such as a solder reflow process. A sensor element that can resist bending stress can be obtained.

Abstract translation: 可以减少由光传感器元件占据的面积，并且可以在有限的区域中集成多个元件，使得传感器元件可以具有更高的输出和更小的尺寸。 通过使用非晶半导体膜（通常为非晶硅膜）的传感器元件和包括具有晶体结构的半导体膜（通常为多晶硅膜）的TFT的输出放大器电路来实现更高的输出和小型化，其被用作 在塑料膜基材上的能够抵抗诸如焊料回流工艺的安装过程中的温度的有源层。 可以获得能够抵抗弯曲应力的传感器元件。

公开(公告)号：US07591863B2

公开(公告)日：2009-09-22

申请号：US11168353

申请日：2005-06-29

Applicant: Ryosuke Watanabe ,  Hidekazu Takahashi ,  Takuya Tsurume ,  Yasuyuki Arai ,  Yasuko Watanabe ,  Miyuki Higuchi

Inventor： Ryosuke Watanabe ,  Hidekazu Takahashi ,  Takuya Tsurume ,  Yasuyuki Arai ,  Yasuko Watanabe ,  Miyuki Higuchi

IPC: H01L21/00 ,  H01L21/64

CPC classification number: H01L21/56 ,  B32B37/153 ,  B32B37/226 ,  B32B2305/342 ,  B32B2519/02 ,  G06K19/07718 ,  G06K19/07749 ,  H01L21/67132 ,  H01L2924/0002 ,  Y10T29/41 ,  Y10T156/1095 ,  Y10T156/1734 ,  H01L2924/00

Abstract: The invention provides a laminating system in which one of second and third substrates for sealing a thin film integrated circuit is supplied to a first substrate having the plurality of thin film integrated circuit while being extruded in a heated and melted state, and further rollers are used for supplying the other substrate, receiving IC chips, separating, and sealing. Processes of separating the thin film integrated circuits provided over the first substrate, sealing the separated thin film integrated circuits, and receiving the sealed thin film integrated circuits can be continuously carried out by rotating the rollers. Thus, the production efficiency can be extremely improved.

Abstract translation: 本发明提供了一种层压系统，其中用于密封薄膜集成电路的第二和第三基板中的一个被提供到具有多个薄膜集成电路的第一基板，同时在加热和熔融状态下挤出，并且使用另外的辊 用于供给另一个基板，接收IC芯片，分离和密封。 通过旋转辊可以连续地进行分离设置在第一基板上的薄膜集成电路，密封分离的薄膜集成电路和接收密封的薄膜集成电路的工艺。 因此，可以极大地提高生产效率。

公开(公告)号：US20090117681A1

公开(公告)日：2009-05-07

申请号：US12349026

申请日：2009-01-06

Applicant: Junya Maruyama ,  Toru Takayama ,  Masafumi Morisue ,  Ryosuke Watanabe ,  Eiji Sugiyama ,  Susumu Okazaki ,  Kazuo Nishi ,  Jun Koyama ,  Takeshi Osada ,  Takanori Matsuzaki

Inventor： Junya Maruyama ,  Toru Takayama ,  Masafumi Morisue ,  Ryosuke Watanabe ,  Eiji Sugiyama ,  Susumu Okazaki ,  Kazuo Nishi ,  Jun Koyama ,  Takeshi Osada ,  Takanori Matsuzaki

IPC: H01L21/02 ,  H01L31/18

CPC classification number: H01L27/1266 ,  H01L27/1214 ,  H01L27/1218 ,  H01L27/14609 ,  H01L27/14665 ,  H01L2224/16225

Abstract: The object of the present invention is to miniaturize the area occupied by the element and to integrate a plenty of elements in a limited area so that the sensor element can have higher output and smaller size.In the present invention, higher output and miniaturization are achieved by uniting a sensor element using an amorphous semiconductor film (typically an amorphous silicon film) and an output amplifier circuit including a TFT with a semiconductor film having a crystal structure (typically a poly-crystalline silicon film) used as an active layer over a plastic film substrate that can resist the temperature in the process for mounting such as a solder reflow process. According to the present invention, the sensor element that can resist the bending stress can be obtained.

Abstract translation: 本发明的目的是使元件占据的面积小型化，并将大量的元件集成在有限的区域中，使传感器元件具有更高的输出和更小的尺寸。 在本发明中，通过使用非晶半导体膜（通常为非晶硅膜）的传感器元件和包括具有晶体结构的半导体膜（通常为多晶体）的TFT的输出放大器电路来实现更高的输出和小型化 硅膜）用作塑料膜基材上的活性层，其能够抵抗诸如焊料回流工艺的安装过程中的温度。 根据本发明，可以获得能够抵抗弯曲应力的传感器元件。

公开(公告)号：US20080044940A1

公开(公告)日：2008-02-21

申请号：US11596582

申请日：2005-05-31

Applicant: Ryosuke Watanabe ,  Hidekazu Takahashi ,  Takuya Tsurume

Inventor： Ryosuke Watanabe ,  Hidekazu Takahashi ,  Takuya Tsurume

IPC: H01L21/67

CPC classification number: H01L21/56 ,  B32B37/20 ,  B32B2305/342 ,  B42D25/45 ,  B42D2033/46 ,  G06K19/07718 ,  G06K19/07749 ,  G06K19/0775 ,  H01L21/67126 ,  H01L21/67132 ,  H01L21/67144 ,  H01L21/6835 ,  H01L27/1214 ,  H01L27/1266 ,  H01L2221/68318 ,  H01L2221/68354 ,  H01L2221/68363 ,  H01L2924/0002 ,  Y10T156/1089 ,  Y10T156/1093 ,  Y10T156/1712 ,  H01L2924/00

Abstract: It is an object of the invention to improve the production efficiency in sealing a thin film integrated circuit and to prevent the damage and break. Further, it is another object of the invention to prevent a thin film integrated circuit from being damaged in shipment and to make it easier to handle the thin film integrated circuit. The invention provides a laminating system in which rollers are used for supplying a substrate for sealing, receiving IC chips, separating, and sealing. The separation, sealing, and reception of a plurality of thin film integrated circuits can be carried out continuously by rotating the rollers; thus, the production efficiency can be extremely improved. Further, the thin film integrated circuits can be easily sealed since a pair of rollers opposite to each other is used.

Abstract translation: 本发明的目的是提高密封薄膜集成电路的生产效率并防止损坏和断裂。 此外，本发明的另一个目的是防止薄膜集成电路在运输中受损，并且使得更容易处理薄膜集成电路。 本发明提供了一种层压系统，其中辊子用于供应用于密封的基板，接收IC芯片，分离和密封。 通过旋转辊可以连续地进行多个薄膜集成电路的分离，密封和接收; 从而可以极大地提高生产效率。 此外，由于使用了彼此相对的一对辊，所以能够容易地密封薄膜集成电路。

公开(公告)号：US20070077691A1

公开(公告)日：2007-04-05

申请号：US11522455

申请日：2006-09-18

Applicant: Ryosuke Watanabe

Inventor： Ryosuke Watanabe

IPC: H01L21/84

CPC classification number: H01L27/1266 ,  H01L24/97 ,  H01L27/1285 ,  H01L27/1292 ,  H01L51/56 ,  H01L2924/14 ,  H01L2924/00

Abstract: It is an object of the present invention to provide a manufacturing method of a semiconductor device where a semiconductor element is prevented from being damaged and throughput speed thereof is improved, even in a case of thinning or removing a supporting substrate after forming the semiconductor element over the supporting substrate. According to one feature of the present invention, a method for manufacturing a semiconductor device includes the steps of forming a plurality of element groups over an upper surface of a substrate; forming an insulating film so as to cover the plurality of element groups; selectively forming an opening to the insulating film which is located in a region between neighboring two element groups in the plurality of element groups to expose the substrate; forming a first film so as to cover the insulating film and the opening; exposing the element groups by removing the substrate; forming a second film so as to cover the surface of the exposed element groups; and cutting off between the plurality of element groups so as not to expose the insulating film.

Abstract translation: 本发明的目的是提供一种半导体器件的制造方法，即使在形成半导体元件之后，在使半导体元件变薄或去除支撑基板的情况下，也可以防止半导体元件受到损坏并且其吞吐速度得到改善 支撑基板。 根据本发明的一个特征，一种制造半导体器件的方法包括以下步骤：在衬底的上表面上形成多个元件组; 形成绝缘膜以覆盖所述多个元件组; 选择性地形成位于所述多个元件组中相邻的两个元件组之间的区域中的绝缘膜的开口以露出所述衬底; 形成第一膜以覆盖绝缘膜和开口; 通过去除衬底暴露元件组; 形成第二膜以覆盖暴露的元件组的表面; 并且在多个元件组之间切断以便不暴露绝缘膜。

公开(公告)号：US20050167573A1

公开(公告)日：2005-08-04

申请号：US10952914

申请日：2004-09-30

Applicant: Junya Maruyama ,  Toru Takayama ,  Masafumi Morisue ,  Ryosuke Watanabe ,  Eiji Sugiyama ,  Susumu Okazaki ,  Kazuo Nishi ,  Jun Koyama ,  Takeshi Osada ,  Takanori Matsuzaki

Inventor： Junya Maruyama ,  Toru Takayama ,  Masafumi Morisue ,  Ryosuke Watanabe ,  Eiji Sugiyama ,  Susumu Okazaki ,  Kazuo Nishi ,  Jun Koyama ,  Takeshi Osada ,  Takanori Matsuzaki

IPC: H01L27/146 ,  H01J40/14 ,  H01L21/82 ,  H01L27/14 ,  H01L31/00 ,  H01L31/10

CPC classification number: H01L27/1266 ,  H01L27/1214 ,  H01L27/1218 ,  H01L27/14609 ,  H01L27/14665 ,  H01L2224/16225

Abstract: The object of the present invention is to miniaturize the area occupied by the element and to integrate a plenty of elements in a limited area so that the sensor element can have higher output and smaller size. In the present invention, higher output and miniaturization are achieved by uniting a sensor element using an amorphous semiconductor film (typically an amorphous silicon film) and an output amplifier circuit including a TFT with a semiconductor film having a crystal structure (typically a poly-crystalline silicon film) used as an active layer over a plastic film substrate that can resist the temperature in the process for mounting such as a solder reflow process. According to the present invention, the sensor element that can resist the bending stress can be obtained.

Abstract translation: 本发明的目的是使元件占据的面积小型化，并将大量的元件集成在有限的区域中，使传感器元件具有更高的输出和更小的尺寸。 在本发明中，通过使用非晶半导体膜（通常为非晶硅膜）的传感器元件和包括具有晶体结构的半导体膜（通常为多晶体）的TFT的输出放大器电路来实现更高的输出和小型化 硅膜）用作塑料膜基材上的活性层，其能够抵抗诸如焊料回流工艺的安装过程中的温度。 根据本发明，可以获得能够抵抗弯曲应力的传感器元件。