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公开(公告)号:US09935068B2
公开(公告)日:2018-04-03
申请号:US15454416
申请日:2017-03-09
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor: Young Min Ban , Han Kim , Kyung Moon Jung
IPC: H01L23/00 , H01L23/31 , H01L23/522 , H01L23/528
CPC classification number: H01L24/06 , H01L23/3128 , H01L23/3171 , H01L23/5226 , H01L23/5283 , H01L24/03 , H01L24/14 , H01L24/20 , H01L2224/02331 , H01L2224/0235 , H01L2224/02379 , H01L2224/0401 , H01L2224/04105 , H01L2224/05008 , H01L2224/05017 , H01L2224/05569 , H01L2224/05572 , H01L2224/12105 , H01L2224/13021 , H01L2224/18 , H01L2224/20 , H01L2224/73204 , H01L2924/15153 , H01L2924/171 , H01L2924/19105 , H05K1/185
Abstract: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a semiconductor chip disposed in the through-hole and having an active surface having a connection pad disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first interconnection member and the inactive surface of the semiconductor chip; and a second interconnection member disposed on the first interconnection member and the active surface of the semiconductor chip, wherein the first interconnection member and the second interconnection member include, respectively, redistribution layers electrically connected to the connection pad, the semiconductor chip includes a passivation layer having an opening exposing at least a portion of the connection pad, the redistribution layer of the second interconnection member is connected to the connection pad through a via, and the via covers at least a portion of the passivation layer.
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公开(公告)号:US09853003B1
公开(公告)日:2017-12-26
申请号:US15480573
申请日:2017-04-06
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor: Mi Ja Han , Seong Hee Choi , Han Kim , Moon Il Kim , Dae Hyun Park
CPC classification number: H01L23/645 , H01L23/3128 , H01L24/02 , H01L24/13 , H01L24/19 , H01L24/20 , H01L2224/02331 , H01L2224/02373 , H01L2224/02379 , H01L2224/02381 , H01L2224/04105 , H01L2224/12105 , H01L2224/13024 , H01L2224/24195 , H01L2225/1035 , H01L2225/1041 , H01L2924/10252 , H01L2924/10253 , H01L2924/10329 , H01L2924/14 , H01L2924/1432 , H01L2924/14335 , H01L2924/19041 , H01L2924/19042 , H01L2924/19105 , H01L2924/3025 , H01L2924/37001
Abstract: A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole of the first connection member and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first connection member and the inactive surface of the semiconductor chip; and a second connection member disposed on the first connection member and the active surface of the semiconductor chip. The first connection member and the second connection member include, respectively, redistribution layers electrically connected to the connection pads of the semiconductor chip, and the first connection member includes a coil pattern layer electrically connected to the connection pads of the semiconductor chip.
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公开(公告)号:US09842789B2
公开(公告)日:2017-12-12
申请号:US15140775
申请日:2016-04-28
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor: Seung On Kang , Woo Sung Han , Young Gwan Ko , Chul Kyu Kim , Han Kim
IPC: H01L23/02 , H01L23/31 , H01L23/16 , H01L23/552 , H01L23/00 , H01L23/36 , H01L23/538 , H01L23/29 , H01L23/367 , H01L23/498
CPC classification number: H01L23/3128 , H01L21/4857 , H01L21/56 , H01L23/16 , H01L23/295 , H01L23/36 , H01L23/3677 , H01L23/49816 , H01L23/5226 , H01L23/5389 , H01L23/552 , H01L24/19 , H01L24/20 , H01L24/96 , H01L24/97 , H01L2224/04105 , H01L2224/12105 , H01L2924/1431 , H01L2924/1432 , H01L2924/1433 , H01L2924/14335 , H01L2924/1436 , H01L2924/1438 , H01L2924/145 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H01L2924/3025 , H01L2924/3511
Abstract: An electronic component package includes a frame having a cavity, an electronic component disposed in the cavity of the frame, a first metal layer disposed on an inner wall of the cavity of the frame, an encapsulant encapsulating the electronic component, and a redistribution layer disposed below the frame and the electronic component.
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公开(公告)号:US09824988B1
公开(公告)日:2017-11-21
申请号:US15432152
申请日:2017-02-14
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor: Yun Tae Lee , Sung Han Kim , Han Kim
IPC: H01L23/00 , H01L23/31 , H01L23/498
CPC classification number: H01L24/02 , H01L23/3107 , H01L23/49822 , H01L23/49827 , H01L23/562 , H01L24/09 , H01L24/19 , H01L24/20 , H01L2224/02331 , H01L2224/02371 , H01L2224/02373 , H01L2224/02379 , H01L2224/04105 , H01L2224/12105 , H01L2224/16227 , H01L2224/32225 , H01L2224/73204 , H01L2224/97 , H01L2225/06513 , H01L2225/06541 , H01L2225/1035 , H01L2924/01029 , H01L2924/181 , H01L2924/18162 , H01L2924/19041 , H01L2924/19042 , H01L2924/19105 , H01L2924/3025 , H01L2924/351 , H01L2924/3511
Abstract: A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface disposed to oppose the active surface; a dummy chip disposed in the through-hole and spaced apart from the semiconductor chip; a second connection member disposed on the first connection member, the dummy chip, and the active surface of the semiconductor chip; and an encapsulant encapsulating at least portions of the first connection member, the dummy chip, and the inactive surface of the semiconductor chip. The first connection member and the second connection member include, respectively, redistribution layers electrically connected to the connection pads.
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公开(公告)号:US12295264B2
公开(公告)日:2025-05-06
申请号:US17741352
申请日:2022-05-10
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor: Sung Han Kim , Se Yeon Hwang , Joon Woo Gi , Jong Ho Chung , Han Kim
IPC: H10N10/17 , H10N10/01 , H10N10/855
Abstract: A thermoelectric module includes a stack structure of a plurality of insulating layers, a plurality of thermoelectric elements formed with the insulating layer interposed therebetween and including a first-type semiconductor device, a second-type semiconductor device, a first electrode connected to the first-type semiconductor device, a second electrode connected to the second-type semiconductor device, and a connection electrode connecting the first-type and second-type semiconductor devices, and a conductive via penetrating through the insulating layer to connect thermoelectric elements adjacent to each other, among the plurality of thermoelectric elements.
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公开(公告)号:US20250017331A1
公开(公告)日:2025-01-16
申请号:US18279701
申请日:2023-07-04
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor: Seyeon Hwang , Han Kim , Seungjae Song
IPC: A44C5/10 , A44C5/14 , G04G17/04 , H01M50/503 , H01M50/512
Abstract: A watch strap and a smart watch includes: a plurality of strap blocks arranged consecutively in one direction; and a plurality of hinge coupling units pivotably coupled to both sides of the plurality of strap blocks to integrally connect the plurality of strap blocks to each other. An all-solid-state battery having electrode terminal units on both sides thereof is embedded in at least one of the plurality of strap blocks. At least one of the plurality of hinge coupling units is electrically connected to one of the electrode terminal units.
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公开(公告)号:US20240062960A1
公开(公告)日:2024-02-22
申请号:US18221549
申请日:2023-07-13
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor: Han Kim , Sang Jong Lee , Min Cheol Park , Su Bong Jang
Abstract: According to an embodiment of the present disclosure, since the outer electrode of the first unit device and the outer electrode of the second unit device may have different polarities, capacitance may be generated in each of the first unit device and the second unit device and capacitance may be generated between the first and second unit devices, thereby maximizing capacitance per unit volume.
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公开(公告)号:US11683569B2
公开(公告)日:2023-06-20
申请号:US17071366
申请日:2020-10-15
Applicant: Samsung Electro-Mechanics Co., Ltd.
Inventor: Sung Han Kim , Han Kim , Young Bok Yoon , Seok Hwan Kim , Tae Ho Yun , Kyung Ho Lee , Jong Gil Won , Chul Kyu Kim , Jong Man Kim
CPC classification number: H04N23/51 , H04N23/54 , H04N23/57 , H04N23/687 , H05K1/0278
Abstract: An optical assembly includes: a camera module; at least one actuator configured to move the camera module; and a connection substrate having one end connected to the camera module such that at least a portion of the connection substrate is configured to move along with movement of the camera module. The connection substrate includes a rigidity reduction portion reducing rigidity of the connection substrate in a portion of the substrate in which distortion or warpage occurs according to the movement of the camera module.
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公开(公告)号:US11094448B2
公开(公告)日:2021-08-17
申请号:US16155165
申请日:2018-10-09
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor: Sung Jun Lim , Yeong Min Jeong , Han Kim , Kyung Ho Lee
Abstract: An inductor includes: a body in which a plurality of insulating layers on which a plurality of coil patterns are arranged are stacked; and first and second external electrodes disposed on an external surface of the body, wherein the plurality of coil patterns are connected to each other through a coil connection portion and form a coil having both ends connected to the first and second external electrodes through a coil withdrawal portion, and wherein the coil connection portion is configured as a material having a higher thermal expansion coefficient than that of the insulating layers.
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公开(公告)号:US10356916B2
公开(公告)日:2019-07-16
申请号:US15142484
申请日:2016-04-29
Applicant: Samsung Electro-Mechanics Co., Ltd.
Inventor: Han Kim , Sang Yul Ha , Sung Han Kim , Kyung Ho Lee , Seok Hwan Ahn , Myung Sam Kang
Abstract: A printed circuit board and a method of manufacturing the same are provided. The printed circuit board includes an inner layer including at least one insulating layer and wiring parts, and outer layers disposed on opposing sides of the inner layer, the outer layers including reinforcing layers and wiring parts, the reinforcing layers having a greater degree of rigidity than the insulating layer.
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