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    ANALOG-TO-DIGITAL CONVERSION LOOP FOR PSI5 AND WSS SYSTEMS
    21.
    发明申请
    ANALOG-TO-DIGITAL CONVERSION LOOP FOR PSI5 AND WSS SYSTEMS 有权
    PSI5和WSS系统的模拟到数字转换循环

    公开(公告)号：US20130342376A1

    公开(公告)日：2013-12-26

    申请号：US13926455

    申请日：2013-06-25

    Applicant: STMicroelectronics S.r.l.

    Inventor： Vanni Poletto ,  Carlo Antonini ,  Salvatore Cannavacciuolo

    IPC: H03M1/12

    CPC classification number: H03M1/12 ,  H03M1/1235 ,  H03M1/48 ,  H03M3/04

    Abstract: An analog-to-digital conversion loop adapted to generate a digital output signal corresponding to a low-pass filtered replica of an analog input signal, including an analog adder configured to receive the input analog signal and an analog feedback signal, adapted to generate an analog error signal corresponding to the difference between the analog input signal and the analog feedback signal; an analog-to-digital converter having a nonlinear input-output conversion characteristic defining a larger quantization step the more the input to be converted differs from a null value, configured to receive the analog error signal and to generate a corresponding digital error signal a digital integrator configured to receive the digital error signal, configured to generate the digital output signal corresponding to the time integration of the digital error signal; a digital-to-analog converter, configured to receive the digital output signal and to generate the analog feedback signal as analog replica of the digital output signal.

    Abstract translation: 一种适于产生对应于模拟输入信号的低通滤波复制品的数字输出信号的模拟 - 数字转换回路，包括配置成接收输入模拟信号的模拟加法器和模拟反馈信号，该模拟加法器适于产生 模拟误差信号对应于模拟输入信号和模拟反馈信号之间的差异; 具有定义较大量化步长的非线性输入 - 输出转换特性的模数转换器，被转换的输入越多与空值不同，被配置为接收模拟误差信号并产生相应的数字误差信号，数字 积分器，被配置为接收数字误差信号，被配置为产生对应于数字误差信号的时间积分的数字输出信号; 数模转换器，配置成接收数字输出信号并产生模拟反馈信号作为数字输出信号的模拟副本。

    Capacitor charging method, corresponding circuit and device
    22.
    发明授权
    Capacitor charging method, corresponding circuit and device 有权

    公开(公告)号：US12261597B2

    公开(公告)日：2025-03-25

    申请号：US18321568

    申请日：2023-05-22

    Applicant: STMicroelectronics S.r.l.

    Inventor： Alberto Marzo ,  Vincenzo Randazzo ,  Vanni Poletto ,  Giovanni Susinna

    IPC: H03K17/687 ,  H03K17/0412 ,  H03K17/06

    Abstract: In embodiments, a capacitance is coupled to a source of electrical charge via a drain to source current flow path through a field-effect transistor. The capacitance is pre-charged by making the field-effect transistor selectively conductive in response to the gate-source voltage of the field-effect transistor exceeding a threshold. The difference between the gate-source voltage of the field-effect transistor and the threshold provides an overdrive value of the field-effect transistor. The gate of the field-effect transistor is driven with a variable gate-source voltage having as a target maintaining a constant overdrive value. Electrical charge is controllably transferred from the source to the capacitance via the drain to source current flow path through the field-effect transistor avoiding undesirably high inrush currents.

    Current sensing in switched electronic devices
    23.
    发明授权
    Current sensing in switched electronic devices 有权

    公开(公告)号：US11923770B2

    公开(公告)日：2024-03-05

    申请号：US17959797

    申请日：2022-10-04

    Applicant: STMICROELECTRONICS S.r.l.

    Inventor： Marco Cignoli ,  Vanni Poletto

    IPC: H02M3/155 ,  B60L3/12 ,  G01R19/10 ,  H02M1/08

    CPC classification number: H02M3/155 ,  B60L3/12 ,  G01R19/10 ,  H02M1/08

    Abstract: Provided is a circuit including a switching transistor having a control terminal configured to receive a control signal and having a current flow path therethrough. The switching transistor becomes conductive in response to the control signal having a first value. The current flow path through the switching transistor provides a current flow line between two nodes. In a non-conductive state, a voltage drop stress is across the switching transistor. The circuit comprises a sense transistor that is coupled to and a scaled replica of the switching transistor. The sense transistor has a sense current therethrough. The sense current is indicative of the current of the switching transistor. The circuit includes coupling circuitry configured to apply the voltage drop stress across the sense transistor in response to the switching transistor being non-conductive. In the non-conductive state, the voltage drop stress is replicated across both the switching transistor and the sense transistor.

    CAPACITOR CHARGING METHOD, CORRESPONDING CIRCUIT AND DEVICE
    25.
    发明公开
    CAPACITOR CHARGING METHOD, CORRESPONDING CIRCUIT AND DEVICE 审中-公开

    公开(公告)号：US20230403005A1

    公开(公告)日：2023-12-14

    申请号：US18321568

    申请日：2023-05-22

    Applicant: STMicroelectronics S.r.l.

    Inventor： Alberto Marzo ,  Vincenzo Randazzo ,  Vanni Poletto ,  Giovanni Susinna

    IPC: H03K17/687 ,  H03K17/0412 ,  H03K17/06

    CPC classification number: H03K17/687 ,  H03K17/04123 ,  H03K17/063

    Abstract: In embodiments, a capacitance is coupled to a source of electrical charge via a drain to source current flow path through a field-effect transistor. The capacitance is pre-charged by making the field-effect transistor selectively conductive in response to the gate-source voltage of the field-effect transistor exceeding a threshold. The difference between the gate-source voltage of the field-effect transistor and the threshold provides an overdrive value of the field-effect transistor. The gate of the field-effect transistor is driven with a variable gate-source voltage having as a target maintaining a constant overdrive value. Electrical charge is controllably transferred from the source to the capacitance via the drain to source current flow path through the field-effect transistor avoiding undesirably high inrush currents.

    CURRENT MONITOR CIRCUIT, CORRESPONDING SYSTEM AND METHOD
    26.
    发明申请
    CURRENT MONITOR CIRCUIT, CORRESPONDING SYSTEM AND METHOD 有权

    公开(公告)号：US20220200509A1

    公开(公告)日：2022-06-23

    申请号：US17535176

    申请日：2021-11-24

    Applicant: STMicroelectronics S.r.l.

    Inventor： Nicola Errico ,  Vanni Poletto ,  Paolo Vilmercati ,  Marco Cignoli

    IPC: H02P27/12 ,  H02P27/08

    Abstract: In an embodiment, an electronic circuit includes: a controller configured to produce a pulse-width-modulated (PWM) signal to control a first current of an electrical load; a redundant current measurement circuit configured to measure the first current and provide first and second current measurement signal; a monitor circuit coupled to the redundant current measurement circuit, the monitor circuit configured to assert a current monitor signal in response to the first and second current measurement signals being found to be matching with each other, wherein the monitor circuit is configured to: detect an absence of the asserted current monitor signal prior to expiry of a threshold time interval, and in response to detecting the absence of the asserted current monitor signal, force the controller to produce, prior to expiry of the threshold time interval, a first PWM signal pulse having a controlled duty-cycle.

    Ringing peak detector module for an inductive electric load driver, related system and integrated circuit
    28.
    发明授权
    Ringing peak detector module for an inductive electric load driver, related system and integrated circuit 有权

    公开(公告)号：US10523189B2

    公开(公告)日：2019-12-31

    申请号：US16001682

    申请日：2018-06-06

    Applicant: STMicroelectronics S.r.l.

    Inventor： Vanni Poletto ,  Andrea Maino

    IPC: H02P6/06 ,  H03K5/1532 ,  H02P27/08 ,  H03K7/08 ,  H03K17/16 ,  H03K17/689 ,  H02P7/03 ,  H02P7/02 ,  H02P7/025

    Abstract: A ringing peak detector circuit includes an input buffer receives a pair of differential feedback signals indicating a drain-source voltage of the at least one low side electronic switch. The input buffer generates shifted differential feedback signals having a common mode voltage that is equal to approximately one half of the supply voltage. A peak detector circuit is coupled to the input buffer to receive the shifted differential voltage signals. The peak detector circuit detects a peak value of an oscillation on the inductive electric load and to generate an output signal indicating the detected peak value. A circuit generates a control signal based on the detected peak value and a maximum value, with the control signal being applied to the inductive electrical load driver to control switching of the at least one low side switch.

    DRIVER CIRCUIT, CORRESPONDING DEVICE AND METHOD
    30.
    发明申请
    DRIVER CIRCUIT, CORRESPONDING DEVICE AND METHOD 审中-公开

    公开(公告)号：US20190305774A1

    公开(公告)日：2019-10-03

    申请号：US16447687

    申请日：2019-06-20

    Applicant: STMicroelectronics S.r.l.

    Inventor： Daniele Zella ,  Vanni Poletto ,  Mauro Foppiani

    IPC: H03K17/687 ,  G05F3/26 ,  H03K17/60

    Abstract: In one embodiment, a (pre)driver circuit includes first and a second output terminal for driving an electronic switch that includes a control terminal and a current path through the switch. The arrangement can operate in one or more first driving configurations (e.g., for PMOS), with the first and second output terminals are coupled to the current path and the control electrode of the electronic switch, respectively, and one or more second driving configurations (e.g., for NMOS, both HS and LS), wherein the first and second output terminals of the driver circuit are coupled to the control electrode and the current path of the electronic switch, respectively.

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