公开(公告)号：US10068925B2

公开(公告)日：2018-09-04

申请号：US15461401

申请日：2017-03-16

Applicant: Samsung Display Co., Ltd.

Inventor： Sung Hoon Yang ,  Shin Il Choi

IPC: H01L21/00 ,  H01L27/12 ,  H01L23/535 ,  H01L29/417 ,  H01L29/786 ,  H01L29/66 ,  H01L21/465 ,  H01L21/4763

CPC classification number: H01L27/1225 ,  H01L21/465 ,  H01L21/47635 ,  H01L23/535 ,  H01L27/124 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/41733 ,  H01L29/45 ,  H01L29/66765 ,  H01L29/66969 ,  H01L29/78669 ,  H01L29/7869 ,  H01L29/78696

Abstract: A thin film transistor includes a gate electrode, a semiconductor layer, a source electrode, and a drain electrode. The semiconductor layer overlaps the gate electrode and includes a channel layer comprising an oxide semiconductor and an auxiliary layer comprising amorphous silicon. The source electrode and the drain electrode are separated from each other and connected to the semiconductor layer. A thin film transistor array panel and method of manufacturing same also is disclosed.

公开(公告)号：US09978777B2

公开(公告)日：2018-05-22

申请号：US15392888

申请日：2016-12-28

Applicant: Samsung Display Co., Ltd.

Inventor： Tae An Seo ,  Su Bin Bae ,  Yu-Gwang Jeong ,  Hyun Min Cho ,  Shin Il Choi ,  Jin Hwan Choi

IPC: H01L27/12 ,  H01L29/66 ,  H01L29/786

CPC classification number: H01L27/1225 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/66969 ,  H01L29/7869

Abstract: A TFT array panel of a display device includes a first substrate, a first electrode disposed on the first substrate, a first insulating layer including a first hole, the first insulating layer disposed on the first electrode, a second insulating layer disposed on the first insulating layer and including a second hole corresponding to the first hole, and a capping layer including a first inner portion, the capping layer disposed on an inner lateral surface forming the second hole, where an end portion of the first inner portion disposed in the second hole is separated from the first electrode.

公开(公告)号：US20180069128A1

公开(公告)日：2018-03-08

申请号：US15686415

申请日：2017-08-25

Applicant: Samsung Display Co., Ltd.

Inventor： Hyun Eok Shin ,  Sang Won Shin ,  Dong Min Lee ,  Ju Hyun Lee ,  Shin Il Choi

IPC: H01L29/786 ,  H01L27/12

CPC classification number: H01L29/78633 ,  G02F1/136209 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/13629 ,  G02F2001/136295 ,  H01L27/124 ,  H01L27/1262 ,  H01L27/3262 ,  H01L27/3272 ,  H01L27/3276 ,  H01L2227/323 ,  H01L2251/5315 ,  H01L2251/533

Abstract: A display device according to an exemplary embodiment of the present invention includes: a substrate; a gate line and a data line that are provided on the substrate and are insulated from each other; a thin film transistor that is connected with the gate line and the data line; and a pixel electrode that is connected with the thin film transistor, in which at least one of the gate line and the data line includes a metal layer and a blocking layer that contacts the metal layer, and the blocking layer includes a first metal from a first group including molybdenum (Mo) and tungsten (W), a second metal from a second group including vanadium (V), niobium (Nb), zirconium (Zr), and tantalum (Ta), and oxygen (O).

公开(公告)号：US09488889B2

公开(公告)日：2016-11-08

申请号：US13940588

申请日：2013-07-12

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Dongjo Kim ,  Yoonho Khang ,  Sehwan Yu ,  Jungkyu Lee ,  Jong chan Lee ,  Jiseon Lee ,  Sanggab Kim ,  Shin Il Choi

IPC: G02F1/136 ,  G02F1/1362

CPC classification number: G02F1/136227 ,  G02F2001/13629 ,  G02F2201/123

Abstract: A liquid crystal display includes a first substrate including a plurality of pixels, a second substrate facing the first substrate, and a liquid crystal layer interposed between the first substrate and the second substrate. At least one of the pixels includes a thin film transistor disposed on a first insulating substrate, an insulating layer overlapping the thin film transistor, and a pixel electrode disposed on the insulating layer. A contact hole is formed through the insulating layer to expose a first electrode of the thin film transistor, the pixel electrode is electrically connected to the first electrode through the contact hole, and the pixel electrode has a single-layer in an area where the contact hole is formed and a double-layer on the insulating layer.

Abstract translation: 液晶显示器包括：包括多个像素的第一基板;面对第一基板的第二基板;以及介于第一基板和第二基板之间的液晶层。 至少一个像素包括设置在第一绝缘基板上的薄膜晶体管，与薄膜晶体管重叠的绝缘层和设置在绝缘层上的像素电极。 通过绝缘层形成接触孔，露出薄膜晶体管的第一电极，像素电极通过接触孔与第一电极电连接，像素电极在接触区域中具有单层 在绝缘层上形成双层。

公开(公告)号：US12256616B2

公开(公告)日：2025-03-18

申请号：US18441694

申请日：2024-02-14

Applicant: Samsung Display Co., Ltd.

Inventor： Hyuneok Shin ,  Hyunwoo Kang ,  Hyunah Sung ,  Dokeun Song ,  Sukyoung Yang ,  Yunjong Yeo ,  Dongmin Lee ,  Donghyeok Lee ,  Shin Il Choi

IPC: H10K59/131 ,  H10K59/12

Abstract: A display device includes an active layer in a display area, a first gate insulation layer on the active layer, a first gate line on the first gate insulation layer in the display area, a first signal line in the same layer as the first gate line in a non-display area and including the same material as that of the first gate line including molybdenum, a second gate insulation layer on the first gate line and the first signal line, a second gate line on the second gate insulation layer in the display area, and a second signal line in the same layer as the second gate line in the non-display area and including the same material as that of the second gate line including aluminum or an aluminum alloy. A width of the first signal line is greater than a width of the second signal line.

公开(公告)号：US12225787B2

公开(公告)日：2025-02-11

申请号：US17489120

申请日：2021-09-29

Applicant: Samsung Display Co., LTD.

Inventor： Gyung Min Baek ,  Tae Wook Kang ,  Shin Il Choi

IPC: H10K59/131 ,  H10K59/121 ,  H10K59/124

Abstract: A display device includes a substrate including a display area and a pad area, a transistor including an active layer disposed in the display area, a gate electrode disposed on the active layer, and a source electrode and a drain electrode disposed on the gate electrode, a fan-out line disposed in the pad area, an auxiliary line disposed on the fan-out line, a first interlayer insulating layer disposed between the gate electrode and the source electrode and between the fan-out line and the auxiliary line, and a first organic layer disposed between the first interlayer insulating layer and the auxiliary line, wherein the first organic layer does not overlap the display area.

公开(公告)号：US12058907B2

公开(公告)日：2024-08-06

申请号：US18158320

申请日：2023-01-23

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Hyun Min Cho ,  Tae Wook Kang ,  Sang Gun Choi ,  Shin Il Choi ,  Yun Jung Oh ,  Myoung Geun Cha

IPC: H01L29/08 ,  H10K50/824 ,  H10K59/121 ,  H10K59/124 ,  H10K59/131 ,  H10K71/00

CPC classification number: H10K59/131 ,  H10K50/824 ,  H10K59/1213 ,  H10K59/124 ,  H10K71/00

Abstract: A display apparatus includes: a base substrate; a thin film transistor and a power supply wire on the base substrate; a first electrode on the base substrate, and electrically connected to the thin film transistor; a light emitting layer and a common layer on the first electrode; and a second electrode on the common layer. The power supply wire includes: a first conductive layer; a second conductive layer on the first conductive layer; and a third conductive layer on the second conductive layer. The third conductive layer protrudes more than the second conductive layer on a side surface of the power supply wire, and the second electrode contacts a side surface of the second conductive layer.

公开(公告)号：US11943982B2

公开(公告)日：2024-03-26

申请号：US17398336

申请日：2021-08-10

Applicant: Samsung Display Co., Ltd.

Inventor： Hyuneok Shin ,  Hyunwoo Kang ,  Hyunah Sung ,  Dokeun Song ,  Sukyoung Yang ,  Yunjong Yeo ,  Dongmin Lee ,  Donghyeok Lee ,  Shin Il Choi

IPC: H10K59/131 ,  H10K59/12

CPC classification number: H10K59/1315 ,  H10K59/1201

Abstract: A display device includes an active layer in a display area, a first gate insulation layer on the active layer, a first gate line on the first gate insulation layer in the display area, a first signal line in the same layer as the first gate line in a non-display area and including the same material as that of the first gate line including molybdenum, a second gate insulation layer on the first gate line and the first signal line, a second gate line on the second gate insulation layer in the display area, and a second signal line in the same layer as the second gate line in the non-display area and including the same material as that of the second gate line including aluminum or an aluminum alloy. A width of the first signal line is greater than a width of the second signal line.

公开(公告)号：US11189681B2

公开(公告)日：2021-11-30

申请号：US16409991

申请日：2019-05-13

Applicant: Samsung Display Co., Ltd.

Inventor： Kyeong Su Ko ,  Joon Geol Lee ,  Shin Il Choi ,  Sang Gab Kim ,  Hyun Min Cho ,  Hyun Eok Shin

IPC: H01L51/05 ,  H01L51/00 ,  H01L27/32 ,  H01L51/56

Abstract: An OLED display according to an exemplary embodiment includes: a substrate; a gate insulation layer that is disposed on the substrate; and a gate wire that is disposed on the gate insulation layer, and includes a gate electrode, wherein the gate wire includes a single layer of aluminum or an aluminum alloy, and an angle formed by side surfaces of the gate wire and the gate insulation layer is less than 65°.

公开(公告)号：US11183518B2

公开(公告)日：2021-11-23

申请号：US16987952

申请日：2020-08-07

Applicant: Samsung Display Co., Ltd.

Inventor： Yu-Gwang Jeong ,  Hyun Min Cho ,  Su Bin Bae ,  Shin Il Choi ,  Sang Gab Kim

IPC: H01L27/12 ,  H01L21/311 ,  H01L29/417 ,  H01L29/786 ,  G02F1/1368 ,  H01L27/32

Abstract: A transistor array panel is manufactured by a method that reduces or obviates the need for highly selective etching agents or complex processes requiring multiple photomasks to create contact holes. The panel includes: a substrate; a buffer layer positioned on the substrate; a semiconductor layer positioned on the buffer layer; an intermediate insulating layer positioned on the semiconductor layer; and an upper conductive layer positioned on the intermediate insulating layer, wherein the semiconductor layer includes a first contact hole, the intermediate insulating layer includes a second contact hole positioned in an overlapping relationship with the first contact hole, and the upper conductive layer is in contact with a side surface of the semiconductor layer in the first contact hole.