公开(公告)号：US20170025338A1

公开(公告)日：2017-01-26

申请号：US15204604

申请日：2016-07-07

Applicant: Semiconductor Components Industries, LLC

Inventor： Balaji Padmanabhan ,  Prasad Venkatraman ,  Ali Salih ,  Chun-Li Liu

IPC: H01L23/495 ,  H01L21/48 ,  H01L25/00 ,  H01L25/07

CPC classification number: H01L23/49575 ,  H01L23/49524 ,  H01L23/49531 ,  H01L23/49562 ,  H01L25/074 ,  H01L25/50 ,  H01L2224/0603 ,  H01L2224/16245 ,  H01L2224/40 ,  H01L2224/40245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/00014 ,  H01L2224/37099

Abstract: In accordance with an embodiment, a semiconductor component includes a support having first and second device receiving structures. A semiconductor device configured from a III-N semiconductor material is coupled to the support, wherein the semiconductor device has opposing surfaces. A first bond pad extends from a first portion of the first surface, a second bond pad extends from a second portion of the first surface, and a third bond pad extends from a third portion of the first surface. The first bond pad is coupled to the first device receiving portion, the drain bond pad is coupled to the second device receiving portion, and the third bond pad is coupled to the third lead. In accordance with another embodiment, a method includes coupling a semiconductor chip comprising a III-N semiconductor substrate material to a support.

Abstract translation: 根据实施例，半导体部件包括具有第一和第二器件接收结构的支撑件。 由III-N半导体材料配置的半导体器件耦合到支撑件，其中半导体器件具有相对的表面。 第一接合焊盘从第一表面的第一部分延伸，第二接合焊盘从第一表面的第二部分延伸，并且第三接合焊盘从第一表面的第三部分延伸。 第一接合焊盘耦合到第一器件接收部分，漏极接合焊盘耦合到第二器件接收部分，并且第三接合焊盘耦合到第三引线。 根据另一实施例，一种方法包括将包括III-N半导体衬底材料的半导体芯片耦合到支撑体。

公开(公告)号：US20170025328A1

公开(公告)日：2017-01-26

申请号：US15202917

申请日：2016-07-06

Applicant: Semiconductor Components Industries, LLC

Inventor： Chun-Li Liu ,  Ali Salih ,  Mingjiao Liu

IPC: H01L23/495 ,  H01L21/48 ,  H01L23/40 ,  H01L21/52 ,  H01L29/20 ,  H01L23/00

CPC classification number: H01L21/4853 ,  H01L21/52 ,  H01L23/492 ,  H01L23/49524 ,  H01L23/49562 ,  H01L23/49575 ,  H01L23/49844 ,  H01L23/49861 ,  H01L24/00 ,  H01L24/48 ,  H01L24/49 ,  H01L29/2003 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/0603 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2924/00014 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: In accordance with an embodiment, a semiconductor component includes a support having a side in which a device receiving structure and an interconnect structure are formed and a side from which a plurality of leads extends. A semiconductor device having a control terminal and first and second current carrying terminals and configured from a III-N semiconductor material is mounted to the device receiving structure. The control terminal of the first electrical interconnect is coupled to a first lead by a first electrical interconnect. A second electrical interconnect is coupled between the first current carrying terminal of the semiconductor device and a second lead. The second current carrying terminal of the first semiconductor device is coupled to the device receiving structure or to the interconnect structure.

Abstract translation: 根据实施例，半导体部件包括具有其中形成器件接收结构和互连结构的一侧的支撑体以及多个引线从该侧延伸的一侧。 具有控制端子和第一和第二载流端子并由III-N半导体材料构成的半导体器件被安装到器件接收结构。 第一电互连的控制端通过第一电互连耦合到第一引线。 第二电互连耦合在半导体器件的第一载流端子和第二引线之间。 第一半导体器件的第二载流端子耦合到器件接收结构或互连结构。

公开(公告)号：US09214423B2

公开(公告)日：2015-12-15

申请号：US14174500

申请日：2014-02-06

Applicant: Semiconductor Components Industries, LLC

Inventor： Ali Salih ,  Chun-Li Liu ,  Gordon M. Grivna

IPC: H01L29/49 ,  H01L23/498 ,  H01L29/66 ,  H01L29/778 ,  H01L21/768 ,  H01L21/78 ,  H01L23/482 ,  H01L29/20 ,  H01L21/683 ,  H01L23/00

CPC classification number: H01L23/5226 ,  H01L21/6836 ,  H01L21/76898 ,  H01L21/78 ,  H01L23/4824 ,  H01L23/49827 ,  H01L23/53228 ,  H01L23/53242 ,  H01L23/5329 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/37 ,  H01L24/40 ,  H01L24/48 ,  H01L24/84 ,  H01L29/2003 ,  H01L29/66462 ,  H01L29/778 ,  H01L29/7787 ,  H01L2221/68327 ,  H01L2224/0345 ,  H01L2224/0346 ,  H01L2224/0347 ,  H01L2224/04034 ,  H01L2224/05111 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05639 ,  H01L2224/05647 ,  H01L2224/06181 ,  H01L2224/37012 ,  H01L2224/37013 ,  H01L2224/37124 ,  H01L2224/37147 ,  H01L2224/3716 ,  H01L2224/37187 ,  H01L2224/3719 ,  H01L2224/37639 ,  H01L2224/37644 ,  H01L2224/37647 ,  H01L2224/37655 ,  H01L2224/37664 ,  H01L2224/40499 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2224/84801 ,  H01L2224/84815 ,  H01L2224/8485 ,  H01L2924/00014 ,  H01L2924/12032 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13063 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/00 ,  H01L2924/01028 ,  H01L2924/014 ,  H01L2924/0105 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/00012 ,  H01L2924/01029 ,  H01L2924/07811 ,  H01L2224/45099

Abstract: In one embodiment, a method of forming a HEMT device may include plating a conductor or a plurality of conductors onto an insulator that overlies a plurality of current carrying electrodes of the HEMT device. The method may also include attaching a connector onto the conductor or attaching a plurality of connectors onto the plurality of conductors.

Abstract translation: 在一个实施例中，形成HEMT器件的方法可以包括将导体或多个导体电镀到覆盖在HEMT器件的多个载流电极上的绝缘体上。 该方法还可以包括将连接器附接到导体上或者将多个连接器附接到多个导体上。

公开(公告)号：US20140264452A1

公开(公告)日：2014-09-18

申请号：US14174500

申请日：2014-02-06

Applicant: Semiconductor Components Industries, LLC

Inventor： Ali Salih ,  Chun-Li Liu ,  Gordon M. Grivna

IPC: H01L23/498 ,  H01L21/768

CPC classification number: H01L23/5226 ,  H01L21/6836 ,  H01L21/76898 ,  H01L21/78 ,  H01L23/4824 ,  H01L23/49827 ,  H01L23/53228 ,  H01L23/53242 ,  H01L23/5329 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/37 ,  H01L24/40 ,  H01L24/48 ,  H01L24/84 ,  H01L29/2003 ,  H01L29/66462 ,  H01L29/778 ,  H01L29/7787 ,  H01L2221/68327 ,  H01L2224/0345 ,  H01L2224/0346 ,  H01L2224/0347 ,  H01L2224/04034 ,  H01L2224/05111 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05639 ,  H01L2224/05647 ,  H01L2224/06181 ,  H01L2224/37012 ,  H01L2224/37013 ,  H01L2224/37124 ,  H01L2224/37147 ,  H01L2224/3716 ,  H01L2224/37187 ,  H01L2224/3719 ,  H01L2224/37639 ,  H01L2224/37644 ,  H01L2224/37647 ,  H01L2224/37655 ,  H01L2224/37664 ,  H01L2224/40499 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2224/84801 ,  H01L2224/84815 ,  H01L2224/8485 ,  H01L2924/00014 ,  H01L2924/12032 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13063 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/00 ,  H01L2924/01028 ,  H01L2924/014 ,  H01L2924/0105 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/00012 ,  H01L2924/01029 ,  H01L2924/07811 ,  H01L2224/45099

Abstract: In one embodiment, a method of forming a HEMT device may include plating a conductor or a plurality of conductors onto an insulator that overlies a plurality of current carrying electrodes of the HEMT device. The method may also include attaching a connector onto the conductor or attaching a plurality of connectors onto the plurality of conductors.

Abstract translation: 在一个实施例中，形成HEMT器件的方法可以包括将导体或多个导体电镀到覆盖在HEMT器件的多个载流电极上的绝缘体上。 该方法还可以包括将连接器附接到导体上或者将多个连接器附接到多个导体上。

公开(公告)号：US10741653B2

公开(公告)日：2020-08-11

申请号：US16569218

申请日：2019-09-12

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Woochul Jeon ,  Chun-Li Liu

IPC: H01L29/417 ,  H01L29/778 ,  H01L29/20 ,  H01L23/535 ,  H01L23/482 ,  H01L29/423

Abstract: Implementations of semiconductor devices may include: a first layer with a plurality of cells, each cell having a drain finger, a source finger and a gate ring; a second layer having a drain pad and a source pad, the drain pad having a width and a source pad having a width substantially the same as the drain pad; wherein a width of each drain finger of the first layer is wider than a width of each source finger of the first layer; and wherein each drain pad is coupled to each drain finger through a first contact and the source pad is coupled to each source finger through a second contact, where a width of the first contact is wider than a width of the second contact.

公开(公告)号：US10707203B2

公开(公告)日：2020-07-07

申请号：US16225930

申请日：2018-12-19

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Balaji Padmanabhan ,  Prasad Venkatraman ,  Zia Hossain ,  Chun-Li Liu ,  Woochul Jeon ,  Jason McDonald

IPC: H01L27/06 ,  H01L21/8258 ,  H01L21/74 ,  H01L23/367 ,  H01L29/417 ,  H01L29/778 ,  H01L29/10 ,  H01L27/02 ,  H01L29/872 ,  H01L29/20 ,  H01L23/48 ,  H01L29/861

Abstract: A method for forming a cascode rectifier structure includes providing a group III-V semiconductor structure includes a heterostructure disposed on a semiconductor substrate. A first current carrying electrode and a second current carrying electrode are provided adjacent a major surface of the heterostructure and a control electrode is provided between the first and second current carrying electrode. A rectifier device is provided integrated with the group III-V semiconductor structure and is electrically connected to the first current carrying electrode and to a third electrode. The control electrode is provided further electrically connected to the semiconductor substrate and the second current path is generally perpendicular to a primary current path between the first and second current carrying electrodes. The cascode rectifier structure is provided as a two terminal device.

公开(公告)号：US10431525B2

公开(公告)日：2019-10-01

申请号：US16054254

申请日：2018-08-03

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Woochul Jeon ,  Chun-Li Liu

IPC: H01L23/48 ,  H01L23/482 ,  H01L29/778 ,  H01L29/20 ,  H01L29/417 ,  H01L23/535

Abstract: Implementations of semiconductor devices may include: a first layer with a plurality of cells, each cell having a drain finger, a source finger and a gate ring; a second layer having a drain pad and a source pad, the drain pad having a width and a source pad having a width substantially the same as the drain pad; wherein a width of each drain finger of the first layer is wider than a width of each source finger of the first layer; and wherein each drain pad is coupled to each drain finger through a first contact and the source pad is coupled to each source finger through a second contact, where a width of the first contact is wider than a width of the second contact.

公开(公告)号：US10312359B2

公开(公告)日：2019-06-04

申请号：US15955555

申请日：2018-04-17

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Woochul Jeon ,  Chun-Li Liu ,  Ali Salih

IPC: H01L29/778 ,  H01L23/495 ,  H01L27/088 ,  H01L29/06 ,  H01L29/16 ,  H01L29/20 ,  H01L29/40 ,  H01L29/417 ,  H01L29/423 ,  H01L23/58 ,  H01L29/10

Abstract: Implementations of semiconductor devices may include: a plurality of drain fingers and a plurality of source fingers interdigitated with one another; at least one gate; and at gate bus formed to completely surround the plurality of drain fingers and the plurality of source fingers; wherein the gate bus is mechanically and electrically coupled to the at least one gate.

公开(公告)号：US10199373B2

公开(公告)日：2019-02-05

申请号：US15648211

申请日：2017-07-12

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Balaji Padmanabhan ,  Prasad Venkatraman ,  Zia Hossain ,  Chun-Li Liu ,  Jason McDonald ,  Ali Salih ,  Alexander Young

IPC: H01L29/417 ,  H01L27/06 ,  H01L27/02 ,  H01L23/367 ,  H01L29/778 ,  H01L29/10 ,  H01L21/8258 ,  H01L21/74 ,  H01L29/872 ,  H01L23/48 ,  H01L29/861 ,  H01L29/20

Abstract: A cascode switch structure includes a group III-V transistor structure having a first current carrying electrode, a second current carrying electrode and a first control electrode. A semiconductor MOSFET device includes a third current carrying electrode electrically connected to the first current carrying electrode, a fourth current carrying electrode electrically connected to the first control electrode, and a second control electrode. A first diode includes a first cathode electrode electrically connected to the second current carrying electrode and a first anode electrode. A second diode includes a second anode electrode electrically connected to the first anode electrode and a second cathode electrode electrically connected to the fourth current carrying electrode. In one embodiment, the group III-V transistor structure, the first diode, and the second diode are integrated within a common substrate.

公开(公告)号：US10163764B2

公开(公告)日：2018-12-25

申请号：US15690773

申请日：2017-08-30

Applicant: Semiconductor Components Industries, LLC

Inventor： Chun-Li Liu ,  Ali Salih ,  Balaji Padmanabhan ,  Mingjiao Liu

IPC: H01L23/495 ,  H01L25/18 ,  H01L23/00 ,  H01L23/498 ,  H01L29/20 ,  H01L29/16 ,  H01L23/373

Abstract: A semiconductor component includes a support having a lead integrally formed thereto. An insulated metal substrate is mounted to a surface of the support and a semiconductor chip is mounted to the insulated metal substrate. A III-N based semiconductor chip is mounted to the insulated metal substrate, where the III-N based semiconductor chip has a gate bond pad, a drain bond pad, and a source bond pad. A silicon based semiconductor chip is mounted to the III-N based semiconductor chip. In accordance with an embodiment the silicon based semiconductor chip includes a device having a gate bond pad, a drain bond pad, and a source bond pad. The drain bond pad of the III-N based semiconductor chip may be bonded to the substrate or to a lead. In accordance with another embodiment, the silicon based semiconductor chip is a diode.