公开(公告)号：US20110084248A1

公开(公告)日：2011-04-14

申请号：US12578496

申请日：2009-10-13

申请人： Chun-I Hsieh ,  Chang-Rong Wu

发明人： Chun-I Hsieh ,  Chang-Rong Wu

IPC分类号： H01L47/00 ,  H01L29/12

CPC分类号： G11C13/003 ,  G11C13/0007 ,  G11C13/0011 ,  G11C2213/31 ,  G11C2213/75 ,  G11C2213/76 ,  H01L27/2409 ,  H01L27/2463 ,  H01L27/2481 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/147

摘要： Cross point memory arrays with CBRAM and RRAM stacks are presented. A cross point memory array includes a first group of substantially parallel conductive lines and a second group of substantially parallel conductive lines, oriented substantially perpendicular to the first group of substantially parallel conductive lines. An array of memory stack is located at the intersections of the first group of substantially parallel conductive lines and the second group of substantially parallel conductive lines, wherein each memory stack comprises a conductive bridge memory element in series with a resistive-switching memory element.

摘要翻译： 提出了具有CBRAM和RRAM堆栈的交叉点存储器阵列。 交叉点存储器阵列包括第一组基本平行的导线和基本上垂直于第一组基本上平行的导线定向的基本上平行的导线的第二组。 存储器堆叠阵列位于第一组基本上平行的导线和第二组基本上平行的导线之间的交叉处，其中每个存储器堆叠包括与电阻式切换存储器元件串联的导电桥式存储器元件。

公开(公告)号：US20100072449A1

公开(公告)日：2010-03-25

申请号：US12324841

申请日：2008-11-27

申请人： Chun-I Hsieh ,  Chang-Rong Wu ,  Neng-Tai Shih ,  Kou-Chen Liu

发明人： Chun-I Hsieh ,  Chang-Rong Wu ,  Neng-Tai Shih ,  Kou-Chen Liu

IPC分类号： H01L21/04 ,  H01L45/00

CPC分类号： H01L45/08 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/146 ,  H01L45/16

摘要： A method for fabricating an RRAM is provided. First, a bottom electrode is formed. A resistive layer is formed on the bottom electrode. A top electrode is then formed on the resistive layer, wherein the top electrode is selected from the group consisting of indium tin oxide (ITO) and indium zinc oxide (IZO). Finally, the top electrode is irradiated with UV light.

摘要翻译： 提供了一种制造RRAM的方法。 首先，形成底部电极。 电阻层形成在底部电极上。 然后在电阻层上形成顶部电极，其中顶部电极选自氧化铟锡（ITO）和氧化铟锌（IZO）。 最后，用紫外光照射顶部电极。

公开(公告)号：US07232718B2

公开(公告)日：2007-06-19

申请号：US10605234

申请日：2003-09-17

申请人： Chih-Han Chang ,  Hsin-Jung Ho ,  Chang-Rong Wu ,  Chien-Jung Sun

发明人： Chih-Han Chang ,  Hsin-Jung Ho ,  Chang-Rong Wu ,  Chien-Jung Sun

IPC分类号： H01L21/8242

CPC分类号： H01L27/1087

摘要： A method for forming a deep trench capacitor buried plate. A substrate having a pad oxide and a pad nitride is provided. A deep trench is formed in the substrate. A doped silicate film is deposited on a sidewall of the deep trench. A sacrificial layer is deposited in the deep trench, and etched back to expose parts of the doped silicate film. Then, an etching process is performed to remove the exposed doped silicate film and parts of the pad oxide for forming a recess. The sacrificial layer is removed. A silicon nitride layer is deposited to fill the recess and to cover the doped silicate film. Finally, a thermal oxidation process is performed to form a doped ion region. The silicon nitride layer is removed. The doped silicate film is removed.

摘要翻译： 一种形成深沟槽电容器掩埋板的方法。 提供具有衬垫氧化物和衬垫氮化物的衬底。 在衬底中形成深沟槽。 掺杂的硅酸盐膜沉积在深沟槽的侧壁上。 牺牲层沉积在深沟槽中，并被回蚀以暴露部分掺杂的硅酸盐膜。 然后，进行蚀刻处理以去除暴露的掺杂硅酸盐膜和用于形成凹槽的衬垫氧化物的一部分。 牺牲层被去除。 沉积氮化硅层以填充凹部并覆盖掺杂的硅酸盐膜。 最后，进行热氧化工艺以形成掺杂的离子区域。 去除氮化硅层。 去除掺杂的硅酸盐膜。

公开(公告)号：US07154159B2

公开(公告)日：2006-12-26

申请号：US10784203

申请日：2004-02-24

申请人： Chien-Chang Cheng ,  Shing-Yih Shih ,  Chang-Rong Wu

发明人： Chien-Chang Cheng ,  Shing-Yih Shih ,  Chang-Rong Wu

IPC分类号： H01L29/00

CPC分类号： H01L21/76224

摘要： A trench isolation structure and a method of forming a trench isolation structure are provided. The method includes providing a substrate having a trench. A polysilicon liner is formed in the trench. A dielectric layer, such as spin-on glass, is formed in the trench upon the polysilicon liner.

摘要翻译： 提供了沟槽隔离结构和形成沟槽隔离结构的方法。 该方法包括提供具有沟槽的衬底。 在沟槽中形成多晶硅衬垫。 在多晶硅衬垫上的沟槽中形成介电层，例如旋涂玻璃。

公开(公告)号：US07138338B2

公开(公告)日：2006-11-21

申请号：US10810804

申请日：2004-03-29

申请人： Chang-Rong Wu ,  Yinan Chen ,  Tuz-Ching Tsai

发明人： Chang-Rong Wu ,  Yinan Chen ,  Tuz-Ching Tsai

IPC分类号： H01L21/311

CPC分类号： H01L21/3081 ,  H01L21/0332 ,  H01L21/76224 ,  H01L29/66181

摘要： A method and structure for forming deep trenches in a semiconductor substrate is provided. The method comprises: providing a semiconductor substrate; forming a pad oxide layer on the semiconductor substrate; forming a pad nitride layer on the pad oxide layer; forming a borophosphosilicate glass layer on the pad nitride layer; forming a borosilicate glass layer on the borophosphosilicate glass layer; and forming deep trenches through the borosilicate glass layer, through the borophosphosilicate glass layer, through the pad nitride, through the pad oxide, and into the semiconductor substrate. The borosilicate glass layer and the borophosphosilicate glass layer function as a composite hard mask in forming the deep trenches. With the borophosphosilicate glass layer, the composite hard mask can be easily removed by dry etch process using hydrogen fluoride vapor after the deep trenches have been formed.

摘要翻译： 提供了一种在半导体衬底中形成深沟槽的方法和结构。 该方法包括：提供半导体衬底; 在所述半导体衬底上形成衬垫氧化物层; 在所述焊盘氧化物层上形成衬垫氮化物层; 在衬垫氮化物层上形成硼磷硅酸盐玻璃层; 在硼磷硅酸盐玻璃层上形成硼硅酸盐玻璃层; 并通过硼硅酸盐玻璃层，通过硼磷硅酸盐玻璃层，通过衬垫氮化物，通过衬垫氧化物形成深沟槽并进入半导体衬底。 硼硅酸盐玻璃层和硼磷硅酸盐玻璃层在形成深沟槽时用作复合硬掩模。 对于硼磷硅酸盐玻璃层，在形成深沟槽之后，可以通过使用氟化氢蒸气的干法蚀刻工艺容易地去除复合硬掩模。

公开(公告)号：US20130075812A1

公开(公告)日：2013-03-28

申请号：US13239389

申请日：2011-09-22

申请人： Hsin-Jung Ho ,  Jeng-Ping Lin ,  Neng-Tai Shih ,  Chang-Rong Wu ,  Chiang-Hung Lin ,  Chih-Huang Wu

发明人： Hsin-Jung Ho ,  Jeng-Ping Lin ,  Neng-Tai Shih ,  Chang-Rong Wu ,  Chiang-Hung Lin ,  Chih-Huang Wu

IPC分类号： H01L29/78

CPC分类号： H01L21/823431 ,  H01L21/845 ,  H01L27/10826 ,  H01L27/10879 ,  H01L29/66795 ,  H01L29/785

摘要： A single-sided access device includes an active fin structure comprising a source contact area and a drain contact area separated from each other by an isolation region therebetween; a trench isolation structure disposed at one side of the active fin structure, wherein the trench isolation structure intersects with the isolation region between the source contact area and the drain contact area; a sidewall gate disposed under the isolation region and on the other side of the active fin structure opposite to the trench isolation structure so that the active fin structure is sandwiched by the trench isolation structure and the sidewall gate, wherein the sidewall gate has multi-fingers that engage with the active fin structure; and a gate dielectric layer between the sidewall gate and the active fin structure.

摘要翻译： 单面存取装置包括活动鳍片结构，其包括源极接触区域和通过它们之间的隔离区域彼此分离的漏极接触区域; 沟槽隔离结构，设置在所述有源鳍结构的一侧，其中所述沟槽隔离结构与所述源极接触区域和所述漏极接触区域之间的隔离区域相交; 侧壁门，其设置在所述隔离区域下方并且在所述有源鳍结构的另一侧与所述沟槽隔离结构相对，使得所述有源鳍结构被所述沟槽隔离结构和所述侧壁栅极夹持，其中所述侧壁门具有多指 与活跃的鳍结构互动; 以及在侧壁浇口和活性鳍结构之间的栅介质层。

公开(公告)号：US08395209B1

公开(公告)日：2013-03-12

申请号：US13239389

申请日：2011-09-22

申请人： Hsin-Jung Ho ,  Jeng-Ping Lin ,  Neng-Tai Shih ,  Chang-Rong Wu ,  Chiang-Hung Lin ,  Chih-Huang Wu

发明人： Hsin-Jung Ho ,  Jeng-Ping Lin ,  Neng-Tai Shih ,  Chang-Rong Wu ,  Chiang-Hung Lin ,  Chih-Huang Wu

IPC分类号： H01L29/66

CPC分类号： H01L21/823431 ,  H01L21/845 ,  H01L27/10826 ,  H01L27/10879 ,  H01L29/66795 ,  H01L29/785

摘要： A single-sided access device includes an active fin structure comprising a source contact area and a drain contact area separated from each other by an isolation region therebetween; a trench isolation structure disposed at one side of the active fin structure, wherein the trench isolation structure intersects with the isolation region between the source contact area and the drain contact area; a sidewall gate disposed under the isolation region and on the other side of the active fin structure opposite to the trench isolation structure so that the active fin structure is sandwiched by the trench isolation structure and the sidewall gate, wherein the sidewall gate has multi-fingers that engage with the active fin structure; and a gate dielectric layer between the sidewall gate and the active fin structure.

摘要翻译： 单面存取装置包括活动鳍片结构，其包括源极接触区域和通过它们之间的隔离区域彼此分离的漏极接触区域; 沟槽隔离结构，设置在所述有源鳍结构的一侧，其中所述沟槽隔离结构与所述源极接触区域和所述漏极接触区域之间的隔离区域相交; 侧壁门，其设置在所述隔离区域下方并且在所述有源鳍结构的另一侧与所述沟槽隔离结构相对，使得所述有源鳍结构被所述沟槽隔离结构和所述侧壁栅极夹持，其中所述侧壁门具有多指 与活跃的鳍结构互动; 以及在侧壁浇口和活性鳍结构之间的栅介质层。

公开(公告)号：US20110241138A1

公开(公告)日：2011-10-06

申请号：US12750716

申请日：2010-03-31

申请人： Chun-I Hsieh ,  Chang-Rong Wu

发明人： Chun-I Hsieh ,  Chang-Rong Wu

IPC分类号： H01L29/82 ,  H01L21/00

CPC分类号： H01L43/12 ,  B82Y25/00 ,  B82Y40/00 ,  G11C11/161 ,  H01F10/3254 ,  H01F41/308 ,  H01L43/02 ,  H01L43/08 ,  H01L43/10

摘要： A magnetoresistive random access memory (MRAM) element includes a bottom electrode embedded in a first insulating layer; an annular reference layer in a first via hole of a second insulating layer on the first insulating layer, the annular reference layer being situated above the bottom electrode; a first gap fill material layer filling the first via hole; a barrier layer covering the annular reference layer, the second insulating layer and the first gap fill material layer; an annular free layer in a second via hole of a third insulating layer on the second insulating layer, the annular free layer being situated above the annular reference layer; and a top electrode stacked on the annular free layer.

摘要翻译： 磁阻随机存取存储器（MRAM）元件包括嵌入第一绝缘层中的底电极; 在所述第一绝缘层上的第二绝缘层的第一通孔中的环形参考层，所述环形参考层位于所述底部电极的上方; 填充第一通孔的第一间隙填充材料层; 覆盖所述环形基准层，所述第二绝缘层和所述第一间隙填充材料层的阻挡层; 在所述第二绝缘层上的第三绝缘层的第二通孔中的环形自由层，所述环形自由层位于所述环形参考层的上方; 以及堆叠在环形自由层上的顶部电极。

公开(公告)号：US20050059207A1

公开(公告)日：2005-03-17

申请号：US10605234

申请日：2003-09-17

申请人： Chih-Han Chang ,  Hsin-Jung Ho ,  Chang-Rong Wu ,  Chien-Jung Sun

发明人： Chih-Han Chang ,  Hsin-Jung Ho ,  Chang-Rong Wu ,  Chien-Jung Sun

IPC分类号： H01L21/20 ,  H01L21/8242

CPC分类号： H01L27/1087

摘要： A method for forming a deep trench capacitor buried plate. A substrate having a pad oxide and a pad nitride is provided. A deep trench is formed in the substrate. A doped silicate film is deposited on a sidewall of the deep trench. A sacrificial layer is deposited in the deep trench, and etched back to expose parts of the doped silicate film. Then, an etching process is performed to remove the exposed doped silicate film and parts of the pad oxide for forming a recess. The sacrificial layer is removed. A silicon nitride layer is deposited to fill the recess and to cover the doped silicate film. Finally, a thermal oxidation process is performed to form a doped ion region. The silicon nitride layer is removed. The doped silicate film is removed.

摘要翻译： 一种形成深沟槽电容器掩埋板的方法。 提供具有衬垫氧化物和衬垫氮化物的衬底。 在衬底中形成深沟槽。 掺杂的硅酸盐膜沉积在深沟槽的侧壁上。 牺牲层沉积在深沟槽中，并被回蚀以暴露部分掺杂的硅酸盐膜。 然后，进行蚀刻处理以去除暴露的掺杂硅酸盐膜和用于形成凹槽的衬垫氧化物的一部分。 牺牲层被去除。 沉积氮化硅层以填充凹部并覆盖掺杂的硅酸盐膜。 最后，进行热氧化工艺以形成掺杂的离子区域。 去除氮化硅层。 去除掺杂的硅酸盐膜。

公开(公告)号：US20050048763A1

公开(公告)日：2005-03-03

申请号：US10727966

申请日：2003-12-04

申请人： Kaan-Lu Tzou ,  Yan-Hong Chen ,  Yi-Nan Chen ,  Chang-Rong Wu

发明人： Kaan-Lu Tzou ,  Yan-Hong Chen ,  Yi-Nan Chen ,  Chang-Rong Wu

IPC分类号： H01L21/3105 ,  H01L21/316 ,  H01L21/768 ,  H01L21/4763 ,  H01L21/31 ,  H01L21/469

CPC分类号： H01L21/02129 ,  H01L21/0234 ,  H01L21/02362 ,  H01L21/3105 ,  H01L21/31612 ,  H01L21/31625 ,  H01L21/76802 ,  H01L21/76819 ,  H01L21/76826 ,  H01L21/76829

摘要： A method of forming an interlayer dielectric (ILD) layer. A dielectric layer containing boron and phosphorous is formed overlying a substrate. A plasma treatment is subsequently performed on the dielectric layer using argon or nitrogen as a process gas. A capping layer is formed in-situ overlying the dielectric layer to serve as the ILD layer with the dielectric layer. A reflow process is subsequently performed on the ILD layer. A method for preventing formation of etching defects in a contact is also disclosed.