公开(公告)号：US09735456B2

公开(公告)日：2017-08-15

申请号：US14783617

申请日：2014-04-14

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Yasufumi Kawai ,  Shuichi Nagai ,  Daisuke Ueda

IPC: H01P5/02 ,  H01P1/201 ,  H01L23/66 ,  H01L25/065 ,  H01P7/10 ,  H01P1/203 ,  H01P7/00 ,  H02J17/00 ,  H01P5/18 ,  H01L23/498

CPC classification number: H01P1/201 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/66 ,  H01L25/0655 ,  H01L2224/16 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2924/15311 ,  H01L2924/19107 ,  H01P1/20345 ,  H01P1/20381 ,  H01P5/187 ,  H01P7/10 ,  H02J17/00 ,  H02J50/12 ,  H02J50/70 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A high-frequency transmission device includes first and second resonators as ring-shaped wires each having an opening part at a part thereof, first and second input/output terminals each electrically connected to both resonators, a first ground shield formed on a plane different from planes on which both resonators are arranged, a second ground shield formed on a plane different from the planes on which both resonators and the first ground shield are arranged, and first and second ground wires each formed to surround peripheries of both resonators. The ground shields and the ground wires are respectively connected to each other. A dielectric wire is present between both ground wires, and the ground wires are not electrically connected to each other.

公开(公告)号：US20170094831A1

公开(公告)日：2017-03-30

申请号：US15271635

申请日：2016-09-21

Applicant: LAIRD TECHNOLOGIES, INC.

Inventor： Mohammadali Khorrami ,  Paul Francis Dixon

IPC: H05K7/20 ,  H05K1/02 ,  H05K9/00 ,  H01P1/201

CPC classification number: H05K7/2039 ,  H01L23/34 ,  H01L23/3737 ,  H01P1/201 ,  H01P3/12 ,  H05K1/0203 ,  H05K1/0216 ,  H05K9/0032 ,  H05K9/0081 ,  H05K2201/10371

Abstract: According to various aspects, exemplary embodiments are disclosed of thermal interface materials including electrically-conductive material, shields including thermal interface materials, and related methods. In an exemplary embodiment, a thermal interface material generally includes a top surface, a bottom surface, and one or more outer side surfaces extending between the top and bottom surfaces. Electrically-conductive material is along and/or adjacent the one or more outer side surfaces. The thermal interface material may be configured to be operable as a waveguide through which energy below a cutoff frequency cannot flow. The electrically-conductive material may be parallel with a direction of heat flow from a heat source to a heat removal/dissipation structure when the bottom surface is positioned against or adjacent the heat source and the top surface is positioned adjacent or against the heat removal/dissipation structure.

公开(公告)号：US20170077574A1

公开(公告)日：2017-03-16

申请号：US15218626

申请日：2016-07-25

Applicant: QUALCOMM Incorporated

Inventor： John Jong-Hoon Lee ,  Young Kyu Song ,  Uei-Ming Jow ,  Sangjo Choi ,  Xiaonan Zhang

IPC: H01P1/207 ,  H01L23/66 ,  H01L21/48 ,  H01L23/60 ,  H01L23/522 ,  H05K1/02 ,  H01L23/00

CPC classification number: H01P1/207 ,  H01L21/4853 ,  H01L23/5222 ,  H01L23/5227 ,  H01L23/552 ,  H01L23/60 ,  H01L23/66 ,  H01L24/16 ,  H01L28/10 ,  H01L28/40 ,  H01L2223/6627 ,  H01L2223/6666 ,  H01L2223/6672 ,  H01L2224/10 ,  H01L2224/16227 ,  H01P1/201 ,  H01P7/06 ,  H01P7/065 ,  H03B5/1817 ,  H05K1/0243

Abstract: A flip-chip employing an integrated cavity filter is disclosed comprising an integrated circuit (IC) chip comprising a semiconductor die and a plurality of conductive bumps. The plurality of conductive bumps is interconnected to at least one metal layer of the semiconductor die to provide a conductive “fence” that defines an interior resonator cavity for providing an integrated cavity filter in the flip-chip. The interior resonator cavity is configured to receive an input RF signal from an input transmission line through an input signal transmission aperture provided in an internal layer in the semiconductor die. The interior resonator cavity resonates the input RF signal to generate the output RF signal comprising a filtered RF signal of the input RF signal, and couples the output RF signal on an output signal transmission line in the flip-chip through an output transmission aperture provided in the aperture layer.

Abstract translation: 公开了一种采用集成腔滤波器的倒装芯片，其包括集成电路（IC）芯片，其包括半导体管芯和多个导电凸块。 多个导电凸块互连到半导体管芯的至少一个金属层，以提供限定用于在倒装芯片中提供集成腔滤波器的内部谐振腔的导电“栅栏”。 内部谐振腔被配置为通过设置在半导体管芯中的内层中的输入信号传输孔从输入传输线接收输入RF信号。 内部谐振器腔谐振输入RF信号以产生包括输入RF信号的滤波RF信号的输出RF信号，并且通过输出传输孔将输出RF信号耦合在倒装芯片中的输出信号传输线上 孔径层。

公开(公告)号：US20160359215A1

公开(公告)日：2016-12-08

申请号：US15168938

申请日：2016-05-31

Applicant: TOKO, INC.

Inventor： Yukikazu YATABE

IPC: H01P1/213 ,  H01P1/201 ,  H01P1/20 ,  H01P7/10

CPC classification number: H01P1/2002 ,  H01P1/201 ,  H01P1/2088 ,  H01P1/213 ,  H01P7/10

Abstract: Dielectric waveguide comprising a plurality of resonator groups disposed on a substrate, wherein each of the resonator groups comprises one or more integrally-formed resonators, each obtained by coating a dielectric body with a conductor film, wherein each resonator group in at least a set of resonator groups of the plurality of resonator groups comprises waveguide-side slot exposing the dielectric body in a bottom surface thereof, wherein the substrate comprises a cavity surrounded by conductor patterns formed in the upper and lower surfaces, and by a via hole connecting the conductor patterns in the upper and lower surfaces, wherein the cavity comprises a set of substrate-side slots exposing the core material, the set of substrate-side slots being provided at a position to which waveguide-side slots of the set of resonator groups are opposed, and wherein resonator groups in the set of resonator groups are coupled together via the cavity.

Abstract translation: 介质波导，包括设置在基板上的多个谐振器组，其中每个谐振器组包括一个或多个整体形成的谐振器，每个共振器通过用导体膜涂覆电介质体而获得，其中每个谐振器组在至少一组 多个谐振器组的谐振器组包括在其底表面中暴露电介质体的波导侧槽，其中，所述衬底包括由形成在上表面和下表面中的导体图案包围的空腔，以及连接导体图案的通孔 在所述上表面和下表面中，所述空腔包括暴露所述芯材料的一组基板侧槽，所述一组基板侧槽设置在所述一组谐振器组的波导侧槽相对的位置处， 并且其中该组谐振器组中的谐振器组经由空腔耦合在一起。

公开(公告)号：US09515362B2

公开(公告)日：2016-12-06

申请号：US13774363

申请日：2013-02-22

Applicant: CommScope Italy S.r.l.

Inventor： Stefano Tamiazzo ,  Giuseppe Resnati

IPC: H01P1/205 ,  H01P7/04 ,  H01P1/203 ,  H01P1/201 ,  H01P11/00 ,  H01P1/208 ,  H03H7/12 ,  H03H7/01

CPC classification number: H01P1/20309 ,  H01P1/201 ,  H01P1/205 ,  H01P1/2086 ,  H01P7/04 ,  H01P11/00 ,  H01P11/007 ,  H03H7/0123 ,  H03H7/12 ,  H03H7/1791 ,  H03H2250/00 ,  Y10T29/49826

Abstract: A bandpass filter has a combline structure having a plurality of cascaded nodes. A plurality of nodes in the filter are connected both to resonant elements (a.k.a. resonators) and non-resonant elements (including elements having inductances and/or capacitances that do not resonate in a predetermined frequency band of interest). The resonant frequencies of the resonant elements may be adjusted, in order to adjust the location of the center frequency and/or the width of the passband of the filter. The characteristics of the resonant and non-resonant elements are selected such that the poles of the filter, when plotted on the complex plane, move substantially along the imaginary axis when the resonant frequencies are adjusted, without substantial movement along the real axis. The resulting bandpass filter has substantially constant losses and substantially constant absolute selectivity over a relatively wide range of bandwidths.

Abstract translation: 带通滤波器具有具有多个级联节点的梳状结构。 滤波器中的多个节点既连接到谐振元件（例如谐振器）和非共振元件（包括在感兴趣的预定频带中不谐振的电感和/或电容的元件）。 可以调节谐振元件的谐振频率，以便调节滤波器的中心频率的位置和/或通带的宽度。 选择共振和非共振元件的特性，使得当绘制在复平面上时，滤波器的极点在谐振频率被调整时基本沿着虚轴移动，而不沿实际实质运动。 所得到的带通滤波器在相对宽的带宽范围内具有基本恒定的损耗和基本上恒定的绝对选择性。

公开(公告)号：US09443810B1

公开(公告)日：2016-09-13

申请号：US14853802

申请日：2015-09-14

Applicant: QUALCOMM Incorporated

Inventor： John Jong-Hoon Lee ,  Young Kyu Song ,  Uei-Ming Jow ,  Sangjo Choi ,  Xiaonan Zhang

IPC: H01P1/20 ,  H01P7/06 ,  H01L21/00 ,  H01L27/15 ,  H01L23/66 ,  H01L49/02 ,  H01L23/552 ,  H03B5/18 ,  H01P1/201

CPC classification number: H01P1/207 ,  H01L21/4853 ,  H01L23/5222 ,  H01L23/5227 ,  H01L23/552 ,  H01L23/60 ,  H01L23/66 ,  H01L24/16 ,  H01L28/10 ,  H01L28/40 ,  H01L2223/6627 ,  H01L2223/6666 ,  H01L2223/6672 ,  H01L2224/10 ,  H01L2224/16227 ,  H01P1/201 ,  H01P7/06 ,  H01P7/065 ,  H03B5/1817 ,  H05K1/0243

Abstract: A flip-chip employing an integrated cavity filter is disclosed comprising an integrated circuit (IC) chip comprising a semiconductor die and a plurality of conductive bumps. The plurality of conductive bumps is interconnected to at least one metal layer of the semiconductor die to provide a conductive “fence” that defines an interior resonator cavity for providing an integrated cavity filter in the flip-chip. The interior resonator cavity is configured to receive an input RF signal from an input transmission line through an input signal transmission aperture provided in an internal layer in the semiconductor die. The interior resonator cavity resonates the input RF signal to generate the output RF signal comprising a filtered RF signal of the input RF signal, and couples the output RF signal on an output signal transmission line in the flip-chip through an output transmission aperture provided in the aperture layer.

Abstract translation: 公开了一种采用集成腔滤波器的倒装芯片，其包括集成电路（IC）芯片，其包括半导体管芯和多个导电凸块。 多个导电凸块互连到半导体管芯的至少一个金属层，以提供限定用于在倒装芯片中提供集成腔滤波器的内部谐振腔的导电“栅栏”。 内部谐振腔被配置为通过设置在半导体管芯中的内层中的输入信号传输孔从输入传输线接收输入RF信号。 内部谐振器腔谐振输入RF信号以产生包括输入RF信号的滤波RF信号的输出RF信号，并且通过输出传输孔将输出RF信号耦合在倒装芯片中的输出信号传输线上 孔径层。

公开(公告)号：US20160020499A1

公开(公告)日：2016-01-21

申请号：US14790086

申请日：2015-07-02

Applicant: ANRITSU CORPORATION

Inventor： Takashi Kawamura ,  Akihito Otani

IPC: H01P1/207

CPC classification number: H01P1/201 ,  H01P1/042 ,  H01P1/207 ,  H01P5/024

Abstract: In an end surface 32b of the second transmission line forming body 32 forming a second waveguide 30, the height of a central region 33 which includes an opening of the second transmission line 30b is a reference plane. A depressed portion 32e that is depressed to a depth greater than the length of a thread portion of a screw 205 from the reference plane is provided in a region outside the central region 33 and includes a screw hole forming position. A screw hole 32d for fixing an external circuit 200 to be connected is provided at the screw hole forming position in the depressed portion 32e. The height of a region, which is excluding the depressed portion 32e and is further away from the central region 33 than the screw hole forming position, is equal to the reference plane.

Abstract translation: 在形成第二波导30的第二传输线形成体32的端面32b中，包括第二传输线30b的开口的中心区域33的高度是参考平面。 在中心区域33的外侧的区域设有凹陷部，该凹部32e被压入深度大于螺丝205的螺纹部分的距离基准面的长度，并包括螺孔形成位置。 用于固定待连接的外部电路200的螺纹孔32d设置在凹部32e的螺纹孔形成位置。 除了凹部32e并且比螺纹孔形成位置更远离中心区域33的区域的高度等于参考平面。

公开(公告)号：US09077063B2

公开(公告)日：2015-07-07

申请号：US13467886

申请日：2012-05-09

Applicant: Dong-Wan Chun ,  Jae-Won Jang ,  Ki-Soo Shin

Inventor： Dong-Wan Chun ,  Jae-Won Jang ,  Ki-Soo Shin

IPC: H01P1/20 ,  H01P7/10 ,  H01P1/208 ,  H01P1/201

CPC classification number: H01P1/2086 ,  H01P1/201 ,  H01P7/105

Abstract: A multi-mode filter for realizing wide-band is disclosed. The multi-mode filter includes a housing; a plurality of cavities formed in the housing; a plurality of resonators located in each of the cavities; at least one connector formed through a side wall of the housing; and at least one coupling element connected to the at least one connector in the cavities, the at least one coupling element coupling the at least one connector with at least one of the resonators respectively, wherein each of the at least one coupling element has “T” shape in view of front section and “L” shape in view of side section.

Abstract translation: 公开了一种用于实现宽带的多模式滤波器。 多模式过滤器包括壳体; 形成在所述壳体中的多个空腔; 位于每个空腔中的多个谐振器; 通过所述壳体的侧壁形成的至少一个连接器; 以及至少一个耦合元件，其连接到所述空腔中的所述至少一个连接器，所述至少一个耦合元件分别将所述至少一个连接器与所述谐振器中的至少一个耦合，其中所述至少一个耦合元件中的每一个具有“T 从侧面看前视图的形状和“L”形。

公开(公告)号：US20140145898A1

公开(公告)日：2014-05-29

申请号：US14170248

申请日：2014-01-31

Applicant: MURATA MANUFACTURING CO., LTD.

Inventor： Daisuke TOKUDA

IPC: H03H11/02 ,  H01Q1/50 ,  H01P1/201

CPC classification number: H03H11/02 ,  H01L23/5223 ,  H01L23/5227 ,  H01L23/642 ,  H01L23/645 ,  H01L23/66 ,  H01L25/16 ,  H01L2223/6611 ,  H01L2223/6644 ,  H01L2223/6672 ,  H01L2224/48091 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01P1/201 ,  H01Q1/50 ,  H03H7/0115 ,  H03H7/1708 ,  H03H7/1775 ,  H03H7/463 ,  H03H2001/0064 ,  H03H2001/0078 ,  H04B1/0458 ,  H04B1/18 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A high-frequency module includes a semiconductor chip device that is mounted on an external circuit substrate by wire bonding. A switch forming section, a power amplifier forming section and a low noise amplifier forming section, realized by a group of FETs, which are active elements, are formed in the semiconductor chip device. Flat plate electrodes, which form capacitors are formed in the semiconductor chip device. Conductor wires that connect the external circuit substrate and the semiconductor chip device function as inductors. A group of passive elements that includes inductors and capacitors is formed. As a result, a high-frequency module that can be reduced in size while still obtaining the required transmission characteristic is realized.

Abstract translation: 高频模块包括通过引线接合安装在外部电路基板上的半导体芯片器件。 在半导体芯片器件中形成有作为有源元件的由一组FET实现的开关形成部，功率放大器形成部和低噪声放大器形成部。 形成电容器的平板电极形成在半导体芯片器件中。 连接外部电路基板和半导体芯片器件的导体线用作电感器。 形成包括电感器和电容器的一组无源元件。 结果，实现了可以在仍然获得所需传输特性的同时减小尺寸的高频模块。

公开(公告)号：US20140091882A1

公开(公告)日：2014-04-03

申请号：US13632911

申请日：2012-10-01

Applicant: TELEDYNE WIRELESS, LLC

Inventor： Marinus L. KORBER

IPC: H01P1/20

CPC classification number: H01P1/201 ,  H01P1/218 ,  H03H2007/013

Abstract: A Yttrium Iron Garnet (YIG) tuned band reject filter using one or more Shunt YIG resonators provides for much wider minimum rejection bandwidths without increasing maximum 3 db bandwidths or spurious response. Various configurations of a tunable shunt YIG tuned band reject filter achieves a wide rejection bandwidth at the low end of the tuning range while keeping the maximum 3 db bandwidth, normally occurring at the high end of the tuning range, to a minimum.

Abstract translation: 使用一个或多个分流YIG谐振器的钇铁石榴石（YIG）调谐带阻滤波器提供更广泛的最小抑制带宽，而不增加最大3db带宽或杂散响应。 可调谐分流YIG调谐带阻滤波器的各种配置在调谐范围的低端实现了宽的抑制带宽，同时将通常在调谐范围的高端出现的最大3db带宽保持在最小。