公开(公告)号：US07449394B2

公开(公告)日：2008-11-11

申请号：US11179713

申请日：2005-07-11

Applicant: Takeshi Akatsu ,  Nicolas Daval ,  Nguyet-Phuong Nguyen ,  Olivier Rayssac ,  Konstantin Bourdelle

Inventor： Takeshi Akatsu ,  Nicolas Daval ,  Nguyet-Phuong Nguyen ,  Olivier Rayssac ,  Konstantin Bourdelle

IPC: H01L21/46

CPC classification number: H01L21/76254

Abstract: Methods for forming a semiconductor structure are described. In an embodiment, the technique includes providing a donor wafer having a first semiconductor layer and a second semiconductor layer on the first layer and having a free surface; coimplanting two different atomic species through the free surface of the second layer to form a zone of weakness zone in the first layer; bonding the free surface of the second layer to a host wafer; and supplying energy to detach at the zone of weakness a semiconductor structure comprising the host wafer, the second layer and a portion of the first layer. Advantageously, the donor wafer includes a SiGe layer, and the co-implantation of atomic species is conducted according to implantation parameters adapted to enable a first species to form the zone of weakness in the SiGe layer, and to enable a second species to provide a concentration peak located beneath the zone of weakness in the donor wafer to thus minimize surface roughness resulting from detachment at the zone of weakness.

Abstract translation: 描述形成半导体结构的方法。 在一个实施例中，该技术包括提供在第一层上具有第一半导体层和第二半导体层并具有自由表面的施主晶片; 通过第二层的自由表面共同植入两种不同的原子物质，以形成第一层中的弱区; 将第二层的自由表面粘合到主晶片; 并且在弱化区域提供能量以分散包含主晶片，第二层和第一层的一部分的半导体结构。 有利地，施主晶片包括SiGe层，并且根据适于使第一种类形成SiGe层中的弱点区域的植入参数来进行原子物质的共同注入，并且使得第二物质能够提供 浓度峰位于供体晶片中的弱点之下，从而使得在弱化区分离导致的表面粗糙度最小化。

公开(公告)号：US07407867B2

公开(公告)日：2008-08-05

申请号：US11509047

申请日：2006-08-24

Applicant: Bruno Ghyselen ,  Cécile Aulnette ,  Benoĩt Bataillou ,  Carlos Mazure ,  Hubert Moriceau

Inventor： Bruno Ghyselen ,  Cécile Aulnette ,  Benoĩt Bataillou ,  Carlos Mazure ,  Hubert Moriceau

IPC: H01L21/20

CPC classification number: H01L21/76254 ,  Y10S438/977

Abstract: A method for producing a semiconductor structure that includes at least one useful layer on a substrate. This method includes providing a source substrate with a zone of weakness therein that defines a relatively thick useful layer between the zone of weakness and a front face of the source substrate; bonding the front face of the source substrate to a support substrate and detaching the useful layer from the source substrate at the zone of weakness to transfer the useful layer to the support substrate; implanting atomic species into a free face of the useful layer to a controlled mean implantation depth therein to form a zone of weakness within the useful layer that defines front and rear useful layers, with the rear useful layer contacting the source substrate and the front useful layer containing a greater concentration of defects; bonding a stiffening substrate to the free face of the front useful layer after implantation of the atomic species; and detaching the front useful layer from the rear useful layer along the zone of weakness to form a semiconductor structure comprising the support substrate and the rear useful layer thereon. The structures obtained can be used in the fields of electronics, optoelectronics or optics.

Abstract translation: 一种用于制造半导体结构的方法，所述半导体结构在衬底上包括至少一个有用层。 该方法包括提供源极基底中的弱化区域，其在弱化区域和源极基底的前面之间限定相对较厚的有用层; 将源极基板的正面粘合到支撑基板上，并在弱化区域将有用层与源极基板分离，以将有用层转移到支撑基板; 将原子物质植入有用层的自由面中，以在其中形成受控的平均注入深度，以在限定前后有用层的有用层内形成弱化区，其中后部有用层与源极基底和前部有用层接触 含有较大浓度的缺陷; 在加入原子物质之后将加强基底粘合到前有用层的自由面上; 并且沿着弱化区从后部有用层分离前部有用层，以形成包括支撑基板和其上的后部有用层的半导体结构。 所获得的结构可用于电子学，光电子学或光学领域。

公开(公告)号：US07406994B2

公开(公告)日：2008-08-05

申请号：US11668799

申请日：2007-01-30

Applicant: Muriel Martinez ,  Thierry Barge ,  Alain Soubie ,  Chrystelle Lagahe-Blanchard ,  Cécile Berne ,  Olivier Rayssac

Inventor： Muriel Martinez ,  Thierry Barge ,  Alain Soubie ,  Chrystelle Lagahe-Blanchard ,  Cécile Berne ,  Olivier Rayssac

IPC: B32B38/10

CPC classification number: H01L21/67092 ,  B28D5/0011 ,  B28D5/0023 ,  B28D5/0064 ,  B28D5/0082 ,  Y10S156/921 ,  Y10T83/7607 ,  Y10T83/7667 ,  Y10T156/1142 ,  Y10T156/1179 ,  Y10T156/1967 ,  Y10T156/1983

Abstract: An automatic high-precision layer cutting device for separating a layer from a semiconductor substrate. The device includes a fixed positioning member for receiving at least a portion of a semiconductor substrate that has a weakened area therein and a peripheral annular notch located below the weakened area. The positioning member maintains the position of the substrate on a moveable support. A cutting mechanism having at least one blade is provided for contacting the substrate and inducing a cleaving wave therein. The cutting mechanism is operatively associated with the positioning member so that the as at least one blade contacts the annular notch, the positioning member prevents movement of the substrate and the moveable support moves away from the substrate to allow the cleaving wave to both divide the substrate at the notch into first and second parts and detach the layer from the substrate along the weakened area.

Abstract translation: 一种用于从半导体衬底分离层的自动高精度层切割装置。 该装置包括用于接收其中具有弱化区域的半导体衬底的至少一部分和位于弱化区域下方的周边环形凹口的固定定位构件。 定位构件将基板的位置保持在可移动支撑件上。 提供具有至少一个叶片的切割机构用于接触基底并在其中引入切割波。 切割机构与定位构件可操作地相关联，使得至少一个叶片接触环形凹口，定位构件防止基底移动，并且可移动支撑件远离基底移动，以允许分裂波将基底 在切口处形成第一和第二部分，并且沿着弱化区域从基板分离层。

公开(公告)号：US07405135B2

公开(公告)日：2008-07-29

申请号：US11434930

申请日：2006-05-17

Applicant: Fabrice Letertre ,  Bruno Ghyselen ,  Olivier Rayssac

Inventor： Fabrice Letertre ,  Bruno Ghyselen ,  Olivier Rayssac

IPC: H01L29/00

CPC classification number: H01L21/187 ,  B81C1/00365 ,  B81C2201/0191 ,  C30B25/183 ,  H01L21/0237 ,  H01L21/0243 ,  H01L21/02439 ,  H01L21/0245 ,  H01L21/02513 ,  H01L21/02658 ,  H01L21/02664 ,  H01L21/76254

Abstract: A stress absorbing microstructure assembly including a support substrate having an accommodation layer that has plurality of motifs engraved or etched in a surface, a buffer layer and a nucleation layer. The stress absorbing microstructure assembly may also include an insulating layer between the buffer layer and the nucleation layer. This assembly can receive thick epitaxial layers thereon with concern of causing cracking of such layers.

Abstract translation: 一种应力吸收微结构组件，包括具有在表面上雕刻或蚀刻的多个图案的容纳层的支撑衬底，缓冲层和成核层。 应力吸收微结构组件还可以包括缓冲层和成核层之间的绝缘层。 该组件可以在其上接收厚的外延层，同时引起这种层的破裂。

公开(公告)号：US07387947B2

公开(公告)日：2008-06-17

申请号：US11305444

申请日：2005-12-16

Applicant: Ian Cayrefourcq ,  Carlos Mazure ,  Konstantin Bourdelle

Inventor： Ian Cayrefourcq ,  Carlos Mazure ,  Konstantin Bourdelle

IPC: H01L21/20

CPC classification number: H01L21/76254

Abstract: The present invention relates to a method for transferring a thin useful layer from a donor substrate having an ordered crystalline structure to a receiver substrate. The method includes creation of a weakened zone in the donor substrate to define the layer to be transferred from the donor substrate. The crystalline structure of a surface region of the donor substrate is disturbed so as to create a disturbed superficial region within the thickness of the donor substrate, and thus define a disturbance interface between the disturbed superficial region and a subjacent region of the donor substrate for which the crystalline structure remains unchanged. Next, the donor substrate is subjected to a recrystallization annealing in order to at least partial recrystallize of the disturbed region, starting from the crystalline structure of the subjacent region of the donor substrate, and to create a zone of crystalline defects in the plane of the disturbance interface. One or several species are introduced into the thickness of the donor substrate to create the weakened zone, with the species being introduced with introduction parameters that are adjusted to introduce a maximum number of species at the zone of crystalline defects.

Abstract translation: 本发明涉及一种从具有有序晶体结构的施主衬底向接收衬底转移薄有用层的方法。 该方法包括在施主衬底中产生弱化区以限定要从供体衬底转移的层。 施主衬底的表面区域的晶体结构受到干扰，从而在施主衬底的厚度内产生干扰的表面区域，从而限定受干扰的表面区域和施主衬底的下部区域之间的扰动界面， 晶体结构保持不变。 接下来，对施主衬底进行再结晶退火，以便从施主衬底的下部区域的结晶结构开始至少部分地重新结晶受阻区域，并在该平面内产生晶体缺陷区域 扰动界面。 将一个或多个物质引入施主衬底的厚度以产生弱化区域，其中引入物质，引入参数被调整以在晶体缺陷区域引入最大数量的物质。

公开(公告)号：US07378729B2

公开(公告)日：2008-05-27

申请号：US11285008

申请日：2005-11-23

Applicant: Bruno Ghyselen ,  Cécile Aulnette ,  Bénédite Osternaud ,  Yves-Mathieu Le Vaillant ,  Takeshi Akatsu

Inventor： Bruno Ghyselen ,  Cécile Aulnette ,  Bénédite Osternaud ,  Yves-Mathieu Le Vaillant ,  Takeshi Akatsu

IPC: H01L23/12

CPC classification number: H01L21/02032

Abstract: A donor wafer resulting from a method of recycling the wafer after detaching at least one useful layer. The donor wafer includes a substrate; a buffer structure on the substrate; a protective layer associated with the buffer structure; and a post detachment layer located above the buffer structure and presenting projections or rough portions on its surface. The protective layer prevents removal of the entire buffer structure when the post detachment layer is removed.

Abstract translation: 由在分离至少一个有用层之后再循环晶片的方法产生的施主晶片。 施主晶片包括基板; 衬底上的缓冲结构; 与缓冲结构相关联的保护层; 以及位于缓冲结构上方的后分离层，并且在其表面上呈现突起或粗糙部分。 当去除后剥离层时，保护层防止整个缓冲结构的移除。

公开(公告)号：US07375008B2

公开(公告)日：2008-05-20

申请号：US11075272

申请日：2005-03-07

Applicant: Bruno Ghyselen ,  Cécile Aulnette ,  Bénédite Osternaud ,  Takeshi Akatsu ,  Bruce Faure

Inventor： Bruno Ghyselen ,  Cécile Aulnette ,  Bénédite Osternaud ,  Takeshi Akatsu ,  Bruce Faure

IPC: H01L21/30 ,  H01L21/46

CPC classification number: H01L21/02032 ,  H01L21/76254

Abstract: The invention relates to a method of re-forming a useful layer on a donor wafer after taking off a useful layer formed of a material chosen from among semiconductor materials. The donor wafer includes in succession a substrate and a taking-off structure, the taking-off structure includes the taken-off useful layer before taking-off. The method includes a removal of material involving a portion of the donor wafer on the side where the useful layer has been taken off. The material is removed by mechanical means so as to preserve a portion of the taking-off structure to form at least one other useful layer which can be taken off after re-forming, without adding additional material to the wafer.

Abstract translation: 本发明涉及一种在从由半导体材料中选出的材料形成的有用层之后，在施主晶片上重新形成有用层的方法。 施主晶片连续地包括基板和起飞结构，起飞结构包括起飞前的起飞有用层。 该方法包括去除涉及在有用层被取下的一侧的施主晶片的一部分的材料。 通过机械方法去除材料，以便保留一部分起飞结构以形成至少一个其它可用的层，其可以在重新形成之后取下，而不向晶片添加额外的材料。

公开(公告)号：US07338883B2

公开(公告)日：2008-03-04

申请号：US11165339

申请日：2005-06-24

Applicant: Bruno Ghyselen ,  Daniel Bensahel ,  Thomas Skotnicki

Inventor： Bruno Ghyselen ,  Daniel Bensahel ,  Thomas Skotnicki

IPC: H01L21/46 ,  H01L21/30

CPC classification number: H01L29/1054 ,  H01L21/76254 ,  H01L21/76259 ,  Y10S438/938

Abstract: The invention relates to a process for producing an electronic structure that includes a thin layer of strained semiconductor material from a donor wafer. The donor wafer has a lattice parameter matching layer that includes an upper layer of a semiconductor material having a first lattice parameter and a film of semiconductor material having a second, nominal, lattice parameter that is substantially different from the first lattice parameter and that is strained by the matching layer. This process includes transfer of the film to a receiving substrate. The invention also relates to the semiconductor structures that can be produced by the process.

Abstract translation: 本发明涉及一种用于制造电子结构的方法，该电子结构包括来自施主晶片的应变半导体材料的薄层。 施主晶片具有晶格参数匹配层，其包括具有第一晶格参数的半导体材料的上层和具有与第一晶格参数基本不同的第二标称晶格参数的半导体材料的膜，并且其被应变 由匹配层。 该方法包括将膜转移到接收衬底。 本发明还涉及可以通过该方法生产的半导体结构。

公开(公告)号：US07279779B2

公开(公告)日：2007-10-09

申请号：US11411833

申请日：2006-04-27

Applicant: Fabrice Letertre ,  Bruno Ghyselen ,  Olivier Rayssac

Inventor： Fabrice Letertre ,  Bruno Ghyselen ,  Olivier Rayssac

IPC: H01L23/13

CPC classification number: H01L21/2007 ,  H01L21/76251 ,  H01L21/76254

Abstract: A substrate-assembly having a mechanical stress absorption system. The assembly includes two substrates, one of which has a mechanical stress absorbing system, such as a plurality of motifs that absorb thermoelastic stresses, to prevent cracking or destruction of the substrates or separation of one substrate from the other.

Abstract translation: 具有机械应力吸收系统的基板组件。 该组件包括两个基板，其中一个具有机械应力吸收系统，例如吸收热弹性应力的多个图案，以防止基板的破裂或破坏或将一个基板与另一个基板分开。

公开(公告)号：US07276428B2

公开(公告)日：2007-10-02

申请号：US11059122

申请日：2005-02-16

Applicant: Nicolas Daval ,  Takeshi Akatsu ,  Nguyet-Phuong Nguyen ,  Olivier Rayssac

Inventor： Nicolas Daval ,  Takeshi Akatsu ,  Nguyet-Phuong Nguyen ,  Olivier Rayssac

IPC: H01L21/46 ,  H01L21/76

CPC classification number: H01L21/76254

Abstract: Methods for forming a semiconductor structure are described. In an embodiment, the technique includes providing a donor wafer having a first semiconductor layer and a second semiconductor layer on the first layer and having a free surface, implanting atomic species through the free surface of the second layer to form a zone of weakness zone in the first layer, and bonding the free surface of the second layer to a host wafer. The method also includes supplying energy to detach at the zone of weakness a semiconductor structure comprising the host wafer, the second layer and a portion of the first layer, conducting a bond strengthening step on the structure after detachment at a temperature of less than about 800° C. to improve the strength of the bond between the second layer and the host wafer, and selectively etching the first layer portion to remove it from the structure and to expose a surface of the second layer. The implanting step includes implantation parameters chosen to minimize surface roughness resulting from detachment at the zone of weakness.

Abstract translation: 描述形成半导体结构的方法。 在一个实施例中，该技术包括提供在第一层上具有第一半导体层和第二半导体层的施主晶片，并且具有自由表面，通过第二层的自由表面注入原子物质以形成弱区的区域 第一层，并将第二层的自由表面结合到主晶片。 该方法还包括提供能量以在弱化区域分离包括主晶片，第二层和第一层的一部分的半导体结构，在小于约800℃的温度下分离后在结构上进行结合强化步骤 以提高第二层和主晶片之间的结合强度，并且选择性地蚀刻第一层部分以将其从结构上除去并暴露第二层的表面。 植入步骤包括选择的植入参数以最小化由于在弱化区域脱离而导致的表面粗糙度。