Abstract:
By forming an activation/nucleation layer selectively at a bottom of an opening, efficient electroless deposition techniques may be used for forming contacts, vias and trenches of advanced semiconductor devices. By selectively providing the activation material, a self-aligned bottom-to-top fill behavior may be obtained.
Abstract:
By using a patterned sacrificial layer for forming highly conductive metal regions, the formation of a reliable conductive barrier layer may be accomplished prior to the actual deposition of a low-k dielectric material. Hence, even highly porous dielectrics may be used in combination with highly conductive metals, substantially without compromising the diffusion characteristics and the electromigration performance. Hence, metallization layers for highly scaled semiconductor devices having critical dimensions of 50 nm and significantly less may be provided.
Abstract:
By providing two or more consumable electrodes within a single reactor vessel, an alloy having a high degree of chemical ordering may be deposited in situ in that the current flows of the individual consumable electrodes are controlled to obtain a substantially layered deposition of the two or more metals. Hence, especially in copper-based metallization layers, the advantage of enhanced resistance against electromigration offered by alloys may be achieved without unduly reducing the overall conductivity.
Abstract:
In an enhanced technique for electroless metal deposition, the substrate is heated to or above the operating temperature for the specific plating solution, while the plating solution may be maintained at a non-critical low temperature to substantially prevent spontaneous self-decomposition within the plating tool. Hence, significant advantages with respect to process control and cost of ownership may be achieved.
Abstract:
By using signals from an electric drive assembly of an electroplating tool, the operating position of the substrate surface to be plated may be determined in an automated fashion wherein, based on a reference position, the meniscus of the electrolyte and/or any appropriate operating position may be determined. Consequently, accuracy and throughput may be enhanced compared to conventional manual or semi-automatic adjustment procedures.
Abstract:
A plating tool for a single-use plating process comprises a reclaim system in combination with a support tank to enable collection of non-consumed plating solution drained off from the process chamber, which is then re-circulated to the support tank after an efficient treatment in the reclaim system. Since the non-consumed plating solution is continuously recycled, the electrolyte may be preserved substantially without any time limit while at the same time production costs for a single-use plating process are significantly reduced.
Abstract:
In a method of forming damascene metallization lines on a substrate by electroplating and chemical mechanical polishing, the metal layer thickness profile is shaped in correspondence to the removal rate during the chemical mechanical polishing. Thus, any non-uniformity of the chemical mechanical polishing process may be compensated for by appropriately depositing the metal layer so that erosion and dishing of the finally obtained metal lines are within tightly selected manufacturing tolerances.
Abstract:
A method and apparatus for fabricating electrochemical copper interconnections between the component parts of an integrated circuit on a semiconductor device. A cathodic platter is provided that includes contact pins that contact the surface of a semiconductor wafer at predetermined locations during the electrochemical deposition process. The contact pins are arranged on the cathodic platter so that when placed on the surface of the semiconductor wafer the contact pins surround the perimetrical edges of each respective semiconductor device on the semiconductor wafer. Once the semiconductor wafer is properly positioned on the cathodic platter, a copper conductive layer can be electrochemically and uniformly deposited on the surface of the semiconductor device.
Abstract:
A conductive cap material for a copper region may be provided with enhanced etch resistivity by taking into consideration the standard electrode potential of one or more of the species contained therein. For example, instead of a conventionally used CoWP alloy, a modified alloy may be used, by substituting the cobalt species by a metallic species having a less negative standard electrode potential, such as nickel. Consequently, device performance may be enhanced, while at the same time the overall process complexity may be reduced.
Abstract:
During the formation of complex metallization systems, a conductive cap layer may be formed on a copper-containing metal region in order to enhance the electromigration behavior without negatively affecting the overall conductivity. At the same time, a thermo chemical treatment may be performed to provide superior surface conditions of the sensitive dielectric material and also to suppress carbon depletion, which may conventionally result in a significant variability of material characteristics of sensitive ULK materials.