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公开(公告)号：US10243356B2
公开(公告)日：2019-03-26
申请号：US14925001
申请日：2015-10-28
Applicant: STMICROELECTRONICS (TOURS) SAS
Inventor： Jérôme Heurtier , Guillaume Bougrine , Mathieu Rouviere
Abstract: A device may be for protection against overvoltages in a power supply line. The device may include a breakover diode, an avalanche diode coupled in series with the breakover diode, and a switch coupled in parallel with the breakover diode and the avalanche diode. The device may also include a circuit coupled across the avalanche diode and configured to control the switch.
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公开(公告)号：US20190006959A1
公开(公告)日：2019-01-03
申请号：US16020431
申请日：2018-06-27
Applicant: STMicroelectronics (Tours) SAS
Inventor： Ghafour BENABDELAZIZ , Cedric REYMOND , David JOUVE
Abstract: A reversible converter includes a first field effect transistor and a second field effect transistor coupled in series between a first terminal and a second terminal for a DC voltage. A first thyristor and a second thyristor are coupled in series between the first and second terminals for the DC voltage. A third thyristor and a fourth thyristor are also coupled in series between the first and second terminals for the DC voltage terminals, but have an opposite connection polarity with respect to the first and second thyristors. A midpoint of connection between the first and second field effect transistors and a common midpoint of connection between the first and second thyristors and the third and fourth thyristors are coupled to AC voltage terminals. Actuation of the transistors and thyristors is controlled in distinct manners to operate the converter in an AC-DC conversion mode and a DC-AC conversion mode.
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公开(公告)号：US10133290B2
公开(公告)日：2018-11-20
申请号：US15363648
申请日：2016-11-29
Applicant: STMICROELECTRONICS (TOURS) SAS
Inventor： Bertrand Rivet , David Jouve
Abstract: A circuit for balancing a voltage across a semiconductor element series-connected with other semiconductor elements of the same type may include a comparator configured to compare data representative of a voltage across the semiconductor element with a reference voltage, and a resistive element of adjustable value and configured to be controlled by the comparator.
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公开(公告)号：US20180331400A1
公开(公告)日：2018-11-15
申请号：US15976092
申请日：2018-05-10
Applicant: STMicroelectronics (Tours) SAS
Inventor： Delphine GUY-BOUYSSOU
IPC: H01M10/52 , H01M10/0525 , H01M10/052 , H01M10/0562 , H01M4/525 , H01M2/02
CPC classification number: H01M10/526 , H01M2/0287 , H01M4/131 , H01M4/525 , H01M6/40 , H01M10/0436 , H01M10/052 , H01M10/0525 , H01M10/0562 , H01M2004/028 , H01M2300/0068
Abstract: A lithium-metal or lithium-ion battery includes a stack of a cathode layer made of LiCoO2, an anode layer and an electrolyte layer made of LiPON positioned between anode and cathode layers. An encapsulating layer covers the stack. The battery further includes an interface layer made of a material that is able to capture oxygen generated during charge/discharge cycles of the battery. This interface layer is placed under the encapsulating layer.
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公开(公告)号：US20180331332A1
公开(公告)日：2018-11-15
申请号：US16031099
申请日：2018-07-10
Applicant: STMicroelectronics (Tours) SAS
Inventor： Ludovic Fallourd
CPC classification number: H01M2/06 , H01M2/0404 , H01M2/0408 , H01M2/1022 , H01M2/204 , H01M2/30 , H01M10/0436 , H01M10/044 , H01M2220/30
Abstract: Disclosed herein is an electronic device including a substrate, with an active layer stack on the substrate. A cover is on the active layer stack and has a surface area greater than that of the active layer so as to encapsulate the active layer stack. A conductive pad layer is on the cover. At least one conductive via extends between the active layer stack and the conductive pad layer.
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Patent Agency Ranking
公开(公告)号：US20180294845A1
公开(公告)日：2018-10-11
申请号：US16004139
申请日：2018-06-08
Applicant: STMicroelectronics (Tours) SAS
Inventor： Igor Bimbaud , Eric Colleoni
IPC: H04B5/00 , H04B1/3888 , H04M1/02 , G06K19/07 , H02J7/00
CPC classification number: H04B5/0037 , G06K19/0704 , H02J7/0054 , H02J7/025 , H02J50/10 , H04B1/3888 , H04M1/0202 , H04M1/185
Abstract: A case includes a base for receiving a portable phone and a flap hinged to the base and including a housing configured to receive a microcircuit card. A first contactless communication antenna is provided in the flap for coupling to an antenna of the microcircuit card. A second contactless communication antenna is provided in the base for coupling to an antenna of the portable phone. The first and second first contactless communication antennae are electrically connected to each other.
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公开(公告)号：US10044009B2
公开(公告)日：2018-08-07
申请号：US15260008
申请日：2016-09-08
Applicant: STMicroelectronics (Tours) SAS
Inventor： Ludovic Fallourd
Abstract: Disclosed herein is an electronic device including a substrate, with an active layer stack on the substrate. A cover is on the active layer stack and has a surface area greater than that of the active layer so as to encapsulate the active layer stack. A conductive pad layer is on the cover. At least one conductive via extends between the active layer stack and the conductive pad layer.
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公开(公告)号：US09991341B2
公开(公告)日：2018-06-05
申请号：US15363616
申请日：2016-11-29
Applicant: STMICROELECTRONICS (TOURS) SAS
Inventor： Arnaud Yvon
IPC: H01L29/06 , H01L21/02 , H01L21/306 , H01L21/322 , H01L29/20 , H01L29/66 , H01L29/36 , H01L29/872
CPC classification number: H01L29/0661 , H01L21/02002 , H01L21/02381 , H01L21/02458 , H01L21/02494 , H01L21/0254 , H01L21/02579 , H01L21/02664 , H01L21/30612 , H01L21/30621 , H01L21/30625 , H01L21/3228 , H01L29/2003 , H01L29/36 , H01L29/66212 , H01L29/872
Abstract: A method is for treating a doped gallium nitride substrate of a first conductivity type, having dislocations emerging on the side of at least one of its surfaces. The method may include: a) forming, where each dislocation emerges, a recess extending into the substrate from the at least one surface; and b) filling the recesses with doped gallium nitride of the second conductivity type.
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公开(公告)号：US20180130608A1
公开(公告)日：2018-05-10
申请号：US15862752
申请日：2018-01-05
Applicant: STMicroelectronics (Tours) SAS
Inventor： Sylvain Charley
CPC classification number: H01G7/06 , G01R15/165 , G05F5/00 , H03H5/12 , H03H7/0153 , H04B1/0458
Abstract: A capacitor has a variable capacitance settable by a bias voltage. A method for setting the bias voltage including the steps of: (a) injecting a constant current to bias the capacitor; (b) measuring the capacitor voltage at the end of a time interval; (c) calculating the capacitance value obtained at the end of the time interval; (d) comparing this value with a desired value; and (e) repeating steps (a) to (d) so as long as the calculated value is different from the set point value. When calculated value matches the set point value; the measured capacitor voltage is stored as a bias voltage to be applied to the capacitor for setting the variable capacitance.
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公开(公告)号：US20180130607A1
公开(公告)日：2018-05-10
申请号：US15862707
申请日：2018-01-05
Applicant: STMicroelectronics (Tours) SAS
Inventor： Sylvain Charley
CPC classification number: H01G7/06 , G01R15/165 , G05F5/00 , H03H5/12 , H03H7/0153 , H04B1/0458
Abstract: A capacitor has a variable capacitance settable by a bias voltage. A method for setting the bias voltage including the steps of: (a) injecting a constant current to bias the capacitor; (b) measuring the capacitor voltage at the end of a time interval; (c) calculating the capacitance value obtained at the end of the time interval; (d) comparing this value with a desired value; and (e) repeating steps (a) to (d) so as long as the calculated value is different from the set point value. When calculated value matches the set point value; the measured capacitor voltage is stored as a bias voltage to be applied to the capacitor for setting the variable capacitance.
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