公开(公告)号：US06784121B1

公开(公告)日：2004-08-31

申请号：US09178249

申请日：1998-10-23

Applicant: Changming Jin ,  Richard Scott List ,  Joseph D. Luttmer

Inventor： Changming Jin ,  Richard Scott List ,  Joseph D. Luttmer

IPC: H01L2131

CPC classification number: H01L23/53295 ,  C23C18/1212 ,  C23C18/122 ,  H01L21/02126 ,  H01L21/02203 ,  H01L21/02282 ,  H01L21/02304 ,  H01L21/02337 ,  H01L21/0234 ,  H01L21/02343 ,  H01L21/02359 ,  H01L21/02362 ,  H01L21/3105 ,  H01L21/31695 ,  H01L21/76819 ,  H01L21/7682 ,  H01L21/76825 ,  H01L21/76828 ,  H01L21/76829 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76835 ,  H01L21/76837 ,  H01L23/522 ,  H01L23/5222 ,  H01L2221/1047 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A xerogel aging system includes an aging chamber (190) with inlets and outlet and flows a gel catalyst in gas phase over a xerogel precursor film on a semiconductor wafer. Preferred embodiments use an ammonia and water vapor gas mixture catalyst.

Abstract translation: 干凝胶老化系统包括具有入口和出口的老化室（190），并且将气相中的凝胶催化剂在半导体晶片上的干凝胶前体膜上流动。 优选的实施方案使用氨和水蒸气混合催化剂。

公开(公告)号：US06664168B1

公开(公告)日：2003-12-16

申请号：US10202807

申请日：2002-07-24

Applicant: Ebrahim Andideh ,  R. Scott List

Inventor： Ebrahim Andideh ,  R. Scott List

IPC: H01L2120

CPC classification number: H01L28/55

Abstract: A method of making an on-die decoupling capacitor for a semiconductor device is described. That method comprises forming a first barrier layer on a conductive layer. The upper surface of the first barrier layer is modified to enable a dielectric layer with an acceptable nucleation density to be formed on the first barrier layer. A dielectric layer is formed on the first barrier layer, and a second barrier layer is formed on the dielectric layer.

Abstract translation: 描述了制造用于半导体器件的芯片上去耦电容器的方法。 该方法包括在导电层上形成第一阻挡层。 修改第一阻挡层的上表面以使得能够在第一阻挡层上形成具有可接受的成核密度的介电层。 在第一阻挡层上形成电介质层，在电介质层上形成第二阻挡层。

公开(公告)号：US08421225B2

公开(公告)日：2013-04-16

申请号：US13470822

申请日：2012-05-14

Applicant: Shriram Ramanathan ,  Patrick Morrow ,  Scott List ,  Michael Y. Chan ,  Mauro J. Kobrinsky ,  Sarah E. Kim ,  Kevin P. O'Brien ,  Michael C. Harmes ,  Thomas Marieb

Inventor： Shriram Ramanathan ,  Patrick Morrow ,  Scott List ,  Michael Y. Chan ,  Mauro J. Kobrinsky ,  Sarah E. Kim ,  Kevin P. O'Brien ,  Michael C. Harmes ,  Thomas Marieb

IPC: H01L23/48 ,  H01L21/44

CPC classification number: H01L24/16 ,  H01L24/11 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/13099 ,  H01L2224/13147 ,  H01L2224/81205 ,  H01L2224/81801 ,  H01L2224/8183 ,  H01L2224/81894 ,  H01L2224/81895 ,  H01L2224/9202 ,  H01L2225/06513 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01075 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/19041

Abstract: Three-dimensional stacked substrate arrangements with reliable bonding and inter-substrate protection.

公开(公告)号：US08203208B2

公开(公告)日：2012-06-19

申请号：US13103267

申请日：2011-05-09

Applicant: Shriram Ramanathan ,  Patrick Morrow ,  Scott List ,  Michael Y. Chan ,  Mauro J. Kobrinsky ,  Sarah E. Kim ,  Kevin P. O'Brien ,  Michael C. Harmes ,  Thomas Marieb

Inventor： Shriram Ramanathan ,  Patrick Morrow ,  Scott List ,  Michael Y. Chan ,  Mauro J. Kobrinsky ,  Sarah E. Kim ,  Kevin P. O'Brien ,  Michael C. Harmes ,  Thomas Marieb

IPC: H01L23/48 ,  H01L21/44

CPC classification number: H01L24/16 ,  H01L24/11 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/13099 ,  H01L2224/13147 ,  H01L2224/81205 ,  H01L2224/81801 ,  H01L2224/8183 ,  H01L2224/81894 ,  H01L2224/81895 ,  H01L2224/9202 ,  H01L2225/06513 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01075 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/19041

Abstract: Three-dimensional stacked substrate arrangements with reliable bonding and inter-substrate protection.

Abstract translation: 具有可靠接合和衬底保护的三维堆叠衬底布置。

公开(公告)号：US07973407B2

公开(公告)日：2011-07-05

申请号：US12319035

申请日：2008-12-31

Applicant: Shriram Ramanathan ,  Patrick Morrow ,  Scott List ,  Michael Y. Chan ,  Mauro J. Kobrinsky ,  Sarah E. Kim ,  Kevin P. O'Brien ,  Michael C. Harmes ,  Thomas Marieb

Inventor： Shriram Ramanathan ,  Patrick Morrow ,  Scott List ,  Michael Y. Chan ,  Mauro J. Kobrinsky ,  Sarah E. Kim ,  Kevin P. O'Brien ,  Michael C. Harmes ,  Thomas Marieb

IPC: H01L23/48 ,  H01L21/44

CPC classification number: H01L24/16 ,  H01L24/11 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/13099 ,  H01L2224/13147 ,  H01L2224/81205 ,  H01L2224/81801 ,  H01L2224/8183 ,  H01L2224/81894 ,  H01L2224/81895 ,  H01L2224/9202 ,  H01L2225/06513 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01075 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/19041

Abstract: Three-dimensional stacked substrate arrangements with reliable bonding and inter-substrate protection.

Abstract translation: 具有可靠接合和衬底保护的三维堆叠衬底布置。

公开(公告)号：US07842553B2

公开(公告)日：2010-11-30

申请号：US11796235

申请日：2007-04-27

Applicant: Sarah E. Kim ,  R. Scott List ,  Alan Myers

Inventor： Sarah E. Kim ,  R. Scott List ,  Alan Myers

IPC: H01L21/00 ,  H01L23/34

CPC classification number: H01L23/473 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The present disclosure relates generally to microelectronic technology, and more specifically, to an apparatus used for the cooling of active electronic devices utilizing micro-channels or micro-trenches, and a technique for fabricating the same.

Abstract translation: 本公开一般涉及微电子技术，更具体地，涉及用于利用微通道或微沟槽冷却有源电子器件的装置及其制造技术。

公开(公告)号：US07576432B2

公开(公告)日：2009-08-18

申请号：US11270071

申请日：2005-11-09

Applicant: Sarah E. Kim ,  R. Scott List ,  James G. Maveety ,  Alan M. Myers ,  Quat T. Vu ,  Ravi Prasher ,  Ravi Mahajan ,  Gilroy Vandentop

Inventor： Sarah E. Kim ,  R. Scott List ,  James G. Maveety ,  Alan M. Myers ,  Quat T. Vu ,  Ravi Prasher ,  Ravi Mahajan ,  Gilroy Vandentop

IPC: H01L23/52 ,  H01L23/48 ,  H01L29/40

CPC classification number: H01L23/473 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2224/82

Abstract: An integrated circuit to be cooled may be abutted in face-to-face abutment with a cooling integrated circuit. The cooling integrated circuit may include electroosmotic pumps to pump cooling fluid through the cooling integrated circuits via microchannels to thereby cool the heat generating integrated circuit. The electroosmotic pumps may be fluidically coupled to external radiators which extend upwardly away from a package including the integrated circuits. In particular, the external radiators may be mounted on tubes which extend the radiators away from the package.

Abstract translation: 要冷却的集成电路可以与冷却集成电路面对面邻接。 冷却集成电路可以包括电渗泵，以通过微通道将冷却流体泵送通过冷却集成电路，从而冷却发热集成电路。 电渗泵可以流体耦合到从包括集成电路的包装向上延伸的外部散热器。 特别地，外部散热器可以安装在使散热器远离封装的管上。

公开(公告)号：US07569426B2

公开(公告)日：2009-08-04

申请号：US11691124

申请日：2007-03-26

Applicant: Alan M. Myers ,  R. Scott List ,  Gilroy J. Vandentop

Inventor： Alan M. Myers ,  R. Scott List ,  Gilroy J. Vandentop

IPC: H01L21/00

CPC classification number: H01L23/473 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/00

Abstract: A die package and a method and apparatus for integrating an electro-osmotic pump and a microchannel cooling assembly into a die package.

Abstract translation: 一种模具封装以及用于将电渗透泵和微通道冷却组件集成到管芯封装中的方法和装置。

公开(公告)号：US20080296731A1

公开(公告)日：2008-12-04

申请号：US12190550

申请日：2008-08-12

Applicant: Bruce A. Block ,  Richard Scott List

Inventor： Bruce A. Block ,  Richard Scott List

IPC: H01L29/92

CPC classification number: H01L28/87 ,  H01L27/0805

Abstract: An apparatus including a capacitor formed between metallization layers on a circuit, the capacitor including a bottom electrode coupled to a metal layer and a top electrode coupled to a metal via wherein the capacitor has a corrugated sidewall profile. A method including forming an interlayer dielectric including alternating layers of dissimilar dielectric materials in a multilayer stack over a metal layer of a device structure; forming a via having a corrugated sidewall; and forming a decoupling capacitor stack in the via that conforms to the sidewall of the via.

Abstract translation: 一种包括在电路上的金属化层之间形成的电容器的装置，所述电容器包括耦合到金属层的底部电极和耦合到金属通孔的顶部电极，其中所述电容器具有波纹侧壁轮廓。 一种方法，包括在器件结构的金属层上的多层堆叠中形成包含不同介电材料的交替层的层间电介质; 形成具有波形侧壁的通孔; 以及在通孔中形成去耦电容器叠层，其符合通孔的侧壁。

公开(公告)号：US07355277B2

公开(公告)日：2008-04-08

申请号：US10750224

申请日：2003-12-31

Applicant: Alan M. Myers ,  R. Scott List ,  Gilroy J. Vandentop

Inventor： Alan M. Myers ,  R. Scott List ,  Gilroy J. Vandentop

IPC: H01L23/34

CPC classification number: H01L23/473 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/00

Abstract: A die package and a method and apparatus for integrating an electro-osmotic pump and a microchannel cooling assembly into a die package.

Abstract translation: 一种模具封装以及用于将电渗透泵和微通道冷却组件集成到管芯封装中的方法和装置。