公开(公告)号：US20050075052A1

公开(公告)日：2005-04-07

申请号：US10947458

申请日：2004-09-22

Applicant: Kwang-Bok Kim ,  Jae-Kwang Choi ,  Yong-Sun Ko ,  Chang-Ki Hong ,  Kyung-Hyun Kim ,  Jae-Dong Lee

Inventor： Kwang-Bok Kim ,  Jae-Kwang Choi ,  Yong-Sun Ko ,  Chang-Ki Hong ,  Kyung-Hyun Kim ,  Jae-Dong Lee

IPC: H01L21/304 ,  B24B37/04 ,  B24B49/16 ,  B24B57/02 ,  C09G1/02 ,  B24B1/00 ,  B24B7/19

CPC classification number: C09G1/02 ,  B24B37/044 ,  B24B49/16 ,  B24B57/02

Abstract: For planarizing an IC (integrate circuit) material, a first slurry is dispensed for a first planarization of the IC material using the first slurry, and a second slurry is dispensed for a second planarization of the IC material using the second slurry. The first and second slurries are different. For example, the first slurry is silica based for faster planarization during the first planarization. Thereafter, the second planarization is performed with the second slurry that is ceria based with higher planarity for attaining sufficient planarization of the IC material.

Abstract translation: 为了平坦化IC（集成电路）材料，使用第一浆料分配第一浆料以使IC材料的第一平面化，并且使用第二浆料分配第二浆料以进行IC材料的第二平面化。 第一和第二种浆料是不同的。 例如，第一浆料是二氧化硅基，用于在第一平面化期间更快的平坦化。 此后，利用二氧化铈为基础，以更高的平面度进行第二平坦化，以获得IC材料的充分平坦化。

公开(公告)号：US06831012B2

公开(公告)日：2004-12-14

申请号：US10445858

申请日：2003-05-28

Applicant: Dae-Keun Kang ,  Yong-Sun Ko ,  In-Seak Hwang ,  Byoung-Moon Yoon

Inventor： Dae-Keun Kang ,  Yong-Sun Ko ,  In-Seak Hwang ,  Byoung-Moon Yoon

IPC: H01L2144

CPC classification number: H01L21/823443 ,  H01L21/02063 ,  H01L21/31111 ,  H01L21/823425 ,  H01L27/10888 ,  H01L27/10891 ,  H01L27/10894 ,  H01L29/665

Abstract: After a silicidation blocking pattern is formed on a substrate including silicon, the silicidation blocking pattern is hardened by a thermal annealing process. The substrate is rinsed to remove a native oxide film formed on the substrate, and then a silicide film is formed on a portion of the substrate exposed by the silicidation blocking pattern. The silicide film can thus be formed in an exact portion of the substrate, and the substrate is not damaged during rinsing.

Abstract translation: 在包含硅的衬底上形成硅化阻挡图案之后，通过热退火工艺使硅化阻挡图案硬化。 冲洗衬底以去除在衬底上形成的自然氧化膜，然后在通过硅化阻挡图案暴露的衬底的一部分上形成硅化物膜。 因此，硅化物膜可以形成在衬底的精确部分中，并且衬底在漂洗期间不被损坏。

公开(公告)号：US06638855B1

公开(公告)日：2003-10-28

申请号：US09502200

申请日：2000-02-10

Applicant: Kyu-hwan Chang ,  Yong-sun Ko ,  Chang-lyong Song ,  Seung-pil Chong

Inventor： Kyu-hwan Chang ,  Yong-sun Ko ,  Chang-lyong Song ,  Seung-pil Chong

IPC: H01L214763

CPC classification number: H01L21/02063 ,  H01L21/02046 ,  H01L21/31116 ,  H01L21/76814 ,  H01L21/76877

Abstract: A method of filling a contact hole of a semiconductor device preceded by dry cleaning for removing a damaged layer resulting from dry etching is provided. The method includes selectively exposing an underlying material layer by a dry etch and dry cleaning including passing plasma excited from a source gas over the exposed underlying material layer to remove the damaged layer formed from the dry etch. Subsequently, an electrically conductive layer with which to fill the contact hole is formed. The formation of the electrically conductive layer is performed in a separate chamber connected sequentially to a chamber for performing the dry cleaning to prevent the exposed underlying material layer inside the dry cleaned contact hole from being exposed to a source of contamination.

Abstract translation: 提供了一种在干法清洗之前填充半导体器件的接触孔的方法，用于去除由干蚀刻产生的损伤层。 该方法包括通过干式蚀刻和干式清洗选择性地暴露下层材料层，包括使从源气体激发的等离子体流过暴露的下层材料层，以去除由干蚀刻形成的损伤层。 随后，形成用于填充接触孔的导电层。 导电层的形成在依次连接到用于执行干洗的室的单独的室中进行，以防止干式清洁的接触孔内的暴露的下层材料层暴露于污染源。

公开(公告)号：US06399552B1

公开(公告)日：2002-06-04

申请号：US09451844

申请日：1999-12-01

Applicant: Kwang-wook Lee ,  Kun-tack Lee ,  Yong-sun Ko ,  Chang-lyong Song

Inventor： Kwang-wook Lee ,  Kun-tack Lee ,  Yong-sun Ko ,  Chang-lyong Song

IPC: C11D708

CPC classification number: C11D11/0047 ,  C11D7/06 ,  C11D7/08 ,  C11D7/10 ,  C11D7/265

Abstract: A cleaning solution for removing contaminants from the surface of an integrated circuit substrate includes a fluoride reducing agent, an organic acid containing a carboxyl group, an alkaline pH controller and water. The pH of the cleaning solution is 3.5-8.8. The cleaning solution is used at a low temperature, such as room temperature, which is lower than that for conventional cleaning solutions. Therefore, the cleaning solution does not evaporate. Furthermore, a cleaning method using the cleaning solution does not require a pre-ashing step to reinforce the cleaning agent, nor is an alcohol rinse step required. The cleaning solution is removed by rinsing with deionized water. Therefore, the cleaning method using the cleaning solution is quicker and less costly than conventional cleaning methods.

Abstract translation: 用于从集成电路基板的表面除去污染物的清洗液包括氟化物还原剂，含有羧基的有机酸，碱性pH控制剂和水。 清洗液的pH值为3.5-8.8。 清洁溶液在比常规清洁溶液低的低温（例如室温）下使用。 因此，清洗液不会蒸发。 此外，使用清洁溶液的清洁方法不需要预灰化步骤来加强清洁剂，也不需要醇漂洗步骤。 通过用去离子水冲洗除去清洁溶液。 因此，使用清洁溶液的清洁方法比常规清洁方法更快，成本更低。

公开(公告)号：US06369008B1

公开(公告)日：2002-04-09

申请号：US09665622

申请日：2000-09-19

Applicant: Heon-jae Ha ,  Dae-hyuk Chung ,  In-seak Hwang ,  Yong-sun Ko

Inventor： Heon-jae Ha ,  Dae-hyuk Chung ,  In-seak Hwang ,  Yong-sun Ko

IPC: C11D710

CPC classification number: C11D3/3947 ,  C11D7/08 ,  C11D7/10 ,  C11D11/0047 ,  H01L21/02063 ,  H01L21/76814 ,  H01L21/76897

Abstract: Cleaning solutions for removing contaminants from semiconductor substrates are provided and include from about 0.08 to about 0.1 percent by weight of hydrogen fluoride; from about 0.5 to about 0.6 percent by weight of ammonium fluoride; from about 24.9 to about 49.7 percent by weight of hydrogen peroxide; and from about 49.6 to about 74.5 percent by weight of water.

Abstract translation: 提供了用于从半导体衬底去除污染物的清洁溶液，包括约0.08至约0.1重量％的氟化氢; 约0.5至约0.6重量％的氟化铵; 约24.9至约49.7重量％的过氧化氢; 和约49.6至约74.5重量％的水。

公开(公告)号：US20160315019A1

公开(公告)日：2016-10-27

申请号：US15084536

申请日：2016-03-30

Applicant: Jung-Min OH ,  Mi-Hyun PARK ,  Hyo-San LEE ,  Ji-Hoon JEONG ,  Yong-Sun KO ,  In-Gi KIM ,  Na-Rim KIM ,  Sang-Tae KIM ,  Seong-Min KIM ,  Kyong-Ho LEE

Inventor： Jung-Min OH ,  Mi-Hyun PARK ,  Hyo-San LEE ,  Ji-Hoon JEONG ,  Yong-Sun KO ,  In-Gi KIM ,  Na-Rim KIM ,  Sang-Tae KIM ,  Seong-Min KIM ,  Kyong-Ho LEE

IPC: H01L21/8238 ,  H01L21/027 ,  H01L21/8234 ,  H01L29/16 ,  H01L21/311 ,  H01L21/02 ,  H01L21/3105 ,  G03F7/42 ,  H01L21/266

CPC classification number: G03F7/426 ,  G03F7/039 ,  G03F7/42 ,  G03F7/422 ,  G03F7/425 ,  H01L21/266 ,  H01L21/31133 ,  H01L21/823814 ,  H01L21/823828 ,  H01L29/16

Abstract: A composition for removing photoresist, including an alkyl ammonium fluoride salt in an amount ranging from about 0.5 weight percent to about 10 weight percent, based on a total weight of the composition; an organic sulfonic acid in an amount ranging from about 1 weight percent to about 20 weight percent, based on the total weight of the composition; and a lactone-based solvent in an amount ranging from about 70 weight percent to about 98.5 weight percent, based on the total weight of the composition.

Abstract translation: 基于组合物的总重量，用于除去光致抗蚀剂的组合物，其包含约0.5重量％至约10重量％的烷基铵氟化物盐; 基于组合物的总重量的约1重量％至约20重量％的量的有机磺酸; 和基于组合物总重量的约70重量％至约98.5重量％的内酯类溶剂。

公开(公告)号：US07745341B2

公开(公告)日：2010-06-29

申请号：US11482760

申请日：2006-07-10

Applicant: Tae-Won Kim ,  Yong-Sun Ko ,  Ki-Jong Park ,  Kyung-Hyun Kim

Inventor： Tae-Won Kim ,  Yong-Sun Ko ,  Ki-Jong Park ,  Kyung-Hyun Kim

IPC: H01L21/302

CPC classification number: H01L45/06 ,  H01L27/2436 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/1273 ,  H01L45/143 ,  H01L45/144 ,  H01L45/148 ,  H01L45/1675

Abstract: In a phase-change semiconductor device and methods of manufacturing the same, an example method may include forming a metal layer pattern on a substrate, the metal layer pattern including an opening that exposes a portion of the substrate, forming an etch stop layer on the metal layer pattern, a sidewall of the opening and the exposed portion of the substrate, the etch stop layer formed with a thickness less than an upper thickness threshold, and reducing at least a portion of the etch stop layer, the reduced portion of the etch stop layer forming an electrical connection with the substrate.

公开(公告)号：US07713879B2

公开(公告)日：2010-05-11

申请号：US11321848

申请日：2005-12-28

Applicant: Dong-Keun Kim ,  Chung-Ki Min ,  Yong-Sun Ko ,  Kyung-Hyun Kim

Inventor： Dong-Keun Kim ,  Chung-Ki Min ,  Yong-Sun Ko ,  Kyung-Hyun Kim

IPC: H01L21/302

CPC classification number: H01L21/76819 ,  C09G1/02 ,  H01L21/31053

Abstract: In an embodiment, a chemical mechanical polishing method for a substrate having a first layer and a stepped portion. A surface of the first layer is positioned above an upper face of the stepped portion. A polishing process for selectively removing the stepped portion is performed on the first layer by using a first slurry composition that has a self-stopping characteristic so that the first layer is changed into a second layer having a substantially flat surface. A second polishing process is performed using a second slurry composition that does not have the self-stopping characteristic, until the upper face of the stepped portion is exposed.

Abstract translation: 在一个实施方案中，一种用于具有第一层和阶梯部分的基材的化学机械抛光方法。 第一层的表面位于台阶部的上表面的上方。 通过使用具有自停特性的第一浆料组合物在第一层上进行用于选择性去除台阶部分的抛光工艺，使得第一层变成具有基本平坦表面的第二层。 使用不具有自停特性的第二浆料组合物进行第二抛光处理，直到阶梯部分的上表面露出。

公开(公告)号：US07667221B2

公开(公告)日：2010-02-23

申请号：US11708323

申请日：2007-02-21

Applicant: Jong-Heui Song ,  Yong-Sun Ko ,  Jae-Seung Hwang ,  Jun Seo

Inventor： Jong-Heui Song ,  Yong-Sun Ko ,  Jae-Seung Hwang ,  Jun Seo

IPC: H01L47/00

CPC classification number: H01L45/1233 ,  H01L45/06 ,  H01L45/126 ,  H01L45/143 ,  H01L45/144 ,  H01L45/148 ,  H01L45/1675 ,  Y10S438/90

Abstract: In a phase change memory, an interlayer insulating layer is disposed on a substrate. A heater plug includes a lower portion disposed in a contact hole penetrating the interlayer insulating layer and an upper portion protruding upward over the top surface of the interlayer insulating layer. A phase change pattern is disposed on the interlayer insulating layer to cover the top surface and the side surface of the protruding portion of the heater plug. An insulating spacer is interposed between the phase change pattern and the side surface of the protruding portion of the heater plug. A capping electrode is disposed on the phase change pattern.

Abstract translation: 在相变存储器中，在基板上设置层间绝缘层。 加热器插头包括设置在穿过层间绝缘层的接触孔中的下部和在层间绝缘层的顶表面上方向上突出的上部。 相变图案设置在层间绝缘层上，以覆盖加热器插头的突出部分的顶表面和侧表面。 在相变图案和加热器插头的突出部分的侧表面之间插入绝缘间隔件。 封盖电极设置在相变图案上。

公开(公告)号：US07534704B2

公开(公告)日：2009-05-19

申请号：US11449839

申请日：2006-06-09

Applicant: Jae-Kyu Ha ,  Jun Seo ,  Min-Chul Chae ,  Yong-Sun Ko ,  Young-Mi Lee ,  Jae-Seung Hwang

Inventor： Jae-Kyu Ha ,  Jun Seo ,  Min-Chul Chae ,  Yong-Sun Ko ,  Young-Mi Lee ,  Jae-Seung Hwang

IPC: H01L21/20

CPC classification number: H01L21/84 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/02647 ,  H01L21/02667 ,  H01L21/76262 ,  H01L27/1203

Abstract: In a thin layer structure and a method of forming the same, a first preliminary insulation pattern is formed on a substrate and includes a first opening exposing the substrate. One or more preliminary seed patterns including single crystalline silicon are formed in the first opening. A second insulation layer is formed on the first preliminary insulation pattern and the one or more preliminary seed patterns. A second insulation pattern, a first insulation pattern and one or more seed patterns are formed by etching the first and second insulation layers and the one or more preliminary seed patterns. The second insulation pattern includes a second opening having a flat bottom portion. A single crystalline silicon pattern is formed in the second opening, wherein a central thickness of the single crystalline silicon pattern is substantially identical to a peripheral thickness thereof, thereby reducing or preventing a thinning defect in a semiconductor device.

Abstract translation: 在薄层结构及其形成方法中，在基板上形成第一预备绝缘图案，并且包括暴露基板的第一开口。 在第一开口中形成包括单晶硅的一种或多种初步种子图案。 在第一预备绝缘图案和一个或多个初步种子图案上形成第二绝缘层。 通过蚀刻第一和第二绝缘层和一个或多个初步种子图案来形成第二绝缘图案，第一绝缘图案和一个或多个种子图案。 第二绝缘图案包括具有平坦底部的第二开口。 在第二开口中形成单晶硅图案，其中单晶硅图案的中心厚度与其周边厚度基本相同，从而减少或防止半导体器件中的变薄缺陷。