公开(公告)号：US09843303B2

公开(公告)日：2017-12-12

申请号：US14755522

申请日：2015-06-30

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： James W. Adkisson ,  Panglijen Candra ,  Thomas J. Dunbar ,  Jeffrey P. Gambino ,  Mark D. Jaffe ,  Anthony K. Stamper ,  Randy L. Wolf

IPC: H01L41/047 ,  H03H9/25 ,  H03H9/13 ,  H03H9/64 ,  H01L41/08 ,  G06F17/50 ,  H03H3/08 ,  H03H3/007 ,  H03H9/02

CPC classification number: H03H9/13 ,  G06F17/5081 ,  H01L41/08 ,  H03H3/08 ,  H03H9/02543 ,  H03H9/64 ,  H03H9/6403 ,  H03H9/6413 ,  H03H2003/0071 ,  H03H2009/02299 ,  Y10T29/42 ,  Y10T29/49005 ,  Y10T29/49126 ,  Y10T29/49147 ,  Y10T29/49155

Abstract: Switchable and/or tunable filters, methods of manufacture and design structures are disclosed herein. The method of forming the filters includes forming at least one piezoelectric filter structure comprising a plurality of electrodes formed on a piezoelectric substrate. The method further includes forming a fixed electrode with a plurality of fingers on the piezoelectric substrate. The method further includes forming a moveable electrode with a plurality of fingers over the piezoelectric substrate. The method further includes forming actuators aligned with one or more of the plurality of fingers of the moveable electrode.

公开(公告)号：US09312205B2

公开(公告)日：2016-04-12

申请号：US14195940

申请日：2014-03-04

Applicant: International Business Machines Corporation

Inventor： James W. Adkisson ,  Yoba Amoah ,  Jeffrey P. Gambino ,  Christine A. Leggett ,  Max L. Lifson ,  Charles F. Musante ,  Sruthi Samala ,  David C. Thomas

IPC: H01L23/48 ,  H01L23/00 ,  H01L21/768 ,  H01L23/532

CPC classification number: H01L23/481 ,  H01L21/76877 ,  H01L21/76898 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/562 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method including forming a through-substrate via through a thickness of a substrate, the thickness of the substrate is measured from a front side of the substrate to a back side of the substrate, removing a first portion of the substrate to form an opening in the back side of the substrate such that a second portion of the substrate remains in direct contact surrounding a vertical sidewall of the through-substrate via, and filling the opening with an alternate material having a lower modulus of elasticity than the substrate.

Abstract translation: 一种包括通过基板的厚度形成贯通基板的方法，从基板的前侧到基板的背面测量基板的厚度，去除基板的第一部分以形成开口 衬底的背面，使得衬底的第二部分保持与贯穿衬底通孔的垂直侧壁直接接触，并用与衬底相比具有较低弹性模量的替代材料填充该开口。

公开(公告)号：US09240448B2

公开(公告)日：2016-01-19

申请号：US14734713

申请日：2015-06-09

Applicant: International Business Machines Corporation

Inventor： James W. Adkisson ,  James R. Elliott ,  David L. Harame ,  Marwan H. Khater ,  Robert K. Leidy ,  Qizhi Liu ,  John J. Pekarik

IPC: H01L29/732 ,  H01L29/06 ,  H01L29/10 ,  H01L29/08

CPC classification number: H01L29/0649 ,  H01L29/045 ,  H01L29/0804 ,  H01L29/0817 ,  H01L29/0821 ,  H01L29/1004 ,  H01L29/66242 ,  H01L29/66257 ,  H01L29/66287 ,  H01L29/73 ,  H01L29/7325 ,  H01L29/7375

Abstract: Device structures for a bipolar junction transistor. The device structure includes a collector region, an intrinsic base formed on the collector region, an emitter coupled with the intrinsic base and separated from the collector by the intrinsic base, and an isolation region extending through the intrinsic base to the collector region. The isolation region is formed with a first section having first sidewalls that extend through the intrinsic base and a second section with second sidewalls that extend into the collector region. The second sidewalls are inclined relative to the first sidewalls. The isolation region is positioned in a trench that is formed with first and second etching process in which the latter etches different crystallographic directions of a single-crystal semiconductor material at different etch rates.

Abstract translation: 双极结型晶体管的器件结构。 器件结构包括集电极区域，形成在集电极区域上的本征基极，与本征基极耦合并与集电极与本征基极分离的发射极，以及延伸穿过本征基极到集电极区域的隔离区域。 隔离区形成有具有延伸穿过本征基底的第一侧壁的第一部分和具有延伸到收集器区域中的第二侧壁的第二部分。 第二侧壁相对于第一侧壁倾斜。 隔离区域位于形成有第一和第二蚀刻工艺的沟槽中，其中后者以不同的蚀刻速率蚀刻单晶半导体材料的不同晶体方向。

公开(公告)号：US08927379B2

公开(公告)日：2015-01-06

申请号：US13627179

申请日：2012-09-26

Applicant: International Business Machines Corporation

Inventor： James W. Adkisson ,  Kevin K. Chan ,  David L. Harame ,  Qizhi Liu ,  John J. Pekarik

IPC: H01L21/331 ,  H01L29/732 ,  H01L29/66 ,  H01L29/737 ,  H01L21/8228

CPC classification number: H01L29/7371 ,  H01L21/82285 ,  H01L29/0649 ,  H01L29/0817 ,  H01L29/0821 ,  H01L29/1004 ,  H01L29/16 ,  H01L29/66242 ,  H01L29/66272 ,  H01L29/732 ,  H01L29/7378

Abstract: A method of forming a heterojunction bipolar transistor. The method includes providing a structure comprising at least an intrinsic base region and an emitter pedestal region. A stack is formed on the intrinsic base region. The stack comprises a polysilicon layer and a top sacrificial oxide layer. A trench is formed in the structure. The trench circumscribes the intrinsic base region and the stack. An extrinsic base is formed at two regions around the stack. The extrinsic base is formed by a selective epitaxial growth process to create a bridge over the trench. The bridge connects the two regions. An opening is provided in the stack. The opening exposes a portion of the intrinsic base region. An emitter is formed in the opening.

公开(公告)号：US08796149B1

公开(公告)日：2014-08-05

申请号：US13769500

申请日：2013-02-18

Applicant: International Business Machines Corporation

Inventor： James W. Adkisson ,  David L. Harame ,  Qizhi Liu

IPC: H01L21/311

CPC classification number: H01L29/7371 ,  H01L29/0649 ,  H01L29/267 ,  H01L29/66242 ,  H01L29/7327 ,  H01L29/737 ,  H01L29/7378

Abstract: Fabrication methods, device structures, and design structures for a bipolar junction transistor. An emitter is formed in a device region defined in a substrate. An intrinsic base is formed on the emitter. A collector is formed that is separated from the emitter by the intrinsic base. The collector includes a semiconductor material having an electronic bandgap greater than an electronic bandgap of a semiconductor material of the device region.

Abstract translation: 双极结晶体管的制造方法，器件结构和设计结构。 在衬底中限定的器件区域中形成发射极。 在发射极上形成一个本征基极。 形成了通过内在基极与发射极分离的集电极。 集电体包括具有大于器件区域的半导体材料的电子带隙的电子带隙的半导体材料。