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公开(公告)号:US12131917B2
公开(公告)日:2024-10-29
申请号:US17523919
申请日:2021-11-11
Applicant: Innolux Corporation
Inventor: Yi-Hung Lin , Wen-Hsiang Liao , Cheng-Chi Wang , Yi-Chen Chou , Fuh-Tsang Wu , Ker-Yih Kao
CPC classification number: H01L21/566 , H01L21/0214 , H01L21/02164 , H01L21/4857 , H01L23/3192 , H01L2224/82005
Abstract: A manufacturing method of a package structure including the following steps is provided. A carrier is provided. An anti-warpage structure is formed on the carrier. And a redistribution layer is formed on the carrier. In the normal direction of the carrier, a warpage trend of the anti-warpage structure is opposite to a warpage trend of the redistribution layer.
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公开(公告)号:US12107036B2
公开(公告)日:2024-10-01
申请号:US17533068
申请日:2021-11-22
Applicant: Innolux Corporation
Inventor: Kuo-Jung Fan , Cheng-Chi Wang , Heng-Shen Yeh , Chuan-Ming Yeh
IPC: H01L23/498 , H01L21/48
CPC classification number: H01L23/49822 , H01L21/4857 , H01L23/49838 , H01L23/49866
Abstract: A redistribution layer structure and the manufacturing method thereof are provided. The redistribution layer structure includes a first metal layer, a first dielectric layer, a second metal layer, and a second dielectric layer. The first dielectric layer is disposed on the first metal layer. The second metal layer is disposed on the first dielectric layer. The second dielectric layer is disposed on the second metal layer. A chemical resistance of the first dielectric layer is greater than a chemical resistance of the second dielectric layer.
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公开(公告)号:US20240258241A1
公开(公告)日:2024-08-01
申请号:US18406204
申请日:2024-01-07
Applicant: InnoLux Corporation
Inventor: Jui-Jen YUEH , Cheng-Chi Wang , Ju-Li Wang
IPC: H01L23/538 , H01L21/56 , H01L23/00
CPC classification number: H01L23/5386 , H01L21/568 , H01L24/13 , H01L24/16 , H01L24/19 , H01L24/20 , H01L23/5383 , H01L25/03 , H01L25/16 , H01L2224/13111 , H01L2224/13139 , H01L2224/13144 , H01L2224/13155 , H01L2224/16227 , H01L2224/19 , H01L2224/211
Abstract: The present disclosure provides an electronic device and a manufacturing method. The electronic device includes a base layer, a first redistribution structure, a first electronic unit, a second electronic unit, a protecting layer, and a connecting component. The base layer includes at least one via structure. The first redistribution structure is disposed on the base layer, and the first electronic unit and the second electronic unit are disposed on the first redistribution structure. The protecting layer surrounds the first electronic unit and the second electronic unit, and the first electronic unit and the second electronic unit are electrically connected to the connecting component through the first redistribution structure and the at least one via structure.
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公开(公告)号:US20230026151A1
公开(公告)日:2023-01-26
申请号:US17524713
申请日:2021-11-11
Applicant: Innolux Corporation
Inventor: Chuan-Ming Yeh , Heng-Shen Yeh , Kuo-Jung Fan , Cheng-Chi Wang
IPC: H01L21/48 , H01L23/498 , H01L23/00 , H05K1/02
Abstract: The embodiment of the disclosure provides a composite layer circuit element and a manufacturing method thereof. The manufacturing method of the composite layer circuit element includes the following. A carrier is provided. A first dielectric layer is formed on the carrier, and the first dielectric layer is patterned. The carrier on which the first dielectric layer is formed is disposed on a first curved-surface mold, and the first dielectric layer is cured. A second dielectric layer is formed on the first dielectric layer. The second dielectric layer is patterned. The carrier on which the first dielectric layer and the second dielectric layer are formed is disposed on a second curved-surface mold, and the second dielectric layer is cured. A thickness of a projection of the first curved-surface mold is smaller than a thickness of a projection of the second curved-surface mold.
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公开(公告)号:US20220189862A1
公开(公告)日:2022-06-16
申请号:US17530373
申请日:2021-11-18
Applicant: Innolux Corporation
Inventor: Hung-Sheng Chou , Wen-Hsiang Liao , Kuo-Jung Fan , Heng-Shen Yeh , Cheng-Chi Wang
IPC: H01L23/498 , H01L21/48
Abstract: A redistribution layer structure is provided. The redistribution layer structure includes a first metal layer and a first dielectric layer disposed on the first metal layer. A range of a difference between a coefficient of thermal expansion of the first dielectric layer and a coefficient of thermal expansion of the first metal layer is 0% to 70% of the coefficient of thermal expansion of the first dielectric layer.
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公开(公告)号:US20220181242A1
公开(公告)日:2022-06-09
申请号:US17533068
申请日:2021-11-22
Applicant: Innolux Corporation
Inventor: Kuo-Jung Fan , Cheng-Chi Wang , Heng-Shen Yeh , Chuan-Ming Yeh
IPC: H01L23/498 , H01L21/48
Abstract: A redistribution layer structure and the manufacturing method thereof are provided. The redistribution layer structure includes a first metal layer, a first dielectric layer, a second metal layer, and a second dielectric layer. The first dielectric layer is disposed on the first metal layer. The second metal layer is disposed on the first dielectric layer. The second dielectric layer is disposed on the second metal layer. A chemical resistance of the first dielectric layer is greater than a chemical resistance of the second dielectric layer.
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公开(公告)号:US20220181189A1
公开(公告)日:2022-06-09
申请号:US17520599
申请日:2021-11-05
Applicant: Innolux Corporation
Inventor: Cheng-Chi Wang , Wen-Hsiang Liao , Yeong-E Chen , Hung-Sheng Chou , Cheng-En Cheng
IPC: H01L21/683 , H01L21/48
Abstract: A manufacturing method of a semiconductor package is provided. The manufacturing method includes the following. A plurality of semiconductor components are provided. Each semiconductor component has at least one conductive bump. A substrate is provided. The substrate has a plurality of conductive pads. A transfer device is provided. The transfer device transfers the semiconductor components onto the substrate. A heating device is provided. The heating device heats or pressurizes at least two semiconductor components. During transferring of the semiconductor components to the substrate, the at least one conductive bump of each semiconductor component is docked to a corresponding one of the conductive pads.
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公开(公告)号:US20180323126A1
公开(公告)日:2018-11-08
申请号:US15943736
申请日:2018-04-03
Applicant: InnoLux Corporation
Inventor: Yi-Hung Lin , Chien-Chang Lu , Cheng-I Wu , Li-Wei Sung , Cheng-Chi Wang , Chin-Lung Ting
CPC classification number: H01L23/3107 , H01L24/27 , H01L24/29 , H01L24/32 , H01L27/0266 , H01L2224/0231 , H01L2224/02331 , H01L2224/02371 , H01L2224/0239 , H01L2224/024
Abstract: The present disclosure provides a package structure including a redistribution layer and a die. The redistribution layer includes a switch circuit portion and a redistribution portion, the switch circuit portion includes a transistor, and the redistribution portion is adjacent to the switch circuit portion. The die overlaps the redistribution portion, wherein the transistor is electrically connected to the die.
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公开(公告)号:US12185461B2
公开(公告)日:2024-12-31
申请号:US18073592
申请日:2022-12-02
Applicant: InnoLux Corporation
Inventor: Cheng-Chi Wang , Chin-Ming Huang , Chien-Feng Li , Chia-Lin Yang
Abstract: An electronic device including an electronic unit and a redistribution layer is disclosed. The electronic unit has connection pads. The redistribution layer is electrically connected to the electronic unit and includes a first insulating layer, a first metal layer and a second insulating layer. The first insulating layer is disposed on the electronic unit and has first openings disposed corresponding to the connection pads. The first metal layer is disposed on the first insulating layer and electrically connected to the electronic unit through the connection pads. The second insulating layer is disposed on the first metal layer. The first insulating layer includes first filler particles, and the second insulating layer includes second filler particles. The first filler particles have a first maximum particle size, the second filler particles have a second maximum particle size, and the second maximum particle size is greater than the first maximum particle size.
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公开(公告)号:US20240079348A1
公开(公告)日:2024-03-07
申请号:US18231245
申请日:2023-08-07
Applicant: InnoLux Corporation
Inventor: Ker-Yih Kao , Cheng-Chi Wang , Yen-Fu Liu , Ju-Li Wang , Jui-Jen Yueh
IPC: H01L23/00 , H01L23/31 , H01L23/498 , H01L29/786
CPC classification number: H01L23/562 , H01L23/3128 , H01L23/49822 , H01L24/08 , H01L29/78603 , H01L2224/08225
Abstract: An electronic device includes a chip and a circuit structure layer overlapped with the chip. The circuit structure layer includes a redistribution structure layer and an element structure layer, and the redistribution structure layer and the element structure layer are electrically connected to the chip. At least one of the redistribution structure layer and the element structure layer includes at least one opening, and in a normal direction of the electronic device, the at least one opening is overlapped with aside of the chip.
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