公开(公告)号：US5764119A

公开(公告)日：1998-06-09

申请号：US725167

申请日：1996-10-03

Applicant: Takeshi Miyagi ,  Yuji Iseki ,  Yasushi Shizuki ,  Kunio Yoshihara ,  Masayuki Saito ,  Kazuhito Higuchi ,  Takeshi Hanawa ,  Eiji Takagi

Inventor： Takeshi Miyagi ,  Yuji Iseki ,  Yasushi Shizuki ,  Kunio Yoshihara ,  Masayuki Saito ,  Kazuhito Higuchi ,  Takeshi Hanawa ,  Eiji Takagi

IPC: H01P3/08 ,  H05K1/02 ,  H05K1/14 ,  H05K3/04 ,  H05K3/10 ,  H05K3/46

CPC classification number: H05K3/045 ,  H01P3/088 ,  H05K1/0242 ,  H05K1/144 ,  H05K2201/09036 ,  H05K2201/098 ,  H05K3/107 ,  H05K3/465

Abstract: A wiring board for high-frequency signals, which comprises, a substrate, a dielectric layer formed on the substrate and provided on its surface with a U-shaped groove having an arcuate bottom for forming a wiring therein, and a signal wiring formed in the U-shaped groove, which is featured in that an upper end portion of the signal wiring is protruded out of the surface of the dielectric layer. A distance (H) from a protruded top surface of the signal wiring to a bottom of the U-shaped groove and a width (W) of the U-shaped groove preferably meet a relationship of 2

Abstract translation: 一种高频信号用布线基板，其特征在于，包括：基板，形成在所述基板上的电介质层，其表面上形成有用于在其中形成布线的弓形底部的U形槽，以及形成在所述基板上的信号布线 U形槽的特征在于，信号线的上端部突出到电介质层的表面之外。 从信号线的突出顶面到U形槽的底部的距离（H）和U形槽的宽度（W）优选满足2 <（W / H）<50的关系， 并且从电介质层的表面突出的信号布线的部分的高度优选在10nm至10μm的范围内。

公开(公告)号：US08581291B2

公开(公告)日：2013-11-12

申请号：US12556134

申请日：2009-09-09

Applicant: Kazuo Shimokawa ,  Takashi Koyanagawa ,  Takeshi Miyagi ,  Akihiko Happoya ,  Kazuhito Higuchi ,  Tomoyuki Kitani

Inventor： Kazuo Shimokawa ,  Takashi Koyanagawa ,  Takeshi Miyagi ,  Akihiko Happoya ,  Kazuhito Higuchi ,  Tomoyuki Kitani

IPC: H01L33/00

CPC classification number: H01L33/507 ,  H01L33/0079 ,  H01L33/38 ,  H01L33/44 ,  H01L33/505 ,  H01L33/56 ,  H01L33/62 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Provided is an optical semiconductor device includes: a light-emitting layer having a first main surface, a second main surface opposed to the first main surface, a first electrode and a second electrode which are formed on the second main surface; a fluorescent layer provided on the first main surface; a light-transmissive layer provided on the fluorescent layer and made of a light-transmissive inorganic material; a first metal post provided on the first electrode; a second metal post provided on the second electrode; a sealing layer provided on the second main surface so as to seal in the first and second metal posts with one ends of the respective first and second metal posts exposed; a first metal layer provided on the exposed end of the first metal post; and a second metal layer provided on the exposed end of the second metal post.

Abstract translation: 本发明提供一种光半导体装置，具备：具有第一主面，与第一主面相对的第二主面的发光层，形成在第二主面上的第一电极和第二电极; 设置在所述第一主表面上的荧光层; 设置在荧光层上并由透光性无机材料制成的透光层; 设置在所述第一电极上的第一金属柱; 设置在所述第二电极上的第二金属柱; 密封层，设置在所述第二主表面上，以便密封在所述第一和第二金属柱中，所述第一和第二金属柱的一端暴露; 设置在第一金属柱的暴露端上的第一金属层; 以及设置在第二金属柱的暴露端上的第二金属层。

公开(公告)号：US08378479B2

公开(公告)日：2013-02-19

申请号：US13188124

申请日：2011-07-21

Applicant: Akira Tojo ,  Tomoyuki Kitani ,  Kazuhito Higuchi ,  Masako Fukumitsu ,  Tomohiro Iguchi ,  Hideo Nishiuchi ,  Kyoto Kato

Inventor： Akira Tojo ,  Tomoyuki Kitani ,  Kazuhito Higuchi ,  Masako Fukumitsu ,  Tomohiro Iguchi ,  Hideo Nishiuchi ,  Kyoto Kato

IPC: H01L23/48 ,  H01L23/52

CPC classification number: H01L24/97 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3107 ,  H01L23/544 ,  H01L24/03 ,  H01L24/48 ,  H01L2223/54433 ,  H01L2223/54486 ,  H01L2224/04042 ,  H01L2224/274 ,  H01L2224/48091 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: According to an aspect of the present invention, there is provided a semiconductor device, including a semiconductor chip including a first electrode and a second electrode of a semiconductor element, the first electrode and the second electrode being configured on a first surface and a second surface of the semiconductor chip, an encapsulating material encapsulating the semiconductor chip, the surface portion being other than regions, each of the regions connecting with the first second electrodes, each of inner electrodes being connected with the first or the second electrodes, a thickness of the inner electrode from the first surface or the second surface being the same thickness as the encapsulating material from the first surface or the second surface, respectively, outer electrodes, each of the outer electrodes being formed on the encapsulating material and connected with the inner electrode, a width of the outer electrode being at least wider than a width of the semiconductor chip, and outer plating materials, each of the outer plating materials covering five surfaces of the outer electrode other than one surface of the outer electrode being connected with the inner electrode.

Abstract translation: 根据本发明的一个方面，提供一种半导体器件，包括半导体芯片，该半导体芯片包括第一电极和半导体元件的第二电极，第一电极和第二电极被配置在第一表面和第二表面上 半导体芯片的封装材料，封装半导体芯片的封装材料，表面部分不同于区域，每个区域与第一第二电极连接，每个内部电极与第一或第二电极连接，厚度为 来自第一表面或第二表面的内部电极分别与来自第一表面或第二表面的密封材料的厚度相同，外部电极，每个外部电极形成在封装材料上并与内部电极连接， 外部电极的宽度至少比半导体ch的宽度宽 ip和外部电镀材料，覆盖外部电极的除了外部电极的一个表面以外的五个表面的每个外部电镀材料与内部电极连接。

公开(公告)号：US20100244869A1

公开(公告)日：2010-09-30

申请号：US12731609

申请日：2010-03-25

Applicant: Masayuki UCHIDA ,  Kazuhito Higuchi ,  Tomohiro Iguchi

Inventor： Masayuki UCHIDA ,  Kazuhito Higuchi ,  Tomohiro Iguchi

IPC: G01R31/02

CPC classification number: G01R1/06722 ,  G01R1/06761

Abstract: An aspect of the present disclosure, there is provided An electrical inspection probe, including, a leading end portion of the electrical inspection probe, the leading end portion contacting with a solder bump located outward the electrical inspection probe, a base material configured at the leading end portion, the base material being constituted with a conductive material, a gold layer on a surface of the base material at least in the leading end portion, a rhodium layer on a surface of the gold layer at least in the leading end portion, and a ruthenium layer on a surface of the rhodium layer at least in the leading end portion.

Abstract translation: 本发明的一个方面，提供了一种电气检查探针，其包括电检查探针的前端部，前端部与位于电检查探针外侧的焊料凸块接触，基体材料配置在前导部 所述基材由导电材料构成，至少在所述前端部的所述基材的表面上的金层，在所述金层的至少前端部的表面上的铑层，以及 铑层的至少在前端部的铑层。

公开(公告)号：US20100052142A1

公开(公告)日：2010-03-04

申请号：US12553452

申请日：2009-09-03

Applicant: Akira Tojo ,  Tomoyuki Kitani ,  Kazuhito Higuchi ,  Masako Fukumitsu ,  Tomohiro Iguchi ,  Hideo Nishiuchi ,  Kyoko Kato

Inventor： Akira Tojo ,  Tomoyuki Kitani ,  Kazuhito Higuchi ,  Masako Fukumitsu ,  Tomohiro Iguchi ,  Hideo Nishiuchi ,  Kyoko Kato

IPC: H01L23/28 ,  H01L21/56

CPC classification number: H01L24/97 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3107 ,  H01L23/544 ,  H01L24/03 ,  H01L24/48 ,  H01L2223/54433 ,  H01L2223/54486 ,  H01L2224/04042 ,  H01L2224/274 ,  H01L2224/48091 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: According to an aspect of the present invention, there is provided a semiconductor device, including a semiconductor chip including a first electrode and a second electrode of a semiconductor element, the first electrode and the second electrode being configured on a first surface and a second surface of the semiconductor chip, an encapsulating material encapsulating the semiconductor chip, the surface portion being other than regions, each of the regions connecting with the first second electrodes, each of inner electrodes being connected with the first or the second electrodes, a thickness of the inner electrode from the first surface or the second surface being the same thickness as the encapsulating material from the first surface or the second surface, respectively, outer electrodes, each of the outer electrodes being formed on the encapsulating material and connected with the inner electrode, a width of the outer electrode being at least wider than a width of the semiconductor chip, and outer plating materials, each of the outer plating materials covering five surfaces of the outer electrode other than one surface of the outer electrode being connected with the inner electrode.

Abstract translation: 根据本发明的一个方面，提供一种半导体器件，包括半导体芯片，该半导体芯片包括第一电极和半导体元件的第二电极，第一电极和第二电极被配置在第一表面和第二表面上 半导体芯片的封装材料，封装半导体芯片的封装材料，表面部分不同于区域，每个区域与第一第二电极连接，每个内部电极与第一或第二电极连接，厚度为 来自第一表面或第二表面的内部电极分别与来自第一表面或第二表面的密封材料的厚度相同，外部电极，每个外部电极形成在封装材料上并与内部电极连接， 外部电极的宽度至少比半导体ch的宽度宽 ip和外部电镀材料，覆盖外部电极的除了外部电极的一个表面以外的五个表面的每个外部电镀材料与内部电极连接。

公开(公告)号：US07622205B2

公开(公告)日：2009-11-24

申请号：US11104274

申请日：2005-04-12

Applicant: Hiroyuki Uwazumi ,  Youichi Tei ,  Kengo Kainuma ,  Kazuhito Higuchi ,  Akira Iso ,  Hajime Kurihara

Inventor： Hiroyuki Uwazumi ,  Youichi Tei ,  Kengo Kainuma ,  Kazuhito Higuchi ,  Akira Iso ,  Hajime Kurihara

IPC: G11B5/64 ,  G11B5/00 ,  G11B15/70

CPC classification number: G11B5/667 ,  G11B5/7315

Abstract: A disk substrate for a perpendicular magnetic recording medium is, disclosed. The substrate exhibits sufficient productivity, serves the function of a soft magnetic backing layer of the perpendicular magnetic recording medium, and scarcely generates noise. A perpendicular magnetic recording medium using such a substrate also is disclosed. The disk substrate comprises at least a soft magnetic underlayer formed on a nonmagnetic base plate by means of an electroless plating method. The thermal expansion coefficient of the soft magnetic underlayer is larger than a thermal expansion coefficient of the nonmagnetic disk-shaped base plate. A saturation magnetostriction constant λs satisfies a relation λs≧−1×10−5.

Abstract translation: 公开了一种用于垂直磁记录介质的盘基片。 基板表现出足够的生产率，起到垂直磁记录介质的软磁背衬层的功能，并且几乎不产生噪声。 还公开了使用这种基板的垂直磁记录介质。 盘状基板通过无电镀法至少包含在非磁性基板上形成的软磁性底层。 软磁性底层的热膨胀系数大于非磁性盘状基板的热膨胀系数。 饱和磁致伸缩常数lambdas满足关系lambdas> = - 1×10-5。

公开(公告)号：US20080211076A1

公开(公告)日：2008-09-04

申请号：US12040209

申请日：2008-02-29

Applicant: Hideo Nishiuchi ,  Takeshi Miyagi ,  Kazuki Tateyama ,  Susumu Obata ,  Kazuhito Higuchi

Inventor： Hideo Nishiuchi ,  Takeshi Miyagi ,  Kazuki Tateyama ,  Susumu Obata ,  Kazuhito Higuchi

IPC: H01L23/04 ,  H01L21/00

CPC classification number: B81B7/0077 ,  B81C2203/0136 ,  B81C2203/0145

Abstract: A semiconductor device capable of elevating a yield rate of products to improve the productivity and also ensuring high reliability in production and a manufacturing method of the semiconductor device are provided. The semiconductor device includes a semiconductor substrate 2, a MEMS part 3 formed on a surface of the semiconductor substrate 2 and a cap part arranged at a distance from the MEMS part 3 and also arranged on the surface of the semiconductor substrate 2 so as to cover the MEMS part 3. In the semiconductor device, the cap part is formed by a sidewall area E surrounding the MEMS part 3 and a top board area F having a hollow layer and also forming a closed space together with the semiconductor substrate 2 and the sidewall area E.

Abstract translation: 提供能够提高产品的成品率以提高生产率并且还确保高生产可靠性的半导体器件和半导体器件的制造方法。 半导体器件包括半导体衬底2，形成在半导体衬底2的表面上的MEMS部分3和与MEMS部分3相距一定距离地布置并且还被布置在半导体衬底2的表面上以覆盖 MEMS部件3.在半导体器件中，盖部分由围绕MEMS部件3的侧壁区域E和具有中空层的顶板区域F形成，并且还与半导体衬底2和侧壁一起形成封闭空间 区域E.

公开(公告)号：US20080073794A1

公开(公告)日：2008-03-27

申请号：US11854187

申请日：2007-09-12

Applicant: Susumu Obata ,  Izuru Komatsu ,  Tomohiro Iguchi ,  Tomoyuki Kitani ,  Masako Hirahara ,  Yasunari Ukita ,  Kazuhito Higuchi

Inventor： Susumu Obata ,  Izuru Komatsu ,  Tomohiro Iguchi ,  Tomoyuki Kitani ,  Masako Hirahara ,  Yasunari Ukita ,  Kazuhito Higuchi

IPC: H01L23/48 ,  H01L21/4763

CPC classification number: H01L23/49562 ,  H01L23/3135 ,  H01L23/49524 ,  H01L24/24 ,  H01L24/40 ,  H01L24/82 ,  H01L24/84 ,  H01L2224/24246 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/82039 ,  H01L2224/8485 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1306 ,  H01L2924/181 ,  H01L2924/19043 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A semiconductor device (3) is provided with a first electrode (A), a lead (4) has a second electrode (B), and a metallic film (6) electrically interconnects the first electrode (A) and the second electrode (B), allowing for a more reduced internal resistance, high reliability, and facilitated fabrication.

Abstract translation: 半导体器件（3）具有第一电极（A），引线（4）具有第二电极（B），金属膜（6）将第一电极（A）和第二电极（B） ），允许更低的内阻，高可靠性和便于制造。