公开(公告)号：US11792057B2

公开(公告)日：2023-10-17

申请号：US17852922

申请日：2022-06-29

Applicant: Rambus Inc.

Inventor： Masum Hossain ,  Richelle L. Smith ,  Carl W. Werner

IPC: H04L27/20 ,  H04L27/233 ,  H04L27/34

CPC classification number: H04L27/2338 ,  H04L27/2057 ,  H04L27/2337 ,  H04L27/3411

Abstract: A communication system comprises a transmitter and a receiver that communicate differential phase modulated data over a wireline channel pair. The transmitter encodes data symbols by generating first and second data signals with differentially phase shifted signal transitions with respect to one another. The receiver receives the first data signal and the second data signal and samples the first data signal based on a signal transition timing of the second data signal to generate a first output data symbol. The receiver furthermore samples the second data signal based on signal transition timing of the first data signal to generate a second output data symbol.

公开(公告)号：US20230139848A1

公开(公告)日：2023-05-04

申请号：US17967029

申请日：2022-10-17

Applicant: Rambus Inc.

Inventor： Mark D. Kellam ,  Carl W. Werner

IPC: H04B10/40 ,  H04B10/532

Abstract: A photonic communication system in which a host communicates bidirectionally with a target via a single optical fiber using light of the same wavelength and from the same light source. Signals flowing in opposite directions are discriminated based on polarity. Using the same fiber and light source in both directions reduces cost, complexity, and power consumption.

公开(公告)号：US11411787B2

公开(公告)日：2022-08-09

申请号：US17363557

申请日：2021-06-30

Applicant: Rambus Inc.

Inventor： Masum Hossain ,  Richelle L. Smith ,  Carl W. Werner

IPC: H04L27/227 ,  H04L27/233 ,  H04L27/34 ,  H04L27/20

Abstract: A communication system comprises a transmitter and a receiver that communicate differential phase modulated data over a wireline channel pair. The transmitter encodes data symbols by generating first and second data signals with differentially phase shifted signal transitions with respect to one another. The receiver receives the first data signal and the second data signal and samples the first data signal based on a signal transition timing of the second data signal to generate a first output data symbol. The receiver furthermore samples the second data signal based on signal transition timing of the first data signal to generate a second output data symbol.

公开(公告)号：US11088880B2

公开(公告)日：2021-08-10

申请号：US16864079

申请日：2020-04-30

Applicant: Rambus Inc.

Inventor： Masum Hossain ,  Richelle L. Smith ,  Carl W. Werner

IPC: H04L27/20 ,  H04L27/233 ,  H04L27/34

Abstract: A communication system comprises a transmitter and a receiver that communicate differential phase modulated data over a wireline channel pair. The transmitter encodes data symbols by generating first and second data signals with differentially phase shifted signal transitions with respect to one another. The receiver receives the first data signal and the second data signal and samples the first data signal based on a signal transition timing of the second data signal to generate a first output data symbol. The receiver furthermore samples the second data signal based on signal transition timing of the first data signal to generate a second output data symbol.

公开(公告)号：US10658987B2

公开(公告)日：2020-05-19

申请号：US16206864

申请日：2018-11-30

Applicant: Rambus Inc.

Inventor： Richelle L. Smith ,  Roxanne Vu ,  Carl W. Werner

IPC: H03F1/56 ,  H03F3/45 ,  H03K19/195 ,  H01L27/12 ,  H03F1/30 ,  H01L27/092

Abstract: The embodiments herein describe technologies of an amplifier circuit that is designed for wideband communication with superconductive components in cryogenic applications, including Josephson Junction integrated circuits, operating in a cryogenic temperature domain (e.g., 4K). The amplifier circuit operates in a temperature domain (e.g., 77K) that is higher than the cryogenic temperature domain of the superconductive components.

公开(公告)号：US20190190463A1

公开(公告)日：2019-06-20

申请号：US16206864

申请日：2018-11-30

Applicant: Rambus Inc.

Inventor： Richelle L. Smith ,  Roxanne Vu ,  Carl W. Werner

IPC: H03F1/56 ,  H03F3/45 ,  H03K19/195 ,  H01L27/12 ,  H03F1/30

CPC classification number: H03F1/56 ,  H01L27/0928 ,  H01L27/1203 ,  H03F1/301 ,  H03F3/45228 ,  H03F2200/129 ,  H03F2200/222 ,  H03F2200/294 ,  H03F2200/462 ,  H03F2203/45288 ,  H03F2203/45528 ,  H03K19/195

Abstract: The embodiments herein describe technologies of an amplifier circuit that is designed for wideband communication with superconductive components in cryogenic applications, including Josephson Junction integrated circuits, operating in a cryogenic temperature domain (e.g., 4K). The amplifier circuit operates in a temperature domain (e.g., 77K) that is higher than the cryogenic temperature domain of the superconductive components.

公开(公告)号：US20180168070A1

公开(公告)日：2018-06-14

申请号：US15783949

申请日：2017-10-13

Applicant: Rambus Inc.

Inventor： Frederick A. Ware ,  Carl W. Werner

IPC: H05K7/20 ,  G06F1/20 ,  H01B7/04 ,  G06F1/18 ,  H01B7/29 ,  H01L27/108

CPC classification number: H05K7/20372 ,  G06F1/18 ,  G06F1/20 ,  G06F1/206 ,  H01B1/026 ,  H01B3/12 ,  H01B7/04 ,  H01B7/29 ,  H01L23/3677 ,  H01L23/49888 ,  H01L23/522 ,  H01L23/53285 ,  H01L23/5387 ,  H01L27/108

Abstract: The embodiments herein describe technologies of cryogenic digital systems with a first component located in a first cryogenic temperature domain and a second component located in a second cryogenic temperature domain that is lower in temperature than the first cryogenic temperature domain. An electrical conductor is coupled between the first component and the second component along a first plane. The electrical conductor carries a signal between the first component and the second component. A cooling assembly is coupled to a segment of the electrical conductor. The cooling assembly may include an electrical insulator including ceramic material. The cooling assembly may include a cold plate, two cold plates, or an orthogonal cold strip.

公开(公告)号：US09998305B2

公开(公告)日：2018-06-12

申请号：US15400647

申请日：2017-01-06

Applicant: Rambus Inc.

Inventor： Jared L. Zerbe ,  Bruno W. Garlepp ,  Pak S. Chau ,  Kevin S. Donnelly ,  Mark A. Horowitz ,  Stefanos Sidiropoulos ,  Billy W. Garrett, Jr. ,  Carl W. Werner

IPC: H04B17/00 ,  H04L25/03 ,  H04L25/49 ,  H04L25/02 ,  H04L7/033 ,  G06F13/16 ,  G06F13/40 ,  G11C7/10 ,  G11C8/10

CPC classification number: H04L25/4917 ,  G06F13/1678 ,  G06F13/4068 ,  G11C7/10 ,  G11C7/1051 ,  G11C7/1057 ,  G11C7/106 ,  G11C7/1072 ,  G11C7/1078 ,  G11C7/1084 ,  G11C7/1087 ,  G11C7/22 ,  G11C8/10 ,  G11C11/56 ,  G11C27/02 ,  G11C2207/108 ,  H04L7/0331 ,  H04L7/0332 ,  H04L25/0272 ,  H04L25/0282 ,  H04L25/0296 ,  H04L25/0298 ,  H04L25/03006 ,  H04L25/03057 ,  H04L25/08 ,  H04L25/4902

Abstract: An integrated circuit device includes an output driver having a data signal terminal, logic circuitry, and a driver circuit coupled to the logic circuitry and data signal terminal. The driver circuit is configured to drive a signal corresponding to a symbol onto the data signal terminal, wherein the symbol is an N-bit symbol, having one of 2N predefined values, N is an integer greater than 1, and the signal corresponding to the symbol has one of 2N signal levels. The driver circuit includes first, second and third driver sub-circuits, each driven by an input corresponding to one or more bits of the N-bit symbol, wherein the second and third driver sub-circuits are weighted, relative to the first driver sub-circuit, to reduce gds distortion in the signal.

公开(公告)号：US09544169B2

公开(公告)日：2017-01-10

申请号：US14158675

申请日：2014-01-17

Applicant: Rambus Inc.

Inventor： Jared L. Zerbe ,  Bruno W. Garlepp ,  Pak S. Chau ,  Kevin S. Donnelly ,  Mark A. Horowitz ,  Stefanos Sidiropoulos ,  Billy W. Garrett, Jr. ,  Carl W. Werner

IPC: H04B17/00 ,  H04L25/03 ,  G11C7/22 ,  G11C11/56 ,  H04L25/02 ,  H04L25/08 ,  H04L25/49 ,  G11C7/10 ,  G11C27/02 ,  H04L7/033

CPC classification number: H04L25/4917 ,  G06F13/1678 ,  G06F13/4068 ,  G11C7/10 ,  G11C7/1051 ,  G11C7/1057 ,  G11C7/106 ,  G11C7/1072 ,  G11C7/1078 ,  G11C7/1084 ,  G11C7/1087 ,  G11C7/22 ,  G11C8/10 ,  G11C11/56 ,  G11C27/02 ,  G11C2207/108 ,  H04L7/0331 ,  H04L7/0332 ,  H04L25/0272 ,  H04L25/0282 ,  H04L25/0296 ,  H04L25/0298 ,  H04L25/03006 ,  H04L25/03057 ,  H04L25/08 ,  H04L25/4902

Abstract: An integrated circuit device includes a sense amplifier with an input to receive a present signal representing a present bit. The sense amplifier is to produce a decision regarding a logic level of the present bit. The integrated circuit device also includes a circuit to precharge the input of the sense amplifier by applying to the input of the sense amplifier a portion of a previous signal representing a previous bit. The integrated circuit device further includes a latch, coupled to the sense amplifier, to output the logic level.

Abstract translation: 集成电路器件包括具有输入端的读出放大器，用于接收表示当前位的当前信号。 读出放大器将产生关于当前位的逻辑电平的判定。 该集成电路器件还包括一个电路，用于通过向读出放大器的输入端施加代表先前位的先前信号的一部分来对读出放大器的输入进行预充电。 集成电路器件还包括耦合到读出放大器以输出逻辑电平的锁存器。

公开(公告)号：US20160344451A1

公开(公告)日：2016-11-24

申请号：US15138077

申请日：2016-04-25

Applicant: Rambus Inc.

Inventor： John W. Poulton ,  Frederick A. Ware ,  Carl W. Werner

IPC: H04B3/56 ,  H04L25/02

CPC classification number: H04B3/56 ,  G06F13/4072 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49109 ,  H01L2924/15311 ,  H03F3/24 ,  H04B3/54 ,  H04B10/0731 ,  H04B10/40 ,  H04B10/50 ,  H04B2001/0408 ,  H04L25/0272 ,  H01L2924/00014

Abstract: A single-ended data transmission system transmits a signal having a signal voltage that is referenced to a power supply voltage and that swings above and below the power supply voltage. The power supply voltage is coupled to a power supply rail that also serves as a signal return path. The signal voltage is derived from two signal supply voltages generated by a pair of charge pumps that draw substantially same amount of current from a power supply.

Abstract translation: 单端数据传输系统传输具有参考电源电压并且在电源电压之上和之下摆动的信号电压的信号。 电源电压耦合到也用作信号返回路径的电源轨。 信号电压是由一对电荷泵产生的两个信号电源电压得出的，该电荷泵从电源中抽取大致相同的电流量。