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公开(公告)号：US20120308718A1
公开(公告)日：2012-12-06
申请号：US13585301
申请日：2012-08-14
Applicant: Ryoichi Watanabe
Inventor： Ryoichi Watanabe
IPC: H05K3/00
CPC classification number: H05K3/0014 , H05K3/045 , H05K3/107 , H05K3/465 , H05K3/4682 , H05K2201/0376 , H05K2203/0156 , H05K2203/0264 , H05K2203/0537 , H05K2203/0769 , H05K2203/308
Abstract: A method of fabricating a multilayer printed circuit board includes forming a first circuit-forming pattern and a via-forming pattern on a first carrier, and forming a first insulation layer; repeatedly forming inner circuit patterns and inner insulation layers over the first insulation layer by forming circuit-forming patterns and imprinting, and forming inner vias connecting the inner circuit patterns positioned on different insulation layers; forming a second circuit-forming pattern on a second carrier and inserting the first circuit-forming pattern and the second circuit-forming pattern respectively into the first insulation layer and a second insulation layer; removing the first carrier and the second carrier; forming circuit-forming grooves by removing the first circuit-forming pattern and the second circuit-forming pattern, and forming via-forming indentations connected with the circuit-forming grooves; and forming outer circuit patterns and outer vias by filling the circuit-forming grooves and the via-forming indentations with a conductive material.
Abstract translation: 一种制造多层印刷电路板的方法包括在第一载体上形成第一电路形成图案和通路形成图案，并形成第一绝缘层; 通过形成电路形成图案和压印，在第一绝缘层上反复形成内部电路图案和内部绝缘层，并形成连接位于不同绝缘层上的内部电路图案的内部通孔; 在第二载体上形成第二电路形成图案，并将第一电路形成图案和第二电路形成图案分别插入第一绝缘层和第二绝缘层中; 移除所述第一载体和所述第二载体; 通过去除第一电路形成图案和第二电路形成图案形成电路形成槽，以及形成与电路形成槽连接的通孔形成凹陷; 以及通过用导电材料填充电路形成槽和通孔形成凹陷来形成外部电路图案和外部通孔。
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公开(公告)号：US20120068616A1
公开(公告)日：2012-03-22
申请号：US13237572
申请日：2011-09-20
Applicant: Takashi Akiyama , Rintaro Takahashi , Hisashi Fukasawa , Ryoichi Watanabe
Inventor： Takashi Akiyama , Rintaro Takahashi , Hisashi Fukasawa , Ryoichi Watanabe
IPC: H05B37/00
CPC classification number: H05B33/0809
Abstract: An object of the invention is to provide an LED drive circuit that can suppress the generation of harmonic noise. The LED drive circuit includes a rectifying circuit an LED array, and a current supply circuit which includes a capacitor and a time constant adjusting element, wherein the discharge time constant of the current supply circuit is set longer than the charge time constant of the current supply circuit, and wherein during a period of time when the magnitude of AC commercial power supply voltage is larger than the light emission threshold of the LED array, current to the light-emitting circuit is supplied mostly from the rectifying circuit, and during a period of time when the magnitude of AC commercial power supply voltage is not larger than the light emission threshold of the LED array, current to the light-emitting circuit is supplied from the current supply circuit.
Abstract translation: 本发明的目的是提供一种可以抑制谐波噪声的产生的LED驱动电路。 LED驱动电路包括LED阵列的整流电路和包括电容器和时间常数调节元件的电流供给电路，其中电流供给电路的放电时间常数被设定为长于电流供给的充电时间常数 并且其中在AC商用电源电压的大小大于LED阵列的发光阈值的时间段期间，到发光电路的电流主要来自整流电路，并且在一段时间 当交流商用电源电压的大小不大于LED阵列的发光阈值时，从电流供给电路供给到发光电路的电流。
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公开(公告)号：US08065797B2
公开(公告)日：2011-11-29
申请号：US11896774
申请日：2007-09-05
Applicant: Ryoichi Watanabe , Byoung-Youl Min , Je-Gwang Yoo , Joon-Sung Kim , Seung-Chul Kim , Myung-San Kang
Inventor： Ryoichi Watanabe , Byoung-Youl Min , Je-Gwang Yoo , Joon-Sung Kim , Seung-Chul Kim , Myung-San Kang
CPC classification number: H05K3/0017 , H05K3/0014 , H05K3/045 , H05K3/06 , H05K3/107 , H05K3/20 , H05K3/205 , H05K3/426 , H05K3/4614 , H05K3/465 , H05K3/4658 , H05K2201/0361 , H05K2201/0376 , H05K2201/09036 , H05K2201/09563 , H05K2203/0278 , H05K2203/0384 , H05K2203/0582 , H05K2203/1152 , H05K2203/1189 , H05K2203/308 , Y10T29/49126 , Y10T29/49155 , Y10T29/49156 , Y10T29/49165
Abstract: A method of fabricating a printed circuit board is disclosed. A method of fabricating a printed circuit board that includes: stacking an insulation layer on at least one surface of a core layer, on which an inner circuit is formed, and forming an outer circuit pattern; burying the outer circuit pattern in the insulation layer; removing the outer circuit pattern to form minute grooves and curing the insulation layer; and forming an outer circuit by filling metal in the minute grooves, makes it possible to readily form high-resolution fine-line circuits, as well as to reduce fabrication costs and increase productivity.
Abstract translation: 公开了一种制造印刷电路板的方法。 一种制造印刷电路板的方法，包括：在形成有内部电路的芯层的至少一个表面上堆叠绝缘层，并形成外部电路图案; 将外部电路图案埋在绝缘层中; 去除外部电路图案以形成微小凹槽并固化绝缘层; 通过在金属槽中填充金属而形成外部电路，可以容易地形成高分辨率的细线电路，并且能够降低制造成本并提高生产率。
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公开(公告)号：US20110079421A1
公开(公告)日：2011-04-07
申请号：US12634520
申请日：2009-12-09
Applicant: Young Gwan KO , Ryoichi Watanabe , Sang Soo Lee , Se Won Park
Inventor： Young Gwan KO , Ryoichi Watanabe , Sang Soo Lee , Se Won Park
CPC classification number: H05K3/465 , H05K3/045 , H05K3/06 , H05K3/064 , H05K3/4602 , H05K3/4644 , H05K2201/0352 , H05K2201/09536 , H05K2203/0353
Abstract: Disclosed herein is a printed circuit board, including: a base substrate; insulation layers which are formed on both sides of the base substrate and in which trenches are formed; and circuit layers including circuit patterns and vias formed in the trenches using a plating process. The printed circuit board is advantageous in that trenches are formed in both sides of a base substrate, so that a fine circuit pattern can be simultaneously formed on both sides thereof, thereby simplifying the manufacturing process thereof.
Abstract translation: 本文公开了一种印刷电路板，包括：基底; 绝缘层，其形成在基底基板的两侧，并且形成沟槽; 以及电路层，其包括使用电镀工艺在沟槽中形成的电路图案和通孔。 印刷电路板的优点在于，在基底基板的两侧形成沟槽，从而可以在其两侧同时形成精细电路图案，从而简化了其制造工艺。
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公开(公告)号：US20100020723A1
公开(公告)日：2010-01-28
申请号：US12521948
申请日：2008-04-22
Applicant: Shogo Tatsumi , Ryoichi Watanabe
Inventor： Shogo Tatsumi , Ryoichi Watanabe
IPC: H04L12/28 , G06F15/177
CPC classification number: H04L12/4625 , B60L15/42 , B60L2200/26 , B61L15/0036 , B61L25/028 , Y02T90/16
Abstract: A train car-to-car communication device includes: a terminal; an intra-composition transmission line connected to the terminal within the same composition for transmitting information; a composition-to-composition communication relay unit connected to the intra-composition transmission line for receiving first information from the terminal within the composition and transmitting the first information to an adjacent composition, and receiving second information from the adjacent composition and transmitting the second information to the terminal within the composition of interest; and a composition-to-composition transmission line for connecting the composition-to-composition communication relay units of the adjacent compositions and transmitting the information, and the composition-to-composition communication relay unit determines a difference between composition directions of the composition as a transmission source of the received information and the composition to which the composition-to-composition communication relay unit of interest belongs, and rewrites to invert direction-dependent information contained in the received information if the composition directions are different.
Abstract translation: 火车车对车通信装置包括：终端; 连接到用于发送信息的相同组合内的终端的组内传输线; 连接到组合式传输线的组合到通信中继单元，用于从组合中的终端接收第一信息，并将第一信息发送到相邻组合，以及从相邻组合接收第二信息并发送第二信息 到兴趣组合中的终端; 以及用于连接相邻组合物的组合通信中继单元并发送信息的组合传输线，并且组合到通信中继单元确定组合物的组成方向之间的差异为 接收到的信息的发送源和感兴趣的构图通信中继单元所属的构图，并且如果组合方向不同，则重写以反转包含在所接收的信息中的方向依赖信息。
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Patent Agency Ranking
公开(公告)号：US20090053897A1
公开(公告)日：2009-02-26
申请号：US12078945
申请日：2008-04-08
Applicant: Ryoichi Watanabe
Inventor： Ryoichi Watanabe
IPC: H01L21/311
CPC classification number: H05K3/107 , H05K3/0079 , H05K3/108 , H05K2203/0537
Abstract: A method of fabricating a circuit board is disclosed. The method includes: forming a trench in a base and forming an electroless plating layer over a surface of the base and an inner surface of the trench; providing a carrier, on one side of which a plating resist is coated; forming a transcribed part on the surface of the base by stacking the carrier onto the base and transcribing the plating resist onto the surface of the base; forming a pattern in the trench by plating, and removing the transcribed part; and removing portions of the electroless plating layer and the pattern. This method makes it possible to form circuit patterns with a uniform thickness and to provide high workability.
Abstract translation: 公开了一种制造电路板的方法。 该方法包括：在基底中形成沟槽，并在基底的表面和沟槽的内表面上形成化学镀层; 提供载体，其一面涂覆有抗蚀剂; 通过将载体堆叠在基底上并将电镀抗蚀剂转印到基底的表面上，在基底的表面上形成转录部分; 通过电镀在沟槽中形成图案，并去除转录部分; 以及去除化学镀层的部分和图案。 该方法可以形成具有均匀厚度的电路图案并提供高的可加工性。
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公开(公告)号：US20080052905A1
公开(公告)日：2008-03-06
申请号：US11896774
申请日：2007-09-05
Applicant: Ryoichi Watanabe , Byoung-Youl Min , Je-Gwang Yoo , Joon-Sung Kim , Seung-Chul Kim , Myung-San Kang
Inventor： Ryoichi Watanabe , Byoung-Youl Min , Je-Gwang Yoo , Joon-Sung Kim , Seung-Chul Kim , Myung-San Kang
IPC: H05K3/02
CPC classification number: H05K3/0017 , H05K3/0014 , H05K3/045 , H05K3/06 , H05K3/107 , H05K3/20 , H05K3/205 , H05K3/426 , H05K3/4614 , H05K3/465 , H05K3/4658 , H05K2201/0361 , H05K2201/0376 , H05K2201/09036 , H05K2201/09563 , H05K2203/0278 , H05K2203/0384 , H05K2203/0582 , H05K2203/1152 , H05K2203/1189 , H05K2203/308 , Y10T29/49126 , Y10T29/49155 , Y10T29/49156 , Y10T29/49165
Abstract: A method of fabricating a printed circuit board is disclosed. A method of fabricating a printed circuit board that includes: stacking an insulation layer on at least one surface of a core layer, on which an inner circuit is formed, and forming an outer circuit pattern; burying the outer circuit pattern in the insulation layer; removing the outer circuit pattern to form minute grooves and curing the insulation layer; and forming an outer circuit by filling metal in the minute grooves, makes it possible to readily form high-resolution fine-line circuits, as well as to reduce fabrication costs and increase productivity.
Abstract translation: 公开了一种制造印刷电路板的方法。 一种制造印刷电路板的方法，包括：在形成有内部电路的芯层的至少一个表面上堆叠绝缘层，并形成外部电路图案; 将外部电路图案埋在绝缘层中; 去除外部电路图案以形成微小凹槽并固化绝缘层; 通过在金属槽中填充金属而形成外部电路，能够容易地形成高分辨率的细线电路，并且能够降低制造成本并提高生产率。
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公开(公告)号：US20060016553A1
公开(公告)日：2006-01-26
申请号：US11146779
申请日：2005-06-06
Applicant: Ryoichi Watanabe
Inventor： Ryoichi Watanabe
IPC: B32B37/00
CPC classification number: H05K3/205 , H05K2203/0156 , H05K2203/016 , Y10T29/49117 , Y10T29/49126 , Y10T29/49128 , Y10T156/1064 , Y10T156/1082
Abstract: A method of fabricating a high density printed circuit board by applying a strippable adhesive layer on a reinforced substrate (rigid substrate or carrier film) used as a base substrate, forming a metal foil on the adhesive layer by means of plating, lamination or sputtering, and forming a high density circuit on the metal foil serving as a seed layer by means of pattern plating. Specifically, the method of the current invention includes the steps of attaching adhesive means to one surface of a reinforced substrate (rigid substrate or carrier film), forming a seed layer on the adhesive means and forming a circuit pattern on the seed layer, laminating an insulating layer on the circuit pattern and removing the reinforced substrate (rigid substrate or carrier film), and removing the seed layer.
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公开(公告)号：US06933995B2
公开(公告)日：2005-08-23
申请号：US10622702
申请日：2003-07-21
Applicant: Sadayasu Fujibayashi , Atsuko Oono , Ryoichi Watanabe , Yoshitaka Yamada , Hirokazu Morimoto
Inventor： Sadayasu Fujibayashi , Atsuko Oono , Ryoichi Watanabe , Yoshitaka Yamada , Hirokazu Morimoto
IPC: G02F1/1333 , G02F1/13 , G02F1/1335 , G02F1/1343 , G02F1/1368
CPC classification number: G02F1/133555
Abstract: An LCD device includes a transparent glass plate 122 and thin film transistor electrodes 124 formed on the glass plate 122. A photosensitive insulation film 128 is coated on the glass plate 122 and the thin film transistor electrodes 124. The insulation film 128 includes transparent and reflective regions 134 and 133 which are different in thickness. Light shielding films 126 are positioned underneath boundaries of the transparent and reflective regions 134 and 133. Where an optical exposure stage includes different reflection coefficient portions, the light shielding films 126 prevent light reflected by the exposure stage from reaching the insulation film thereby maintaining the accuracy of its patterning.
Abstract translation: LCD装置包括形成在玻璃板122上的透明玻璃板122和薄膜晶体管电极124。 感光绝缘膜128涂覆在玻璃板122和薄膜晶体管电极124上。 绝缘膜128包括厚度不同的透明和反射区域134和133。 遮光膜126位于透明和反射区域134和133的边界的下方。 在光学曝光级包括不同的反射系数部分的情况下，遮光膜126防止由曝光台反射的光到达绝缘膜，从而保持其图案化的精度。
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公开(公告)号：US06873174B2
公开(公告)日：2005-03-29
申请号：US09753607
申请日：2001-01-04
Applicant: Ikuo Matsunaga , Ryoichi Watanabe , Masahiro Seiki
Inventor： Ikuo Matsunaga , Ryoichi Watanabe , Masahiro Seiki
CPC classification number: G09G3/006 , G09G3/3233 , G09G3/3648 , G09G2300/0408 , G09G2300/0417 , G09G2300/0809 , G09G2300/0842
Abstract: A first signal line and a second signal line are paired, and in one signal line selection period, CPU of the inspection circuit controls a write circuit and writes analog signals into the first signal line selected by means of a switch of the selection circuit. In the next signal line selection period, CPU controls a read circuit and reads output signals from the second signal line selected by means of the switch. CPU detects a short circuit between the paired signal lines based upon the output signals from the second signal line.
Abstract translation: 第一信号线和第二信号线成对，并且在一个信号线选择周期中，检查电路的CPU控制写入电路，并且将模拟信号写入通过选择电路的开关选择的第一信号线。 在下一个信号线选择期间，CPU控制一个读取电路，并从通过开关选择的第二个信号线读取输出信号。 CPU根据来自第二信号线的输出信号检测成对信号线之间的短路。
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