公开(公告)号：US20240429287A1

公开(公告)日：2024-12-26

申请号：US18825421

申请日：2024-09-05

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Yasuharu HOSAKA ,  Yukinori SHIMA ,  Junichi KOEZUKA ,  Kenichi OKAZAKI

IPC: H01L29/24 ,  H01L29/06 ,  H01L29/10 ,  H01L29/423 ,  H01L29/49 ,  H01L29/786

Abstract: A novel material is provided. A composite oxide semiconductor includes a first region and a second region. The first region contains indium. The second region contains an element M (the element M is one or more of Ga, Al, Hf, Y, and Sn). The first region and the second region are arranged in a mosaic pattern. The composite oxide semiconductor further includes a third region. The element M is gallium. The first region contains indium oxide or indium zinc oxide. The second region contains gallium oxide or gallium zinc oxide. The third region contains zinc oxide.

公开(公告)号：US20240420967A1

公开(公告)日：2024-12-19

申请号：US18761378

申请日：2024-07-02

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Junichi KOEZUKA

IPC: H01L21/385 ,  G02F1/1343 ,  G02F1/1368 ,  H01L27/12 ,  H01L29/417 ,  H01L29/49 ,  H01L29/51 ,  H01L29/66 ,  H01L29/786

Abstract: In a transistor including an oxide semiconductor layer, an oxide insulating layer is formed so as to be in contact with the oxide semiconductor layer. Then, oxygen is introduced (added) to the oxide semiconductor layer through the oxide insulating layer, and heat treatment is performed. Through these steps of oxygen introduction and heat treatment, impurities such as hydrogen, moisture, a hydroxyl group, or hydride are intentionally removed from the oxide semiconductor layer, so that the oxide semiconductor layer is highly purified.

公开(公告)号：US20240420616A1

公开(公告)日：2024-12-19

申请号：US18706408

申请日：2022-11-07

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Koji KUSUNOKI ,  Daisuke KUBOTA ,  Kensuke YOSHIZUMI

IPC: G09G3/20 ,  G06F3/042 ,  G06F3/044 ,  G06F3/04886 ,  G09G3/3233 ,  H10K59/40

Abstract: A display apparatus or an electronic device with low power consumption is provided. An image processing system capable of reducing the amount of communication data is provided. The image processing system includes a display portion, an input portion, an arithmetic portion, and an image processing portion. The input portion has a function of obtaining positional information on pointing operation by a user. The arithmetic portion has a function of defining a first region and a second region in accordance with the positional information. The image processing portion has a function of executing image processing on a portion of a first image to generate a second image, the portion corresponding to the first region. The display portion has a function of displaying the second image.

公开(公告)号：US20240407192A1

公开(公告)日：2024-12-05

申请号：US18679604

申请日：2024-05-31

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Kaoru HATANO

IPC: H10K50/844 ,  H10K50/84 ,  H10K50/842 ,  H10K59/12 ,  H10K71/00 ,  H10K77/10 ,  H10K102/00

Abstract: An object of one embodiment of the present invention is to provide a more convenient highly reliable light-emitting device which can be used for a variety of applications. Another object of one embodiment of the present invention is to manufacture, without complicating the process, a highly reliable light-emitting device having a shape suitable for its intended purpose. In a manufacturing process of a light-emitting device, a light-emitting panel is manufactured which is at least partly curved by processing the shape to be molded after the manufacture of an electrode layer and/or an element layer, and a protective film covering a surface of the light-emitting panel which is at least partly curved is formed, so that a light-emitting device using the light-emitting panel has a more useful function and higher reliability.

公开(公告)号：US20240402994A1

公开(公告)日：2024-12-05

申请号：US18683540

申请日：2022-09-08

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kiyoshi KATO ,  Tatsuya ONUKI ,  Atsushi MIYAGUCHI ,  Yoshiaki OIKAWA ,  Shunpei YAMAZAKI

IPC: G06F7/523 ,  G06F7/50 ,  G11C11/405 ,  H10B12/00

Abstract: An electronic device with a novel structure is provided. In an electronic device including a semiconductor device, the semiconductor device includes a CPU, an accelerator, and a memory device. The CPU includes a scan flip-flop circuit and a backup circuit electrically connected to the scan flip-flop circuit. The backup circuit includes a first transistor. The accelerator includes an arithmetic circuit and a data retention circuit electrically connected to the arithmetic circuit. The data retention circuit includes a second transistor. The memory device includes a memory cell including a third transistor. The first transistor to the third transistor each include a semiconductor layer containing a metal oxide in a channel formation region.

公开(公告)号：US20240395941A1

公开(公告)日：2024-11-28

申请号：US18792762

申请日：2024-08-02

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Masahiro TAKAHASHI ,  Tatsuya HONDA ,  Takehisa HATANO

IPC: H01L29/786 ,  H01L29/00 ,  H01L29/04 ,  H01L29/12 ,  H01L29/20 ,  H01L29/22 ,  H01L29/24 ,  H01L29/26 ,  H01L29/772

Abstract: Provided is a structure of a transistor, which enables a so-called normally-off switching element, and a manufacturing method thereof. Provided is a structure of a semiconductor device which achieves high-speed response and high-speed operation by improving on characteristics of a transistor, and a manufacturing method thereof. Provided is a highly reliable semiconductor device. In the transistor in which a semiconductor layer, source and drain electrode layers, a gate insulating layer, and a gate electrode layer are stacked in that order. As the semiconductor layer, an oxide semiconductor layer which contains at least four kinds of elements of indium, gallium, zinc, and oxygen, and has a composition ratio (atomic percentage) of indium as twice or more as a composition ratio of gallium and a composition ratio of zinc, is used.

公开(公告)号：US20240379941A1

公开(公告)日：2024-11-14

申请号：US18576873

申请日：2022-06-27

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Jo SAITO ,  Tatsuyoshi TAKAHASHI ,  Kunihiko SUZUKI ,  Shunsuke HOSOUMI ,  Mayumi MIKAMI ,  Kazuki TANEMURA ,  Yuji IWAKI ,  Shunpei YAMAZAKI

IPC: H01M4/36 ,  C01G51/00 ,  H01M4/02 ,  H01M4/1315 ,  H01M4/525 ,  H01M10/0525

Abstract: A positive electrode active material that is unlikely to generate defects even when charging and discharging at a high voltage and/or at a high temperature is provided. A positive electrode active material in which crystal structures are unlikely to collapse even when charging and discharging are repeated is also provided. The positive electrode active material contains lithium, cobalt, oxygen, and an additive element. The positive electrode active material includes a surface portion, an inner portion. The positive electrode active material contains the additive element in the surface portion. The surface portion is a region extending from a surface of the positive electrode active material to a depth of 10 nm or less toward the inner portion, and the surface portion and the inner portion are topotaxy. A degree of diffusion of the additive element vary between crystal planes of the surface portion, and the additive element is at least one or two or more selected from nickel, aluminum, and magnesium.

公开(公告)号：US20240332262A1

公开(公告)日：2024-10-03

申请号：US18740603

申请日：2024-06-12

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Tatsuya ONUKI ,  Takanori MATSUZAKI ,  Yuki OKAMOTO ,  Shunpei YAMAZAKI

IPC: H01L25/065 ,  G11C5/06 ,  H01L23/00 ,  H01L29/786 ,  H10B12/00

CPC classification number: H01L25/0657 ,  G11C5/063 ,  H01L29/78693 ,  H10B12/315 ,  H10B12/50 ,  H01L24/16 ,  H01L25/0655 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/1431 ,  H01L2924/1436

Abstract: A semiconductor device with a novel structure is provided. The semiconductor device includes a silicon substrate including a first circuit, a first element layer including a second circuit, and a second element layer including a third circuit. The first circuit includes a first transistor. The second circuit includes a second transistor. The third circuit includes a memory cell. The memory cell includes a third transistor and a capacitor. The first element layer and the second element layer constitute a stacked block stacked and provided in a direction perpendicular or substantially perpendicular to a surface of the silicon substrate. A plurality of stacked blocks are stacked and provided in the direction perpendicular or substantially perpendicular to the surface of the silicon substrate. Each of the plurality of stacked blocks includes a first wiring provided in the direction perpendicular or substantially perpendicular to the surface of the silicon substrate. The plurality of stacked blocks are electrically connected to each other through the wiring.

公开(公告)号：US20240310938A1

公开(公告)日：2024-09-19

申请号：US18673733

申请日：2024-05-24

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Hajime KIMURA ,  Shunpei YAMAZAKI

IPC: G06F3/041 ,  G02F1/1333 ,  G02F1/1335 ,  G02F1/1343 ,  G02F1/1368 ,  G06F3/044

CPC classification number: G06F3/0412 ,  G02F1/13338 ,  G02F1/134363 ,  G02F1/1368 ,  G06F3/0445 ,  G06F3/0446 ,  G02F1/133553 ,  G02F2201/44 ,  G06F2203/04108

Abstract: An input/output device includes a first sensor electrode and a second sensor electrode. In addition, the input/output device includes a first electrode and a second electrode which are electrodes for a display element, and a substrate sandwiched between the first sensor electrode and the second sensor electrode. The second sensor electrode is formed concurrently with the first electrode using the same material. The input/output device sensors a change in capacitance of a capacitor formed between the first sensor electrode and the second sensor electrode. Furthermore, a third sensor electrode to which a floating potential is applied may be provided to overlap with the first electrode. In the input/output device, either a liquid crystal element or a light-emitting element may be used, or both the liquid crystal element and the light-emitting element may be used.

公开(公告)号：US20240304611A1

公开(公告)日：2024-09-12

申请号：US18440172

申请日：2024-02-13

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei YAMAZAKI ,  Koji KUSUNOKI ,  Shingo EGUCHI ,  Takayuki IKEDA

IPC: H01L25/18 ,  G06F3/044 ,  H01L23/00 ,  H01L25/00 ,  H01L25/065 ,  H01L25/16 ,  H01L27/12 ,  H01L27/15 ,  H01L33/00

CPC classification number: H01L25/18 ,  G06F3/044 ,  H01L24/94 ,  H01L25/0657 ,  H01L25/167 ,  H01L25/50 ,  H01L33/0093 ,  G06F2203/04103 ,  H01L24/16 ,  H01L27/1225 ,  H01L27/156 ,  H01L2224/16145 ,  H01L2225/06513 ,  H01L2924/12041

Abstract: A display device with high resolution is provided. A display device with high display quality is provided. The display device includes a substrate, an insulating layer, a plurality of transistors, and a plurality of light-emitting diodes. The plurality of light-emitting diodes are provided in a matrix over the substrate. Each of the plurality of transistors is electrically connected to at least one of the plurality of light-emitting diodes. The plurality of light-emitting diodes are positioned closer to the substrate than the plurality of transistors are. The plurality of light-emitting diodes emit light toward the substrate. Each of the plurality of transistors includes a metal oxide layer and a gate electrode. The metal oxide layer includes a channel formation region. The top surface of the gate electrode is substantially level with the top surface of the insulating layer.