Semiconductor package having through electrodes that reduce leakage current and method for manufacturing the same
    32.
    发明授权
    Semiconductor package having through electrodes that reduce leakage current and method for manufacturing the same 有权
    具有减少漏电流的通电极的半导体封装及其制造方法

    公开(公告)号:US08609535B2

    公开(公告)日:2013-12-17

    申请号:US13286376

    申请日:2011-11-01

    IPC分类号: H01L21/283

    摘要: A stacked semiconductor package having through electrodes that exhibit a reduced leakage current and a method of making the same are presented. The stacked semiconductor package includes a semiconductor chip, through-holes, and a current leakage prevention layer. The semiconductor chip has opposing first and second surfaces. The through-holes pass entirely through the semiconductor chip and are exposed at the first and second surfaces. A polarized part is formed on at least one of the first and second surfaces of the semiconductor chip. The through-electrodes are disposed within the through-holes. The current leakage prevention layer covers the polarized part and exposes ends of the through-electrodes.

    摘要翻译: 本发明提供一种具有通过电极显示泄漏电流减小的叠层半导体封装及其制造方法。 叠层半导体封装包括半导体芯片,通孔和防止漏电流层。 半导体芯片具有相对的第一和第二表面。 通孔完全穿过半导体芯片,并在第一和第二表面露出。 偏振部分形成在半导体芯片的第一和第二表面中的至少一个上。 通孔设置在通孔内。 电流防漏层覆盖极化部分并暴露通孔的端部。

    Semiconductor package
    36.
    发明授权
    Semiconductor package 有权
    半导体封装

    公开(公告)号:US07968918B2

    公开(公告)日:2011-06-28

    申请号:US12493290

    申请日:2009-06-29

    申请人: Sung Min Kim

    发明人: Sung Min Kim

    摘要: A semiconductor package includes a semiconductor chip having two or more regions that partially overlap so as to define an overlapping region. Through-holes are defined through the two or more partially overlapping regions. One or more first electrodes are disposed on inner surfaces of the semiconductor chip within the through-holes. One or more second electrodes are disposed so as to be insulated from the first electrodes. The one or more second electrodes are at least partially disposed in the overlapping region. Insulation members are disposed in the through-holes.

    摘要翻译: 半导体封装包括具有部分重叠以限定重叠区域的两个或更多个区域的半导体芯片。 通过两个或更多个部分重叠的区域限定通孔。 一个或多个第一电极设置在通孔内的半导体芯片的内表面上。 一个或多个第二电极设置成与第一电极绝缘。 一个或多个第二电极至少部分地设置在重叠区域中。 绝缘构件设置在通孔中。