公开(公告)号：US08569495B2

公开(公告)日：2013-10-29

申请号：US12808897

申请日：2008-12-16

申请人： Christophe Pierre Alain Chassaing ,  Jörg Schröder ,  Thomas Simon Ilg ,  Manfred Uphoff ,  Thorsten Meyer

发明人： Christophe Pierre Alain Chassaing ,  Jörg Schröder ,  Thomas Simon Ilg ,  Manfred Uphoff ,  Thorsten Meyer

IPC分类号： C07D295/00 ,  A61K31/497 ,  A61K31/4965

CPC分类号： C07D211/60 ,  C07D211/26 ,  C07D295/108 ,  C07D487/08

摘要： This invention is directed to compounds and salts that are generally useful as anthelmintic agents or as intermediates in processes for making anthelmintic agents. This invention also is directed to processes for making the compounds and salts, pharmaceutical compositions and kits comprising the compounds and salts, uses of the compounds and salts to make medicaments, and treatments comprising the administration of the compounds and salts to animals in need of the treatments.

公开(公告)号：US08502307B2

公开(公告)日：2013-08-06

申请号：US12953682

申请日：2010-11-24

申请人： Christoph Kadow ,  Thorsten Meyer

发明人： Christoph Kadow ,  Thorsten Meyer

IPC分类号： H01L29/66

CPC分类号： H01L27/088 ,  H01L2924/0002 ,  H01L2924/00

摘要： An integrated circuit includes a semiconductor carrier including a first side and a second side opposite the first side. An FET is in a first area of the semiconductor carrier, and has a drain electrically coupled to a drain contact area at the first side and a source electrically coupled to a source contact area at the second side. First circuit elements are in a second area of the semiconductor carrier. The second area is electrically insulated from the semiconductor carrier surrounding the second area via a trench insulation extending through the semiconductor carrier from the first side to the second side. An interconnection level electrically interconnects the first circuit elements at the second side, and is electrically insulated from the source contact area in the entire second area via an insulating layer at the second side. A conductive pathway extends through the semiconductor carrier from the first side to the second side, and is electrically insulated from the semiconductor carrier surrounding the conductive pathway. At least one of the first circuit elements is electrically coupled to a contact area at the first side via the conductive pathway.

摘要翻译： 集成电路包括半导体载体，其包括第一侧和与第一侧相对的第二侧。 FET位于半导体载体的第一区域中，并且具有电耦合到第一侧的漏极接触区域的漏极和与第二侧的源极接触区域电耦合的源极。 第一电路元件位于半导体载体的第二区域中。 第二区域通过从第一侧延伸穿过半导体载体的沟槽绝缘体与第二区域周围的半导体载体电绝缘。 互连电平在第二侧电连接第一电路元件，并且在第二侧通过绝缘层与整个第二区域中的源极接触区域电绝缘。 导电路径从第一侧延伸穿过半导体载体到第二侧，并且与围绕导电路径的半导体载体电绝缘。 第一电路元件中的至少一个经由导电路径电耦合到第一侧的接触区域。

公开(公告)号：US08431988B2

公开(公告)日：2013-04-30

申请号：US11262483

申请日：2005-10-28

申请人： Franz Hirler ,  Uwe Wahl ,  Thorsten Meyer ,  Michael Rüb ,  Armin Willmeroth ,  Markus Schmitt ,  Carolin Tolksdorf ,  Carsten Schäffer

发明人： Franz Hirler ,  Uwe Wahl ,  Thorsten Meyer ,  Michael Rüb ,  Armin Willmeroth ,  Markus Schmitt ,  Carolin Tolksdorf ,  Carsten Schäffer

IPC分类号： H01L29/66

CPC分类号： H01L29/66689 ,  H01L21/26586 ,  H01L29/0696 ,  H01L29/1045 ,  H01L29/1095 ,  H01L29/41758 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/66666 ,  H01L29/66704 ,  H01L29/78 ,  H01L29/7825

摘要： A lateral trench transistor has a semiconductor body having a source region, a source contact, a body region, a drain region, and a gate trench, in which a gate electrode which is isolated from the semiconductor body is embedded. A heavily doped semiconductor region is provided within the body region or adjacent to it, and is electrically connected to the source contact, and whose dopant type corresponds to that of the body region.

摘要翻译： 横向沟槽晶体管具有半导体本体，其具有嵌入与半导体本体隔离的栅电极的源极区，源极接触，体区，漏极区和栅极沟槽。 重掺杂半导体区域设置在体区内或与其相邻，并且与源极接触电连接，并且其掺杂剂类型对应于身体区域。

公开(公告)号：US08415803B2

公开(公告)日：2013-04-09

申请号：US12871939

申请日：2010-08-31

申请人： Thorsten Meyer ,  Gottfried Beer ,  Christian Geissler ,  Thomas Ort ,  Klaus Pressel ,  Bernd Waidhas ,  Andreas Wolter

发明人： Thorsten Meyer ,  Gottfried Beer ,  Christian Geissler ,  Thomas Ort ,  Klaus Pressel ,  Bernd Waidhas ,  Andreas Wolter

IPC分类号： H01L23/48 ,  H01L21/768

摘要： A method and a system for routing electrical connections are disclosed. A semiconductor device includes a first semiconductor chip and a routing plane having a plurality of routing lines. A first connecting line is electrically coupled to the first semiconductor chip and one of the plurality of routing lines and a second connecting line is electrically coupled to the one of the plurality of routing lines and to one of a second semiconductor chip or a first external contact element.

公开(公告)号：US08319282B2

公开(公告)日：2012-11-27

申请号：US12833202

申请日：2010-07-09

申请人： Christoph Kadow ,  Thorsten Meyer ,  Norbert Krischke

发明人： Christoph Kadow ,  Thorsten Meyer ,  Norbert Krischke

IPC分类号： H01L27/06

CPC分类号： H01L29/7813 ,  H01L27/0623 ,  H01L29/0696 ,  H01L29/402 ,  H01L29/407 ,  H01L29/41708 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/66666 ,  H01L29/7302 ,  H01L29/732 ,  H01L29/7825 ,  H01L29/7828

摘要： A bipolar transistor structure includes an epitaxial layer on a semiconductor substrate, a bipolar transistor device formed in the epitaxial layer and a trench structure formed in the epitaxial layer adjacent at least two opposing lateral sides of the bipolar transistor device. The trench structure includes a field plate spaced apart from the epitaxial layer by an insulating material. The bipolar transistor structure further includes a base contact connected to a base of the bipolar transistor device, an emitter contact connected to an emitter of the bipolar transistor device and isolated from the base contact and an electrical connection between the emitter contact and the field plate.

摘要翻译： 双极晶体管结构包括在半导体衬底上的外延层，形成在外延层中的双极晶体管器件和形成在外延层中的与双极晶体管器件的至少两个相对侧面相邻的沟槽结构。 沟槽结构包括通过绝缘材料与外延层隔开的场板。 双极晶体管结构还包括连接到双极晶体管器件的基极的基极触点，连接到双极晶体管器件的发射极并与基极触点隔离的发射极触点和发射极触点与场板之间的电连接。

公开(公告)号：US08309454B2

公开(公告)日：2012-11-13

申请号：US11746936

申请日：2007-05-10

申请人： Markus Brunnbauer ,  Thorsten Meyer ,  Stephan Bradl ,  Ralf Plieninger ,  Jens Pohl ,  Klaus Pressel ,  Recai Sezi

发明人： Markus Brunnbauer ,  Thorsten Meyer ,  Stephan Bradl ,  Ralf Plieninger ,  Jens Pohl ,  Klaus Pressel ,  Recai Sezi

IPC分类号： H01L21/4763

CPC分类号： H01L25/50 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/48 ,  H01L23/5389 ,  H01L23/552 ,  H01L23/60 ,  H01L24/19 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2224/97 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01033 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/1617 ,  H01L2924/181 ,  H01L2924/19043 ,  H01L2924/3025 ,  H01L2224/82 ,  H01L2924/00

摘要： A workpiece has at least two semiconductor chips, each semiconductor chip having a first main surface, which is at least partially exposed, and a second main surface. The workpiece also comprises an electrically conducting layer, arranged on the at least two semiconductor chips, the electrically conducting layer being arranged at least on regions of the second main surface, and a molding compound, arranged on the electrically conducting layer.

摘要翻译： 工件具有至少两个半导体芯片，每个半导体芯片具有至少部分暴露的第一主表面和第二主表面。 所述工件还包括布置在所述至少两个半导体芯片上的导电层，所述导电层至少布置在所述第二主表面的区域上，所述模制化合物布置在所述导电层上。

公开(公告)号：US20120261841A1

公开(公告)日：2012-10-18

申请号：US13533566

申请日：2012-06-26

申请人： Thorsten Meyer ,  Markus Brunnbauer

发明人： Thorsten Meyer ,  Markus Brunnbauer

IPC分类号： H01L23/28 ,  B29C33/12 ,  H01L21/56

CPC分类号： H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/97 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01068 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2224/82 ,  H01L2924/00

摘要： A panel with a reconfigured wafer including semiconductor chips arranged in rows and columns on semiconductor device positions includes: at least one semiconductor chip having a front, a rear and edge sides provided per semiconductor device position. The reconfigured wafer includes: a front side that forms a coplanar area with the front sides of the at least one semiconductor chip and a plastic housing composition embedding the edge sides and the rear side of the at least one semiconductor chip. The reconfigured wafer includes, on a rear side of the wafer, structures configured to stabilize the panel. The structures are composed of the plastic housing composition and are formed as thickenings of the reconfigured wafer.

摘要翻译： 具有重新配置的晶片的面板包括在半导体器件位置上以行和列布置的半导体芯片，包括：至少一个半导体芯片，每个半导体器件位置具有前部，后部和边缘侧。 重新配置的晶片包括：前侧，其与至少一个半导体芯片的前侧形成共面区域，以及塑料外壳组合物，其嵌入至少一个半导体芯片的边缘侧和后侧。 重新配置的晶片在晶片的后侧包括被配置为稳定面板的结构。 该结构由塑料外壳组合物组成，并且形成为重新配置的晶片的增厚。

公开(公告)号：US20120235298A1

公开(公告)日：2012-09-20

申请号：US13482431

申请日：2012-05-29

申请人： Markus Brunnbauer ,  Harry Hedler ,  Thorsten Meyer

发明人： Markus Brunnbauer ,  Harry Hedler ,  Thorsten Meyer

IPC分类号： H01L23/48

CPC分类号： H01L25/105 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L24/19 ,  H01L24/48 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/04105 ,  H01L2224/24011 ,  H01L2224/24227 ,  H01L2224/48235 ,  H01L2224/97 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01068 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1305 ,  H01L2924/14 ,  H01L2924/1532 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： An electronic device or devices and method for producing a device is disclosed. One embodiment provides an integrated component, a first package body and a contact device. The contact device penetrates the package body.

摘要翻译： 公开了一种用于制造装置的电子装置或装置及方法。 一个实施例提供集成部件，第一包装体和接触装置。 接触装置穿透包装体。

公开(公告)号：US08217504B2

公开(公告)日：2012-07-10

申请号：US12047016

申请日：2008-03-12

申请人： Thorsten Meyer ,  Markus Brunnbauer

发明人： Thorsten Meyer ,  Markus Brunnbauer

IPC分类号： H01L23/31

CPC分类号： H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/97 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01068 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2224/82 ,  H01L2924/00

摘要： A panel with a reconfigured wafer including semiconductor chips arranged in rows and columns on semiconductor device positions includes: at least one semiconductor chip having a front, a rear and edge sides provided per semiconductor device position. The reconfigured wafer includes: a front side that forms a coplanar area with the front sides of the at least one semiconductor chip and a plastic housing composition embedding the edge sides and the rear side of the at least one semiconductor chip. The reconfigured wafer includes, on a rear side of the wafer, structures configured to stabilize the panel. The structures are composed of the plastic housing composition and are formed as thickenings of the reconfigured wafer.

摘要翻译： 具有重新配置的晶片的面板包括在半导体器件位置上以行和列布置的半导体芯片，包括：至少一个半导体芯片，每个半导体器件位置具有前部，后部和边缘侧。 重新配置的晶片包括：前侧，其与至少一个半导体芯片的前侧形成共面区域，以及塑料外壳组合物，其嵌入至少一个半导体芯片的边缘侧和后侧。 重新配置的晶片在晶片的后侧包括被配置为稳定面板的结构。 该结构由塑料外壳组合物组成，并且形成为重新配置的晶片的增厚。

公开(公告)号：US20120146231A1

公开(公告)日：2012-06-14

申请号：US12967962

申请日：2010-12-14

申请人： Thorsten Meyer ,  Ludwig Heitzer

发明人： Thorsten Meyer ,  Ludwig Heitzer

IPC分类号： H01L23/48 ,  H01L21/44

CPC分类号： H01L24/02 ,  H01L23/3128 ,  H01L24/05 ,  H01L24/13 ,  H01L24/19 ,  H01L24/20 ,  H01L2224/02175 ,  H01L2224/02311 ,  H01L2224/02315 ,  H01L2224/02371 ,  H01L2224/02373 ,  H01L2224/02379 ,  H01L2224/0239 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05008 ,  H01L2224/12105 ,  H01L2224/13024 ,  H01L2224/13111 ,  H01L2924/01029 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/01082 ,  H01L2924/01047 ,  H01L2924/00

摘要： A semiconductor device and a method of making a semiconductor device are disclosed. The semiconductor device comprises a redistribution layer arranged over a chip, the redistribution layer comprising a first redistribution line. The semiconductor further comprises an isolation layer disposed over the redistribution layer, the isolation layer having a first opening forming a first pad area and a first interconnect located in the first opening and in contact with the first redistribution line. The redistribution line in the first pad area is arranged orthogonal to a first direction to a neutral point of the semiconductor device.

摘要翻译： 公开了一种半导体器件和制造半导体器件的方法。 半导体器件包括布置在芯片上的再分配层，再分配层包括第一再分配线。 半导体还包括设置在再分配层上的隔离层，隔离层具有形成第一焊盘区域的第一开口和位于第一开口中并与第一再分配线接触的第一互连。 第一焊盘区域中的再分配线布置成与半导体器件的中性点的第一方向正交。