公开(公告)号：US20090045473A1

公开(公告)日：2009-02-19

申请号：US11999228

申请日：2007-12-04

Applicant: Venkatachalam C. Jaiprakash ,  Jonathan W. Ward ,  Thomas Rueckes ,  Brent M. Segal

Inventor： Venkatachalam C. Jaiprakash ,  Jonathan W. Ward ,  Thomas Rueckes ,  Brent M. Segal

IPC: H01L29/84

CPC classification number: G11C13/025 ,  B81B2203/0338 ,  B81B2203/04 ,  B81C1/00142 ,  B81C2201/0109 ,  B82Y10/00 ,  B82Y30/00 ,  B82Y40/00 ,  C01B32/162 ,  C01B2202/02 ,  C01B2202/22 ,  G11C11/56 ,  G11C23/00 ,  G11C2213/16 ,  G11C2213/77 ,  G11C2213/81 ,  H01H1/0094 ,  H01L21/76838 ,  H01L51/0048 ,  H01L2221/1094 ,  Y10S977/724 ,  Y10S977/734 ,  Y10S977/742

Abstract: New devices having horizontally-disposed nanofabric articles and methods of making same are described. A discrete electro-mechanical device includes a structure having an electrically-conductive trace. A defined patch of nanotube fabric is disposed in spaced relation to the trace; and the defined patch of nanotube fabric is electromechanically deflectable between a first and second state. In the first state, the nanotube article is in spaced relation relative to the trace, and in the second state the nanotube article is in contact with the trace. A low resistance signal path is in electrical communication with the defined patch of nanofabric. Under certain embodiments, the structure includes a defined gap into which the electrically conductive trace is disposed. The defined gap has a defined width, and the defined patch of nanotube fabric spans the gap and has a longitudinal extent that is slightly longer than the defined width of the gap.

公开(公告)号：US07473982B2

公开(公告)日：2009-01-06

申请号：US10918360

申请日：2004-08-16

Applicant: Masakazu Aono ,  Tsuyoshi Hasegawa ,  Kazuya Terabe ,  Tomonobu Nakayama

Inventor： Masakazu Aono ,  Tsuyoshi Hasegawa ,  Kazuya Terabe ,  Tomonobu Nakayama

IPC: H01L27/24

CPC classification number: G11C13/025 ,  B82Y10/00 ,  G11C11/5614 ,  G11C13/0004 ,  G11C13/0009 ,  G11C13/0011 ,  G11C2213/77 ,  G11C2213/81 ,  H01L27/2463 ,  H01L29/242 ,  H01L29/26 ,  H01L29/45 ,  H01L45/085 ,  H01L45/1266 ,  H01L45/142 ,  H01L45/143 ,  H01L45/146 ,  H01L45/1633 ,  H03K17/545 ,  H03K19/02

Abstract: A NOT circuit realized using an atomic switch serving as a two terminal device and including a first electrode made of a compound conductive material having ionic conductivity and electronic conductivity and a second electrode made of a conductive substance. Ag2S, Ag2Se, Cu2S, or Cu2Se is preferably used as the compound conductive material.

Abstract translation: 使用用作双端子器件的原子开关实现的NOT电路，并且包括由具有离子导电性和电子导电性的复合导电材料制成的第一电极和由导电物质制成的第二电极。 Ag2S，Ag2Se，Cu2S或Cu2Se优选用作复合导电材料。

公开(公告)号：US07453789B2

公开(公告)日：2008-11-18

申请号：US10576096

申请日：2004-10-26

Applicant: Serge Gidon ,  Yves Samson

Inventor： Serge Gidon ,  Yves Samson

IPC: G11B9/00

CPC classification number: G11B9/14 ,  G01Q70/12 ,  G11B9/1409 ,  G11B9/1418 ,  G11B9/1472 ,  G11C2213/81

Abstract: The invention relates to a data-recording device comprising conductive microtips and to the production method thereof. According to the invention, the microtip comprises one end which is intended to be brought into electrical contact with a recording medium. Moreover, the microtip comprises a longitudinal conducting core having an essentially constant cross-section. In addition, the microtip is surrounded by a sheath of non-conducting material, such that the free ends of the core and the sheath are level at the end of the microtip. The cross-section of the sheath can diminish towards the end of the microtip, e.g. such as to form a truncated-cone-shaped part. The core can comprise a carbon nanotube. Furthermore, a multitude of microtips can be disposed in the form of a network, the ends thereof generating an essentially-flat common surface. The inventive method comprises an abrasion step.

Abstract translation: 本发明涉及包含导电微尖头的数据记录装置及其制造方法。 根据本发明，微尖头包括旨在与记录介质电接触的一端。 此外，微尖端包括具有基本恒定横截面的纵向导电芯。 此外，微尖端由非导电材料的护套包围，使得芯和护套的自由端在微尖端的末端处水平。 鞘的横截面可以朝向微尖端的端部减小，例如， 例如形成截锥形部分。 核心可以包括碳纳米管。 此外，可以以网络的形式布置多个微尖端，其端部产生基本平坦的公共表面。 本发明的方法包括磨损步骤。

公开(公告)号：US20080237886A1

公开(公告)日：2008-10-02

申请号：US11729228

申请日：2007-03-28

Applicant: Wei Wu ,  R. Stanley Williams ,  Warren Robinett ,  Gregory S. Snider ,  Zhaoning Yu ,  Shih-Yuan Wang ,  Duncan Stewart

Inventor： Wei Wu ,  R. Stanley Williams ,  Warren Robinett ,  Gregory S. Snider ,  Zhaoning Yu ,  Shih-Yuan Wang ,  Duncan Stewart

IPC: H01L23/48

CPC classification number: H01L27/101 ,  B82Y10/00 ,  G11C13/00 ,  G11C13/0023 ,  G11C13/0033 ,  G11C2213/71 ,  G11C2213/79 ,  G11C2213/81 ,  H01L2924/0002 ,  Y10S977/762 ,  H01L2924/00

Abstract: Various embodiments of the present invention are directed to three-dimensional crossbar arrays. In one aspect of the present invention, a three-dimensional crossbar array includes a plurality of crossbar arrays, a first demultiplexer, a second demultiplexer, and a third demultiplexer. Each crossbar array includes a first layer of nanowires, a second layer of nanowires overlaying the first layer of nanowires, and a third layer of nanowires overlaying the second layer of nanowires. The first demultiplexer is configured to address nanowires in the first layer of nanowires of each crossbar array, the second demultiplexer is configured to address nanowires in the second layer of nanowires of each crossbar array, and the third demultiplexer is configured to supply a signal to the nanowires in the third layer of nanowires of each crossbar array.

Abstract translation: 本发明的各种实施例涉及三维横杆阵列。 在本发明的一个方面，三维交叉开关阵列包括多个交叉开关阵列，第一解复用器，第二解复用器和第三解复用器。 每个横杆阵列包括第一纳米线层，覆盖第一纳米线层的第二纳米线层和覆盖第二纳米线层的第三层纳米线。 第一解复用器被配置为寻址每个交叉列阵列的纳米线的第一层中的纳米线，第二解复用器被配置为寻址每个交叉列阵列的第二纳米线层中的纳米线，并且第三解复用器被配置为向 纳米线在每个交叉列阵列的第三层纳米线中。

公开(公告)号：US07419624B1

公开(公告)日：2008-09-02

申请号：US11507974

申请日：2006-08-22

Applicant: Richard E. Smalley ,  Daniel T. Colbert ,  Hongjie Dai ,  Jie Liu ,  Andrew G. Rinzler ,  Jason H. Hafner ,  Ken Smith ,  Ting Guo ,  Pavel Nikolaev ,  Andreas Thess

Inventor： Richard E. Smalley ,  Daniel T. Colbert ,  Hongjie Dai ,  Jie Liu ,  Andrew G. Rinzler ,  Jason H. Hafner ,  Ken Smith ,  Ting Guo ,  Pavel Nikolaev ,  Andreas Thess

IPC: B82B1/00

CPC classification number: G11C13/025 ,  B01J19/081 ,  B01J19/087 ,  B01J19/10 ,  B01J19/121 ,  B01J19/126 ,  B01J19/129 ,  B01J21/185 ,  B01J23/74 ,  B01J23/755 ,  B01J23/8913 ,  B01J37/0238 ,  B01J37/349 ,  B01J2219/00078 ,  B01J2219/0892 ,  B82B3/00 ,  C01B32/152 ,  C01B32/162 ,  C01B32/17 ,  C01B2202/02 ,  D01F9/12 ,  D01F9/127 ,  D21H27/00 ,  G11B9/1418 ,  G11B9/1445 ,  G11B9/1472 ,  G11B9/149 ,  G11C13/0014 ,  G11C13/0019 ,  G11C2213/16 ,  G11C2213/71 ,  G11C2213/81 ,  H01G9/2059 ,  H01L31/0352 ,  H01L31/06 ,  H01L31/18 ,  H01M4/133 ,  H01M4/525 ,  H01M4/583 ,  H01M4/587 ,  H01M4/625 ,  H01M10/0525 ,  Y02E10/542 ,  Y02E60/122 ,  Y02P70/521 ,  Y02P70/54 ,  Y10S977/70 ,  Y10S977/742 ,  Y10S977/745 ,  Y10S977/748 ,  Y10S977/75 ,  Y10S977/753 ,  Y10S977/789 ,  Y10S977/842 ,  Y10S977/843 ,  Y10S977/845 ,  Y10S977/847 ,  Y10S977/848 ,  Y10S977/849 ,  Y10S977/882 ,  Y10S977/948 ,  Y10T428/24058 ,  Y10T428/2918 ,  Y10T428/292 ,  Y10T428/30

Abstract: This invention relates generally to a method for producing composites of fullerene nanotubes and compositions thereof. In one embodiment, the present invention involves a method of producing a composite material that includes a matrix and a fullerene nanotube material embedded within said matrix. In another embodiment, a method of producing a composite material containing fullerene nanotube material is disclosed. This method includes the steps of preparing an assembly of a fibrous material; adding the fullerene nanotube material to the fibrous material; and adding a matrix material precursor to the fullerene nanotube material and the fibrous material.

Abstract translation: 本发明一般涉及富勒烯纳米管复合材料的制造方法及其组合物。 在一个实施方案中，本发明涉及一种生产复合材料的方法，所述复合材料包括嵌入所述基质内的基质和富勒烯纳米管材料。 在另一个实施方案中，公开了一种制备含有富勒烯纳米管材料的复合材料的方法。 该方法包括准备纤维材料组件的步骤; 将富勒烯纳米管材料添加到纤维材料中; 并向所述富勒烯纳米管材料和所述纤维材料添加基质材料前体。

公开(公告)号：US20080174024A1

公开(公告)日：2008-07-24

申请号：US11971147

申请日：2008-01-08

Applicant: Danilo Mascolo ,  Gianfranco Cerofolini

Inventor： Danilo Mascolo ,  Gianfranco Cerofolini

IPC: H01L23/52 ,  H01L21/4763

CPC classification number: H01L21/76838 ,  B82B3/00 ,  B82Y10/00 ,  B82Y30/00 ,  B82Y40/00 ,  G11C2213/81 ,  H01L21/76816 ,  H01L2221/1094 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method for realizes electric connections in a semiconductor electronic device between a nanometric circuit architecture and standard electronic components. The method includes: providing a nanometric circuit architecture comprising a succession of conductive nanowires substantially parallel to each other and extended along a direction x; realizing, above the succession, an insulating layer; opening, in the insulating layer, a window of nanometric width b extended along a direction inclined by an angle α with respect to the direction x to substantially cross the whole succession of nanowires, with exposure of a succession of exposed portions of the nanowires, one for each nanowire; realizing, above the insulating layer, a plurality of conductive dies extended along a direction y substantially orthogonal to the direction x and addressed towards the standard electronic components, each of such dies overlapping said window onto a respective exposed portion of a nanowire with obtainment of a plurality of contacts realizing said electric connections.

Abstract translation: 一种用于在纳米电路结构和标准电子部件之间实现半导体电子器件中的电连接的方法。 该方法包括：提供纳米级电路架构，其包括基本上彼此平行并沿着x方向延伸的一系列导电纳米线; 在继承之上实现绝缘层; 在绝缘层中打开沿着相对于方向x倾斜角度α的方向延伸的纳米宽度b的窗口，以基本上穿过整个纳米线序列，暴露出一连串的纳米线的暴露部分，一个 对于每个纳米线; 在绝缘层之上实现沿着基本上正交于方向x的方向y延伸并且朝向标准电子部件寻址的多个导电模具，每个这样的模具将所述窗口重叠到纳米线的相应的暴露部分上，获得一个 多个触点实现所述电连接。

公开(公告)号：US20080062735A1

公开(公告)日：2008-03-13

申请号：US10925863

申请日：2004-08-24

Applicant: Andre DeHon

Inventor： Andre DeHon

IPC: G11C5/06

CPC classification number: H01L27/101 ,  B82Y10/00 ,  G11C13/025 ,  G11C2213/77 ,  G11C2213/81 ,  H01L23/522 ,  H01L29/0665 ,  H01L29/0673 ,  H01L2924/0002 ,  Y10S438/962 ,  Y10S977/762 ,  Y10S977/764 ,  Y10S977/767 ,  Y10S977/943 ,  H01L2924/00

Abstract: Methods for obtaining codes to be implemented in coding nanoscale wires are disclosed. The methods disclosed teach how to code a reduced number of nanoscale wires through the use of rotation group codes. The methods further teach how to generate different code permutations through random misalignment and how to promote uniform code probability selection.

Abstract translation: 公开了用于获得编码纳米尺寸线中的代码的方法。 所公开的方法教导了如何通过使用旋转组代码对减少数量的纳米级线进行编码。 该方法进一步教导了如何通过随机错位生成不同的代码排列以及如何促进均匀代码概率选择。

公开(公告)号：US07340356B2

公开(公告)日：2008-03-04

申请号：US11010597

申请日：2004-12-13

Applicant: Joseph Straznicky

Inventor： Joseph Straznicky

IPC: G01R25/00

CPC classification number: G11C13/0014 ,  B82Y10/00 ,  G11C13/02 ,  G11C2213/77 ,  G11C2213/81

Abstract: Various embodiments of the present invention are directed to methods for determining the resistance state of nanowire-crossbar junctions, and can also be used to determine the resistance state of sub-microscale crossbar junctions. A pair of wires interconnected through the crossbar junction is biased to determine a first signal for the crossbar junction. The pair of wires interconnected through the crossbar junction is then biased again to increase the resistance of the crossbar junction. The pair of wires interconnected through the crossbar junction is then biased again to determine a second signal for the crossbar junction. The first signal is compared to the second signal to determine the resistance state of the crossbar junction.

Abstract translation: 本发明的各种实施方案涉及用于确定纳米线 - 交叉连接点的电阻状态的方法，并且还可以用于确定亚微米交叉点结的电阻状态。 通过交叉连接点互连的一对导线被偏置以确定交叉连接点的第一信号。 然后通过交叉连接点互连的一对电线被再次偏置以增加交叉连接点的电阻。 然后通过交叉连接点互连的一对导线再次被偏置以确定交叉连接点的第二信号。 将第一信号与第二信号进行比较以确定交叉连接点的电阻状态。

公开(公告)号：US07339186B2

公开(公告)日：2008-03-04

申请号：US10902486

申请日：2004-07-29

Applicant: Hannes Mio ,  Franz Kreupl

Inventor： Hannes Mio ,  Franz Kreupl

IPC: H01L29/06 ,  H01L29/861

CPC classification number: H01L29/0665 ,  B82Y10/00 ,  G11C13/025 ,  G11C17/06 ,  G11C2213/81 ,  H01L23/57 ,  H01L27/32 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/068 ,  H01L29/73 ,  H01L29/78 ,  H01L29/861 ,  H01L51/0048 ,  H01L51/0052 ,  H01L51/0504 ,  H01L2924/0002 ,  Y10S257/91 ,  Y10S257/922 ,  H01L2924/00

Abstract: Arrangement of nanowires with PN junctions between bit lines and word lines are arranged as a ROM memory cell array. A number of the nanowires have dielectric regions and are present only as a dummy. The connections between word and bit lines may also exist as transistors which turn on or turn off only when a gate voltage is applied. A number of these transistors are constructed in complementary fashion and/or have insulating regions built in and serve as a dummy.

Abstract translation: 位线和字线之间的PN结的纳米线的布置被布置为ROM存储单元阵列。 许多纳米线具有电介质区域并且仅作为虚拟物存在。 字和位线之间的连接也可以作为仅在施加栅极电压时导通或截止的晶体管存在。 多个这些晶体管以互补的方式构造和/或具有内置并用作虚拟的绝缘区域。

公开(公告)号：US07307345B2

公开(公告)日：2007-12-11

申请号：US11264464

申请日：2005-11-01

Applicant: Wei Wu ,  Philip J. Kuekes ,  R. Stanley Williams

Inventor： Wei Wu ,  Philip J. Kuekes ,  R. Stanley Williams

IPC: H01L23/528

CPC classification number: G11C13/02 ,  B82Y10/00 ,  G11C8/10 ,  G11C11/54 ,  G11C13/0023 ,  G11C2213/77 ,  G11C2213/81 ,  H01L27/10 ,  H01L27/285 ,  Y10S977/762 ,  Y10S977/932

Abstract: Various embodiments of the present invention are directed to crossbar array designs that interfaces wires to address wires, despite misalignments between electrical components and wires. In one embodiment, a nanoscale device may be composed of a first layer of two or more wires and a second layer of two or more address wires that overlays the first layer. The nanoscale device may also include an intermediate layer positioned between the first layer and the second layer. Two or more redundant electrical component patterns may be fabricated within the intermediate layer so that one or more of the electrical component patterns is aligned with the first and second layers.

Abstract translation: 尽管本发明的各种实施例涉及将电线接合到地址线的交叉列阵列设计，尽管电气部件和电线之间未对准。 在一个实施例中，纳米级器件可以由两条或更多条线的第一层和覆盖第一层的两条或更多条地址线的第二层组成。 纳米级器件还可以包括位于第一层和第二层之间的中间层。 可以在中间层内制造两个或更多个冗余电组件图案，使得一个或多个电组件图案与第一层和第二层对准。