公开(公告)号：US07737818B2

公开(公告)日：2010-06-15

申请号：US11891067

申请日：2007-08-08

Applicant: Aleksandra Djordjevic ,  Carl W. Berlin

Inventor： Aleksandra Djordjevic ,  Carl W. Berlin

IPC: H01C1/012

CPC classification number: H05K1/16 ,  H01C7/003 ,  H01C13/02 ,  H01G4/33 ,  H01G4/40 ,  H05K1/092 ,  H05K1/162 ,  H05K1/167 ,  H05K3/1291 ,  H05K2201/0355 ,  H05K2201/1053 ,  H05K2203/1126

Abstract: An embedded resistor and capacitor circuit and fabrication method is provided. The circuit includes a substrate, a conductive foil laminated to the substrate, and a thick film dielectric material disposed on the conductive foil. One or more thick film electrodes are formed on the dielectric material and a thick film resistor is formed at least partially contacting the thick film electrodes. A capacitor is formed by an electrode and the conductive foil. The electrodes serve as terminations for the resistor and capacitor.

Abstract translation: 提供了一种嵌入式电阻和电容电路及其制造方法。 电路包括基板，层叠在基板上的导电箔，以及设置在导电箔上的厚膜电介质材料。 在电介质材料上形成一个或多个厚膜电极，并且形成至少部分地接触厚膜电极的厚膜电阻器。 电极由电极和导电箔形成。 电极用作电阻器和电容器的端子。

公开(公告)号：US20100074298A1

公开(公告)日：2010-03-25

申请号：US12204734

申请日：2008-09-04

Applicant: Johannes F. Nyffenegger

Inventor： Johannes F. Nyffenegger

IPC: G01K7/16 ,  H01C3/04

CPC classification number: G01K7/16 ,  G01K1/18 ,  H01C1/032 ,  H01C7/003

Abstract: A very high speed thin film RTD sandwich is provided that can be used in high speed temperature probes for medical applications and in environments that are corrosive or hostile in a protected configuration, as well as ambient and surface temperature measurements in an unprotected configuration. The high speed is achieved by maximizing the transfer of heat from the outside perimeter of the sandwich to its internal thin film RTD element to the absolute minimum of time. The thin film RTD element is electrically insulated by the extremely thin film layers. The insulating layers and thin film RTD are then embedded in two layers of high purity silver, the element with the maximum conduction coefficient of heat transfer k.

Abstract translation: 提供了一种非常高速的薄膜RTD夹层结构，可用于医疗应用的高速温度探头，以及在受保护结构中具有腐蚀性或敌对性的环境中，以及无保护配置中的环境和表面温度测量。 通过最大化从三明治的外周到其内部薄膜RTD元件的热传递到绝对最小时间来实现高速度。 薄膜RTD元件由极薄膜层电绝缘。 然后将绝缘层和薄膜RTD嵌入两层高纯度银，该元素具有最大的传热系数k。

公开(公告)号：US20090261306A1

公开(公告)日：2009-10-22

申请号：US12105683

申请日：2008-04-18

Applicant: Paul Douglas VerNooy ,  Alfred T. Walker ,  Kenneth Warren Hang

Inventor： Paul Douglas VerNooy ,  Alfred T. Walker ,  Kenneth Warren Hang

IPC: H01C1/00 ,  H01B1/02

CPC classification number: C01G55/001 ,  C01G55/00 ,  C01P2002/54 ,  C01P2002/72 ,  C01P2004/61 ,  C01P2004/62 ,  C03C8/14 ,  C04B41/009 ,  C04B41/5022 ,  C04B41/52 ,  C04B41/86 ,  C04B41/90 ,  C04B2111/00844 ,  H01B1/22 ,  H01C7/003 ,  H01C17/06533 ,  C04B35/10 ,  C04B41/4539 ,  C04B41/4572 ,  C04B41/5027 ,  C04B41/5116

Abstract: A non-lead composition for use as a thick-film resistor paste in electronic applications. The composition comprises particles of Li2RuO3 of diameter between 0.5 and 5 microns and a lead-free frit. The particles have had the lithium at or near primarily the surface of the particle at least partially exchanged for atoms of other metals.

Abstract translation: 用作电子应用中的厚膜电阻膏的非铅组合物。 该组合物包含直径为0.5至5微米的Li2RuO3颗粒和无铅玻璃料。 颗粒已经使锂在或接近主要表面的颗粒至少部分地与其它金属的原子交换。

公开(公告)号：US20090134361A1

公开(公告)日：2009-05-28

申请号：US12067126

申请日：2006-08-28

Applicant: Naohiro Takashima ,  Shoji Hoshitoku ,  Takasi Oobayasi ,  Mituru Harada

Inventor： Naohiro Takashima ,  Shoji Hoshitoku ,  Takasi Oobayasi ,  Mituru Harada

IPC: H01B1/22 ,  H01B1/24 ,  H01B1/20

CPC classification number: H01C1/148 ,  H01C1/142 ,  H01C7/003 ,  H01C17/006 ,  H01C17/283

Abstract: A chip-shaped electronic component comprising a substrate and an end face electrode layer provided on an end face of the substrate, in which the end face electrode layer contains a mixed material including, as a conductive particle, a carbon powder, a whisker-like inorganic filler coated with a conductive film, and a flake-like conductive powder, and an epoxy resin having a weight-average molecular weight between 1,000 and 80,000.

Abstract translation: 一种片状电子元件，其特征在于，具有基板和设置在基板的端面上的端面电极层，其中端面电极层含有作为导电性粒子的碳粉，晶须状的混合材料 涂覆有导电膜的无机填料和薄片状导电粉末以及重均分子量在1,000至80,000之间的环氧树脂。

公开(公告)号：US20090040010A1

公开(公告)日：2009-02-12

申请号：US11891067

申请日：2007-08-08

Applicant: Aleksandra Djordjevic ,  Carl W. Berlin

Inventor： Aleksandra Djordjevic ,  Carl W. Berlin

IPC: H01C1/012

CPC classification number: H05K1/16 ,  H01C7/003 ,  H01C13/02 ,  H01G4/33 ,  H01G4/40 ,  H05K1/092 ,  H05K1/162 ,  H05K1/167 ,  H05K3/1291 ,  H05K2201/0355 ,  H05K2201/1053 ,  H05K2203/1126

Abstract: An embedded resistor and capacitor circuit and fabrication method is provided. The circuit includes a substrate, a conductive foil laminated to the substrate, and a thick film dielectric material disposed on the conductive foil. One or more thick film electrodes are formed on the dielectric material and a thick film resistor is formed at least partially contacting the thick film electrodes. A capacitor is formed by an electrode and the conductive foil. The electrodes serve as terminations for the resistor and capacitor.

Abstract translation: 提供了一种嵌入式电阻和电容电路及其制造方法。 电路包括基板，层叠在基板上的导电箔，以及设置在导电箔上的厚膜电介质材料。 在电介质材料上形成一个或多个厚膜电极，并且形成至少部分地接触厚膜电极的厚膜电阻器。 电极由电极和导电箔形成。 电极用作电阻器和电容器的端子。

公开(公告)号：US20090021342A1

公开(公告)日：2009-01-22

申请号：US11779703

申请日：2007-07-18

Applicant: Roger Brummell ,  Angie Privett

Inventor： Roger Brummell ,  Angie Privett

IPC: H01C7/18

CPC classification number: H01C7/003 ,  H01C1/01 ,  H01C17/065 ,  H05B3/48 ,  Y10T29/49082 ,  Y10T29/49099

Abstract: A resistive device for use in providing a resistive load to a target under the application of power from a power source is provided, the resistive device being adapted for electrical connection to the power source through a pair of terminal wires. The resistive device includes a thick film material, and the thick film material defines at least one layer of tape. The resistive device can be, by way of example, a heater or a load resistor, and can also include a substrate onto which a layer of dielectric tape is disposed, a resistive layer disposed on the layer of dielectric tape, and a protective layer disposed on the resistive layer.

Abstract translation: 提供了一种用于在从电源施加电力的情况下向目标提供电阻性负载的电阻性装置，所述电阻装置适于通过一对端子线与电源电连接。 电阻器件包括厚膜材料，厚膜材料限定至少一层胶带。 电阻器件可以是例如加热器或负载电阻器，并且还可以包括其上布置介质带层的衬底，设置在介质带层上的电阻层和设置在电介质带层上的保护层 在电阻层上。

公开(公告)号：US07378937B2

公开(公告)日：2008-05-27

申请号：US11703979

申请日：2007-02-08

Applicant: Torayuki Tsukada

Inventor： Torayuki Tsukada

IPC: H01C1/012

CPC classification number: H01C1/144 ,  H01C7/003 ,  H01C17/006 ,  H05K3/3442

Abstract: A chip resistor includes a resistor element in the form of a chip, and at least two electrodes formed on the resistor element. The resistor element includes an upper surface, a lower surface, and two end surfaces extending between the upper and the lower surfaces and spaced from each other. The two electrodes are provided on the lower surface of the resistor element. Each of the end surfaces of the resistor element is formed with a conductor film integrally connected to a corresponding one of the electrodes. The conductor film is made of copper, for example, and is higher in solder-wettability than the resistor element.

Abstract translation: 芯片电阻器包括芯片形式的电阻元件和形成在电阻元件上的至少两个电极。 电阻器元件包括上表面，下表面和在上表面和下表面之间延伸并且彼此间隔开的两个端表面。 两个电极设置在电阻元件的下表面上。 电阻元件的每个端面形成有与相应的一个电极整体连接的导体膜。 导体膜例如由铜制成，并且焊料润湿性高于电阻元件。

公开(公告)号：US07365632B2

公开(公告)日：2008-04-29

申请号：US11230876

申请日：2005-09-20

Applicant: Claude L. Bertin ,  Thomas Ruckes ,  Brent M. Segal ,  Jonathan W. Ward

Inventor： Claude L. Bertin ,  Thomas Ruckes ,  Brent M. Segal ,  Jonathan W. Ward

IPC: H01C10/00

CPC classification number: H01C7/06 ,  H01C7/003 ,  H01C7/005 ,  H01C7/006 ,  H01C10/306 ,  H01C17/0652 ,  H01C17/232 ,  H01C17/283 ,  H01L28/22

Abstract: Resistive elements include a patterned region of nanofabric having a predetermined area, where the nanofabric has a selected sheet resistance; and first and second electrical contacts contacting the patterned region of nanofabric and in spaced relation to each other. The resistance of the element between the first and second electrical contacts is determined by the selected sheet resistance of the nanofabric, the area of nanofabric, and the spaced relation of the first and second electrical contacts. The bulk resistance is tunable.

Abstract translation: 电阻元件包括具有预定面积的纳米纤维的图案化区域，其中纳米纤维具有选定的薄层电阻; 以及第一和第二电触头接触纳米尺寸的图案化区域并且彼此间隔开。 元件在第一和第二电触点之间的电阻由所选择的纳米尺寸的薄层电阻，纳米的面积以及第一和第二电触头间隔的关系来确定。 体积电阻是可调谐的。

公开(公告)号：US07352273B2

公开(公告)日：2008-04-01

申请号：US11429348

申请日：2006-05-05

Applicant: Masanori Tanimura

Inventor： Masanori Tanimura

IPC: H01C1/012

CPC classification number: H01C17/281 ,  H01C7/003 ,  H01C17/006 ,  Y10T29/49052 ,  Y10T29/49082 ,  Y10T29/49099 ,  Y10T29/49101 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49135

Abstract: The invention relates to a method of making a chip resistor using a material substrate for which are set a plurality of first cutting lines extending in a first direction and a plurality of second cutting lines extending in a second direction perpendicular to the first direction. The method includes an upper electrode forming step A for forming a thick upper conductor layer on the upper surface of the substrate by printing and baking a metal organic paste, a lower electrode forming step B for forming a thick lower conductor layer on the lower surface of the substrate by printing and baking metal organic paste, and a resistor element forming step C for forming a thin resistor layer by depositing a resistor material on the upper surface of the substrate. Preferably, the upper and the lower surfaces of the material substrate are flat.

Abstract translation: 本发明涉及一种使用材料基板制造芯片电阻器的方法，所述材料基板设置有沿第一方向延伸的多条第一切割线和沿与第一方向垂直的第二方向延伸的多条第二切割线。 该方法包括：上电极形成步骤A，用于通过印刷和烘烤金属有机浆料在基板的上表面上形成厚的上导体层;下电极形成步骤B，用于在下表面上形成较厚的下导体层 通过印刷和烘烤金属有机浆料的衬底，以及用于通过在衬底的上表面上沉积电阻材料形成薄电阻层的电阻器元件形成步骤C. 优选地，材料基板的上表面和下表面是平坦的。

公开(公告)号：US07286039B2

公开(公告)日：2007-10-23

申请号：US10572158

申请日：2004-09-17

Applicant: Masaki Yoneda

Inventor： Masaki Yoneda

IPC: H01C1/012

CPC classification number: H01C17/267 ,  H01C3/12 ,  H01C7/003

Abstract: A chip resistor is provided which includes a resistor film 5 formed between a pair of terminal electrodes 2 and 3 on an upper surface of an insulating substrate 2. The resistor film is formed with two inward grooves 7, 8 and two trimming grooves 9, 10 which are alternately provided for causing the current path in the resistor film to have a winding shape. The two inward grooves 7 and 8 are provided approximately at the midpoint between one end edge 5a and the other end edge 5b of the resistor film 5. The trimming groove 9 is provided between the inward groove 8 and the end edge 5a of the resistor film, whereas the other trimming groove 10 is provided between the inward groove 7 and the end edge 5b of the resistor film, whereby the time required for the trimming adjustment to adjust the resistance to a predetermined value is shortened, and the yield rate is reduced to reduce the cost.