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    Out-Of-Order Input / Output Write
    392.
    发明公开
    Out-Of-Order Input / Output Write 审中-公开

    公开(公告)号：US20230376314A1

    公开(公告)日：2023-11-23

    申请号：US17748066

    申请日：2022-05-19

    Applicant: MELLANOX TECHNOLOGIES, LTD.

    Inventor： Alon Singer ,  Zachy Haramaty

    IPC: G06F9/38 ,  G06F9/30

    CPC classification number: G06F9/3836 ,  G06F9/30145 ,  G06F9/30101 ,  G06F9/30189

    Abstract: A System-On-Chip (SoC) includes a set of registers, a processor, and Out-Of-Order Write (OOOW) circuitry. The processor is to execute instructions including write instructions. After issuing a first write instruction to any of the registers in the set, the processor is to await an acknowledgement for the first write instruction before issuing a second write instruction to any of the registers in the set. The OOOW circuitry is to identify the write instructions issued by the processor to the registers in the set, to perform the identified write instructions in the registers irrespective of acknowledgements from the registers, and to send to the processor imitated acknowledgements for the identified write instructions.

    MULTI-HOST NETWORKING SYSTEMS AND METHODS
    394.
    发明公开
    MULTI-HOST NETWORKING SYSTEMS AND METHODS 审中-公开

    公开(公告)号：US20230350833A1

    公开(公告)日：2023-11-02

    申请号：US18346616

    申请日：2023-07-03

    Applicant: MELLANOX TECHNOLOGIES, LTD.

    Inventor： Avraham Ganor

    IPC: G06F13/42 ,  G06F13/40

    CPC classification number: G06F13/4221 ,  G06F13/4022 ,  G06F2213/0024

    Abstract: Systems and method are provided. An illustrative system includes a first compute node having a first processing unit, a first compute node port, and a first peripheral component interconnect bus configured to carry data between the first processing unit and the first compute node port. The system may further include a multi-host device having a first multi-host port, where the first multi-host port is configured to connect with the first compute node port via a first peripheral component interconnect cable, a network port, where the network port is configured to receive a network interface of a networking cable, and processing circuitry configured to translate and carry data between the first multi-host port and the network port.

    OPTOELECTRONIC COMPONENT AND METHOD OF MANUFACTURING AN OPTOELECTRONIC COMPONENT
    397.
    发明公开
    OPTOELECTRONIC COMPONENT AND METHOD OF MANUFACTURING AN OPTOELECTRONIC COMPONENT 审中-公开

    公开(公告)号：US20230305250A1

    公开(公告)日：2023-09-28

    申请号：US17660348

    申请日：2022-04-22

    Applicant: Mellanox Technologies, Ltd.

    Inventor： Elad Mentovich ,  Paraskevas Bakopoulos ,  Boaz Atias ,  Anna Sandomirsky ,  James Steven Fields, JR. ,  Dimitrios Kalavrouziotis

    IPC: G02B6/43 ,  G02B6/42

    CPC classification number: G02B6/43 ,  G02B6/428

    Abstract: An optoelectronic component may include a substrate, an electronic integrated circuit supported by the substrate, and a photonic integrated circuit supported by the substrate. The optoelectronic component may include a plurality of substrate interconnect connectors disposed on the substrate, a plurality of electronic integrated circuit interconnect connectors disposed on the electronic integrated circuit, and a plurality of photonic integrated circuit interconnect connectors disposed on the photonic integrated circuit. The optoelectronic component may include a first plurality of cable connectors, each cable connector connected to the substrate, the electronic integrated circuit, and the photonic integrated circuit via respective interconnect connectors. The first plurality of cable connectors may be configured to facilitate electrical communication between the substrate, the electronic integrated circuit, and the photonic integrated circuit. The first plurality of cable connectors may define a first layout, and an overall connectivity of the optoelectronic component may correspond to the first layout.

    EFFICIENT SCATTERING TO BUFFERS
    400.
    发明公开
    EFFICIENT SCATTERING TO BUFFERS 审中-公开

    公开(公告)号：US20230291693A1

    公开(公告)日：2023-09-14

    申请号：US17588295

    申请日：2022-01-30

    Applicant: MELLANOX TECHNOLOGIES, LTD.

    Inventor： Gal Yefet ,  Saar Tarnopolsky ,  Avi Urman ,  Dotan David Levi ,  Elena Agostini

    IPC: H04L47/2441 ,  H04L69/22

    CPC classification number: H04L47/2441 ,  H04L69/22

    Abstract: In one embodiments, data communication system include a communication apparatus, which is configured to receive data from different user equipment devices a schedule of time periods, and packetize the data from respective ones of the user equipment devices for respective ones of the time periods into packets, a memory including a plurality of buffers, and a network interface controller configured to receive the packets from the communication apparatus, and scatter respective portions of the data belonging to respective groups of successive ones of the time periods to the buffers, responsively to a static set of steering rules, and timing information of respective ones of the packets, and wherein each respective portion of the data is scattered to the buffers a same scatter pattern.

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