公开(公告)号：US08166283B2

公开(公告)日：2012-04-24

申请号：US11502343

申请日：2006-08-10

Applicant: Xavier Cauchy

Inventor： Xavier Cauchy

IPC: G06F15/00 ,  G06F7/38 ,  G06F9/00 ,  G06F9/44 ,  G06F1/00

CPC classification number: H03K4/026 ,  G06F1/02

Abstract: A generator of a signal including a memory in which instructions are stored, each instruction including a code portion and an argument portion; circuitry for successively reading instructions stored in the memory; decoding circuitry capable of receiving, for each read instruction, the code portion of the instruction and of providing an activation signal which depends on the code portion; and circuitry for providing the signal capable of receiving, for each read instruction, the argument portion of the instruction and capable, according to the activation signal, of storing the argument portion and of providing the signal equal to the argument portion or of providing the signal equal to the previously-stored argument portion.

Abstract translation: 包括存储指令的存储器的信号的发生器，每个指令包括代码部分和参数部分; 用于连续读取存储在存储器中的指令的电路; 解码电路能够针对每个读取指令接收指令的代码部分并且提供取决于代码部分的激活信号; 以及用于提供能够为每个读取指令接收指令的参数部分并且能够根据激活信号存储参数部分并且提供等于参量部分的信号或者提供信号的信号的电路 等于先前存储的参数部分。

公开(公告)号：US08159587B2

公开(公告)日：2012-04-17

申请号：US12333011

申请日：2008-12-11

Applicant: Benoît Deschamps ,  Frédéric Barbier

Inventor： Benoît Deschamps ,  Frédéric Barbier

IPC: H04N5/335 ,  H04M1/00 ,  H01L31/0232

CPC classification number: H04N5/35581

Abstract: A method of reading voltages from an image sensor having an array of pixels, each pixel Having at least one photodiode connectable to a storage node, the method including: controlling each pixel in a row of pixels to store and output a first voltage value at a first instance, a second voltage value at a second instance, and a third voltage value at a third instance, the first, second and third voltage values being representative of charge accumulated by the photodiodes during an integration phase; comparing the first voltage value from each pixel with a reference threshold; sampling for each pixel, based on the comparison, one of the second and third voltage values, and generating an output pixel value based on the sampled one of the second and third voltage values.

Abstract translation: 一种从具有像素阵列的图像传感器读取电压的方法，每个像素具有可连接到存储节点的至少一个光电二极管，该方法包括：控制一行像素中的每个像素以存储和输出第一电压值 第一实例，第二实例的第二电压值和第三实例的第三电压值，第一，第二和第三电压值表示在积分阶段期间由光电二极管累积的电荷; 将每个像素的第一电压值与参考阈值进行比较; 基于所述比较，针对每个像素对所述第二和第三电压值之一进行采样，并且基于所述第二和第三电压值中的所述采样的一个产生输出像素值。

公开(公告)号：US08159109B2

公开(公告)日：2012-04-17

申请号：US12850126

申请日：2010-08-04

Applicant: Nicolas Abelé ,  Pascal Ancey ,  Alexandre Talbot ,  Karim Segueni ,  Guillaume Bouche ,  Thomas Skotnicki ,  Stéphane Monfray ,  Fabrice Casset

Inventor： Nicolas Abelé ,  Pascal Ancey ,  Alexandre Talbot ,  Karim Segueni ,  Guillaume Bouche ,  Thomas Skotnicki ,  Stéphane Monfray ,  Fabrice Casset

IPC: H01L21/00

CPC classification number: H03H9/2405 ,  H03H3/0072 ,  H03H2009/02496

Abstract: A microresonator comprising a single-crystal silicon resonant element and at least one activation electrode placed close to the resonant element, in which the resonant element is placed in an opening of a semiconductor layer covering a substrate, the activation electrode being formed in the semiconductor layer and being level at the opening.

Abstract translation: 一种微谐振器，包括单晶硅谐振元件和靠近谐振元件放置的至少一个激活电极，其中谐振元件放置在覆盖衬底的半导体层的开口中，激活电极形成在半导体层中 并在开幕式的水平。

公开(公告)号：US08158495B2

公开(公告)日：2012-04-17

申请号：US11788391

申请日：2007-04-18

Applicant: Didier Dutartre ,  Laurent Rubaldo ,  Alexandre Talbot

Inventor： Didier Dutartre ,  Laurent Rubaldo ,  Alexandre Talbot

IPC: H01L21/302

CPC classification number: H01L21/02381 ,  H01L21/02529 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262

Abstract: Silicon-based single-crystal portions are produced on a surface of a substrate, selectively in zones where a single-crystal material is initially exposed. To do this, a layer is firstly formed over the entire surface of the substrate, using a silicon precursor of the non-chlorinated hydride type, and under suitable conditions so that the layer is a single-crystal layer in the zones of the substrate where a single-crystal material is initially exposed and amorphous outside these zones. The amorphous portions of the layer are then selectively etched so that only the single-crystal portions of the layer remain on the substrate.

Abstract translation: 在单晶材料最初暴露的区域选择性地在基板的表面上制造硅基单晶部分。 为此，首先在基板的整个表面上使用非氯化氢化物型的硅前体，并在合适的条件下形成层，使得该层是基板区域中的单晶层， 单晶材料最初在这些区域之外露出和非晶态。 然后选择性地蚀刻该层的非晶部分，使得只有该层的单晶部分保留在基板上。

公开(公告)号：US08153947B2

公开(公告)日：2012-04-10

申请号：US12350677

申请日：2009-01-08

Applicant: Frédéric Barbier ,  Yvon Cazaux

Inventor： Frédéric Barbier ,  Yvon Cazaux

IPC: H01L27/00

CPC classification number: H04N5/3559 ,  H01L27/14609 ,  H01L27/14623 ,  H01L27/14641 ,  H04N5/359 ,  H04N5/361 ,  H04N5/37452

Abstract: An image sensor formed of an array of pixels, each pixel including a photodiode coupled between a first reference voltage and a first switch, the first switch being operable to connect the photodiode to a first node; a capacitor arranged to store a charge accumulated by the photodiode, the capacitor being coupled between a second reference voltage and a second node; a second switch coupled between the first and second nodes, the second switch being operable to connect the capacitor to the first node; and read circuitry coupled for reading the voltage at the second node.

Abstract translation: 由像素阵列形成的图像传感器，每个像素包括耦合在第一参考电压和第一开关之间的光电二极管，所述第一开关可操作以将光电二极管连接到第一节点; 电容器，被布置成存储由所述光电二极管累积的电荷，所述电容器耦合在第二参考电压和第二节点之间; 耦合在所述第一和第二节点之间的第二开关，所述第二开关可操作以将所述电容器连接到所述第一节点; 并读取电路，用于读取第二节点处的电压。

公开(公告)号：US08138998B2

公开(公告)日：2012-03-20

申请号：US12101729

申请日：2008-04-11

Applicant: Céline Mas ,  Corinne Ianigro ,  Hervé Pierrot

Inventor： Céline Mas ,  Corinne Ianigro ,  Hervé Pierrot

IPC: G09G3/30 ,  G09G3/10

CPC classification number: G09G3/3208 ,  G09G2320/0252

Abstract: A device for controlling an electroluminescent matrix display by successive selection of its lines, including a column control circuit having circuitry capable of placing, at the beginning of the selection of a line, the display column at a precharge voltage based on the operating voltage of the previous line, the column control circuit also having circuitry capable of modifying the precharge voltage according to the difference between luminance instructions of the previous line and those of the selected line.

Abstract translation: 一种用于通过连续选择其线路来控制电致发光矩阵显示的装置，包括列控制电路，该列控制电路具有电路，该电路能够在线选择开始时将显示列放置在预充电电压的基础上， 上一行，列控制电路还具有能够根据前一行的亮度指令与所选行的亮度指令之间的差异来修改预充电电压的电路。

公开(公告)号：US08135129B2

公开(公告)日：2012-03-13

申请号：US11917347

申请日：2006-06-14

Applicant: Yannick Teglia ,  Pierre-Yvan Liardet ,  Alain Pomet

Inventor： Yannick Teglia ,  Pierre-Yvan Liardet ,  Alain Pomet

IPC: H04L9/28 ,  G06F12/14 ,  H04L9/32

CPC classification number: G06F7/723 ,  G06F2207/7252 ,  H04L9/003

Abstract: A method and a circuit for protecting a numerical quantity contained in an integrated circuit on a first number of bits, in a modular exponentiation computing of a data by the numerical quantity, including: selecting at least one second number included between the unit and said first number minus two; dividing the numerical quantity into at least two parts, a first part including, from the bit of rank null, a number of bits equal to the second number, a second part including the remaining bits; for each part of the quantity, computing a first modular exponentiation of said data by the part concerned and a second modular exponentiation of the result of the first by the FIG. 2 exponentiated to the power of the rank of the first bit of the part concerned; and computing the product of the results of the first and second modular exponentiations.

Abstract translation: 一种方法和电路，用于通过所述数字量对数据的模幂运算中的第一位数保护包含在集成电路中的数值，包括：选择包括在所述单元和所述第一位之间的至少一个第二数字 数减二; 将所述数值分为至少两部分，第一部分包括从所述位零位的比特数等于所述第二数目的第二部分，包括剩余比特的第二部分; 对于数量的每个部分，通过所涉及的部分计算所述数据的第一模幂运算，并且通过图1计算第一次的结果的第二模幂运算。 2指数与有关部分的第一位的等级的权力; 并计算第一和第二模幂指数的结果的乘积。

公开(公告)号：US20120012891A1

公开(公告)日：2012-01-19

申请号：US13242626

申请日：2011-09-23

Applicant: Samuel Menard

Inventor： Samuel Menard

IPC: H01L29/747

CPC classification number: H01L29/747 ,  H01L29/7404

Abstract: A voltage-controlled vertical bi-directional monolithic switch, referenced with respect to the rear surface of the switch, formed from a lightly-doped N-type semiconductor substrate, in which the control structure includes, on the front surface side, a first P-type well in which is formed an N-type region, and a second P-type well in which is formed a MOS transistor, the first P-type well and the gate of the MOS transistor being connected to a control terminal, said N-type region being connected to a main terminal of the MOS transistor, and the second main terminal of the MOS transistor being connected to the rear surface voltage of the switch.

Abstract translation: 由轻掺杂的N型半导体衬底形成的相对于开关的背面参照的电压控制的垂直双向单片开关，其中控制结构在前表面侧包括第一P 型，其中形成N型区域，第二P型阱形成有MOS晶体管，第一P型阱和MOS晶体管的栅极连接到控制端子，所述N 型区域连接到MOS晶体管的主端子，并且MOS晶体管的第二主端子连接到开关的背面电压。

公开(公告)号：US20110272801A1

公开(公告)日：2011-11-10

申请号：US13100860

申请日：2011-05-04

Applicant: Vincent Fiori ,  Philippe Delpech ,  Eric Sabouret

Inventor： Vincent Fiori ,  Philippe Delpech ,  Eric Sabouret

IPC: H01L23/50

CPC classification number: H01L24/12 ,  H01L24/05 ,  H01L2224/02125 ,  H01L2224/0401 ,  H01L2224/04073 ,  H01L2224/05552 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05555 ,  H01L2224/05576 ,  H01L2224/05578 ,  H01L2224/0558 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A semiconductor device includes an integrated circuit and external electrical connection pads. Each pad includes cavities that are at least partially filled with a material different from the material forming the pads, so as to form inserts.

Abstract translation: 半导体器件包括集成电路和外部电连接焊盘。 每个垫包括至少部分地填充有与形成垫的材料不同的材料的空腔，以形成插入物。

公开(公告)号：US08045653B2

公开(公告)日：2011-10-25

申请号：US10572295

申请日：2004-09-15

Applicant: Thierry Lenez ,  Patrice Lenez, legal representative ,  Jean-Benoit Pierrot ,  Olivier Isson

Inventor： Thierry Lenez ,  Jean-Benoit Pierrot ,  Olivier Isson

IPC: H04L27/06

CPC classification number: H04L27/2656 ,  H04L27/2675

Abstract: Detection method and device for a receiver in a digital communication system designed to process a frame comprising a periodic sub-set of length n, said method comprising the following steps:—determining a first vector u having a length n;—determining a second shifted vector v;—calculating a correlation function between said first and second vectors;—calculating a quadratic error function between said first and second vectors;—calculating a first cost function that is a linear combination of both preceding functions and, according to the sign of the result,—calculating a second cost function of frame beginning estimate; and—starting the communication system receiver.

Abstract translation: 数字通信系统中的接收机的检测方法和装置，被设计用于处理包括长度为n的周期性子集的帧，所述方法包括以下步骤： - 确定具有长度n的第一向量u; - 确定第二移位 向量v;计算所述第一和第二向量之间的相关函数;计算所述第一和第二向量之间的二次误差函数;计算作为前述函数的线性组合的第一成本函数，并根据 结果，计算帧开始估计的第二个成本函数; 并启动通信系统接收器。