Apparatus And Method Of Testing Singulated Dies
    41.
    发明申请
    Apparatus And Method Of Testing Singulated Dies 有权
    测试单位模具的装置和方法

    公开(公告)号:US20070063721A1

    公开(公告)日:2007-03-22

    申请号:US11532494

    申请日:2006-09-15

    CPC classification number: G01R31/2889 G01R31/2893 G01R31/31905

    Abstract: An exemplary die carrier is disclosed. In some embodiments, the die carrier can hold a plurality of singulated dies while the dies are tested. The dies can be arranged on the carrier in a pattern that facilities testing the dies. The carrier can be configured to allow interchangeable interfaces to different testers to be attached to and detached from the carrier. The carrier can also be configured as a shipping container for the dies.

    Abstract translation: 公开了一种示例性的模具载体。 在一些实施例中,模具载体可以在测试模具的同时保持多个单个模具。 模具可以以对模具进行测试的模式布置在载体上。 载体可以被配置为允许不同的测试仪的可互换的接口被附接到载体上并与载体分离。 载体也可以被配置为模具的运输容器。

    Method And System For Designing A Probe Card
    42.
    发明申请
    Method And System For Designing A Probe Card 失效
    探针卡设计方法与系统

    公开(公告)号:US20060294008A1

    公开(公告)日:2006-12-28

    申请号:US11464760

    申请日:2006-08-15

    Abstract: A method and system for designing a probe card from data provided by prospective customers via the Internet is provided. Design specifications are entered into the system by prospective customers and compiled into a database. The collective feasibility of each set of design specifications is determined by an automated computer system and communicated to the prospective customer. If feasible, additional software enables prospective customers to create verification packages according to their respective design specifications. These verification packages further consist of drawing files visually describing the final design and verification files confirming wafer bonding pad data. Verification packages are reviewed and forwarded to an applications engineer after customer approval. An interactive simulation of probe card performance is also provided. Data on probe card performance is incorporated into an overall modeling exercise, which includes not only the probe card, but data on the device(s) under test and wafer, as well as data on automated test equipment.

    Abstract translation: 提供了一种通过互联网从潜在客户提供的数据设计探针卡的方法和系统。 设计规范由潜在客户输入系统并编译成数据库。 每套设计规范的集体可行性由自动化计算机系统确定,并传达给潜在客户。 如果可行,附加软件可使潜在客户根据各自的设计规范创建验证包。 这些验证包还包括可视化地描述确认晶圆键合焊盘数据的最终设计和验证文件的绘图文件。 在客户批准后,验证包将被审核并转发给应用工程师。 还提供了探针卡性能的交互式仿真。 探针卡性能数据被纳入整体建模练习中,其中不仅包括探针卡,还包括被测设备和晶片上的数据,以及自动测试设备的数据。

    Method of designing a probe card apparatus with desired compliance characteristics
    44.
    发明申请
    Method of designing a probe card apparatus with desired compliance characteristics 失效
    设计具有所需顺应特性的探针卡装置的方法

    公开(公告)号:US20060043985A1

    公开(公告)日:2006-03-02

    申请号:US10930272

    申请日:2004-08-31

    CPC classification number: G01R1/07364 G01R1/07378 G01R3/00 Y10T29/49117

    Abstract: A probe card apparatus is configured to have a desired overall amount of compliance. The compliance of the probes of the probe card apparatus is determined, and an additional, predetermined amount of compliance is designed into the probe card apparatus so that the sum of the additional compliance and the compliance of the probes total the overall desired compliance of the probe card apparatus.

    Abstract translation: 探针卡装置被配置为具有期望的总体顺应性。 确定探针卡装置的探针的符合性,并且将另外的预定量的顺应性设计到探针卡装置中,使得附加顺应性和探针的顺应性的总和达到探针的总体期望顺应性 卡装置。

    Mechanically reconfigurable vertical tester interface for IC probing
    45.
    发明申请
    Mechanically reconfigurable vertical tester interface for IC probing 失效
    用于IC探测的机械可重构垂直测试仪接口

    公开(公告)号:US20050277323A1

    公开(公告)日:2005-12-15

    申请号:US10868425

    申请日:2004-06-15

    CPC classification number: G01R31/2889 G01R1/0416 G01R1/07307

    Abstract: A wafer test assembly includes multiple probe head substrates arranged like tiles with connectors attached to one side and probes supported on the opposing side. In one embodiment, flexible cable connectors directly connect the connectors on the probe head tile to a test head, while in another embodiment the flexible cables connect the probe head tile to a PCB providing horizontal routing to test head connectors. In one embodiment, leveling pins provide a simplified support structure connecting to a retaining element attached to the tiles to provide for applying a push-pull leveling force. A test head connector interface frame enables rearrangement of connectors between the test head and the probe card to provide for both full wafer contact or partial wafer contact. The test head connectors are rearranged by being slidable on rails, or pluggable and unpluggable enabling movement over a range of positions.

    Abstract translation: 晶片测试组件包括多个探针头基底,其布置成瓦片,其中连接器连接到一侧,探针支撑在相对侧上。 在一个实施例中,柔性电缆连接器将探头头瓦片上的连接器直接连接到测试头,而在另一个实施例中,柔性电缆将探头头瓦片连接到PCB,从而向测试头连接器提供水平布线。 在一个实施例中,调平销提供连接到附接到瓦片的保持元件以提供施加推挽平整力的简化支撑结构。 测试头连接器接口框架能够重新布置测试头和探针卡之间的连接器,以提供完整的晶片接触或部分晶片接触。 测试头连接器通过在轨道上滑动来重新布置,或者可插拔和可拔出,使得能够在一定范围的位置上移动。

    Probe card configuration for low mechanical flexural strength electrical routing substrates
    47.
    发明申请
    Probe card configuration for low mechanical flexural strength electrical routing substrates 失效
    用于低机械抗弯强度电路基板的探针卡配置

    公开(公告)号:US20050156611A1

    公开(公告)日:2005-07-21

    申请号:US10771099

    申请日:2004-02-02

    CPC classification number: G01R31/2889 G01R1/07378

    Abstract: A mechanical support configuration for a probe card of a wafer test system is provided to increase support for a very low flexural strength substrate that supports spring probes. Increased mechanical support is provided by: (1) a frame around the periphery of the substrate having an increased sized horizontal extension over the surface of the substrate; (2) leaf springs with a bend enabling the leaf springs to extend vertically and engage the inner frame closer to the spring probes; (3) an insulating flexible membrane, or load support member machined into the inner frame, to engage the low flexural strength substrate farther away from its edge; (4) a support structure, such as support pins, added to provide support to counteract probe loading near the center of the space transformer substrate; and/or (5) a highly rigid interface tile provided between the probes and a lower flexural strength space transformer substrate.

    Abstract translation: 提供了用于晶片测试系统的探针卡的机械支撑结构,以增加对支撑弹簧探针的极低弯曲强度基底的支撑。 通过以下方式提供增加的机械支撑:(1)围绕基板的周边的框架,在基板的表面上具有增大尺寸的水平延伸; (2)具有弯曲的板簧,使得板簧能够垂直延伸并使内框架接近弹簧探头; (3)绝缘柔性膜或加工到内框架中的负载支撑构件,使低弯曲强度基板与其边缘更远地接合; (4)加载支撑结构,例如支撑销,以提供支撑以抵消在空间变压器基板的中心附近的探头负载; 和/或(5)设置在所述探针与下弯曲强度空间变换器基板之间的高刚性界面砖。

    METHODS FOR PLANARIZING A SEMICONDUCTOR CONTACTOR
    48.
    发明申请
    METHODS FOR PLANARIZING A SEMICONDUCTOR CONTACTOR 失效
    用于平面化半导体接触器的方法

    公开(公告)号:US20080048688A1

    公开(公告)日:2008-02-28

    申请号:US11846012

    申请日:2007-08-28

    CPC classification number: G01R1/07307 G01R3/00

    Abstract: A planarizer for a probe card assembly. A planarizer includes a first control member extending from a substrate in a probe card assembly. The first control member extends through at least one substrate in the probe card assembly and is accessible from an exposed side of an exterior substrate in the probe card assembly. Actuating the first control member causes a deflection of the substrate connected to the first control member.

    Abstract translation: 用于探针卡组件的平面化器。 平面化器包括从探针卡组件中的衬底延伸的第一控制构件。 第一控制构件延伸穿过探针卡组件中的至少一个衬底,并且可从探针卡组件中的外部衬底的暴露侧进入。 驱动第一控制构件导致连接到第一控制构件的衬底的偏转。

    PROBING A DEVICE
    49.
    发明申请
    PROBING A DEVICE 失效
    探索一个设备

    公开(公告)号:US20070262767A1

    公开(公告)日:2007-11-15

    申请号:US11748988

    申请日:2007-05-15

    CPC classification number: G01R31/2886 G01R31/2887

    Abstract: An electronic device is moved into a first position such that terminals of the electronic device are adjacent probes for making electrical contact with the terminals. The electronic device is then moved horizontally or diagonally such that the terminals contact the probes. Test data are then communicated to and from the electronic device through the probes.

    Abstract translation: 电子设备移动到第一位置,使得电子设备的端子是与端子电接触的相邻探头。 然后电子设备水平或对角地移动,使得端子接触探针。 然后通过探头将测试数据传送到电子设备和从电子设备传送。

    PREDICTIVE, ADAPTIVE POWER SUPPLY FOR AN INTEGRATED CIRCUIT UNDER TEST
    50.
    发明申请
    PREDICTIVE, ADAPTIVE POWER SUPPLY FOR AN INTEGRATED CIRCUIT UNDER TEST 有权
    预测,适用于测试中的集成电路的自适应电源

    公开(公告)号:US20070257696A1

    公开(公告)日:2007-11-08

    申请号:US11779188

    申请日:2007-07-17

    Abstract: A main power source supplies current through path impedance to a power terminal of an integrated circuit device under test (DUT). The DUT's demand for current at the power input terminal temporarily increases following edges of a clock signal applied to the DUT during a test as transistors within the IC switch in response to the clock signal edges. To limit variation (noise) in voltage at the power input terminal, an auxiliary power supply supplies an additional current pulse to the power input terminal to meet the increased demand during each cycle of the clock signal. The magnitude of the current pulse is a function of a predicted increase in current demand during that clock cycle, and of the magnitude of an adaption signal controlled by a feedback circuit provided to limit variation in voltage developed at the DUT's power input terminal.

    Abstract translation: 主电源将电流通过路径阻抗提供给被测集成电路器件(DUT)的电源端子。 在测试期间,DUT对电源输入端的电流需求暂时增加了在测试期间施加到DUT的时钟信号的随后边缘,作为IC开关中的晶体管响应于时钟信号的边缘。 为了限制电源输入端子的电压变化(噪声),辅助电源为电源输入端子提供额外的电流脉冲,以满足在时钟信号的每个周期期间增加的需求。 电流脉冲的大小是在该时钟周期期间电流需求的预测增加以及由反馈电路控制的适配信号的大小的函数,以设置用于限制在DUT的功率输入端产生的电压变化。

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