公开(公告)号：US20080089378A1

公开(公告)日：2008-04-17

申请号：US11882595

申请日：2007-08-02

申请人： Hiroyuki Kamiyama ,  Masaru Mukaikubo ,  Hiroaki Inoue ,  Chiyuki Kitahara

发明人： Hiroyuki Kamiyama ,  Masaru Mukaikubo ,  Hiroaki Inoue ,  Chiyuki Kitahara

IPC分类号： H01S5/00 ,  H01L21/66

CPC分类号： H01S5/0021 ,  B82Y20/00 ,  H01S5/12 ,  H01S5/18308 ,  H01S5/18369 ,  H01S5/2231 ,  H01S5/3095 ,  H01S5/343

摘要： Some semiconductor lasers have an initial failure mode that is advanced as the amount of optical power therein, namely, the amount of optical output observed from the outside increases in almost independent of the temperature. The initial failure mode that is advanced as the amount of optical output increases is not sufficiently screened, so that the initial failure rate is somewhat higher than that of the semiconductor laser having the conventional active layer material. It is effective to introduce a test with large optical output at lower temperature than average operating temperature such as room temperature, during the manufacturing process. This helps to eliminate elements having the initial failure mode that is advanced as the amount optical output increases, thereby to extend the expected life of the laser diodes.

摘要翻译： 一些半导体激光器具有随着其中的光功率的量而前进的初始故障模式，即从外部观察到的光输出的量几乎不依赖于温度而增加。 随着光输出量的增加而提前的初始故障模式不能被充分地屏蔽，使得初始故障率稍高于具有传统有源层材料的半导体激光器的初始故障率。 在制造过程中，在比平均工作温度（如室温）低的温度下引入具有大光输出的测试是有效的。 这有助于消除具有初始故障模式的元件，该元件随着光输出量的增加而提前，从而延长了激光二极管的预期寿命。

公开(公告)号：US20070277986A1

公开(公告)日：2007-12-06

申请号：US11791190

申请日：2005-11-16

申请人： Jun Morinaga ,  Tadashi Kawaguchi ,  Hiroaki Inoue

发明人： Jun Morinaga ,  Tadashi Kawaguchi ,  Hiroaki Inoue

IPC分类号： G06F19/00 ,  E02F3/00

CPC分类号： E02F9/2296 ,  E02F9/123 ,  E02F9/128 ,  E02F9/2075 ,  E02F9/2292

摘要： In a swing control device installed in an electric rotary excavator (a construction machine), when a leading edge or a trailing edge of a lever signal is sharp due to a quick operation of a swing lever, a gradient as a rise time Ta1 or a fall time Tb1 is provided to the leading edge or the trailing edge of the torque output and the acceleration that are output based on the lever signal so as to somewhat ease the edge. With the arrangement, an impact in acceleration or deceleration of a rotary body can be suppressed. Specifically, a gradient in the acceleration operation is provided such that the rise time Ta1 becomes 0.15 seconds or more, while a gradient in the stop deceleration operation is provided such that the fall time Tb1 becomes 0.1 seconds or more.

摘要翻译： 在安装在电动式挖掘机（施工机械）中的摆动控制装置中，由于摇杆的快速操作，当杠杆信号的前缘或后缘很尖锐时，作为上升时间Ta 1或 下降时间Tb 1被提供给扭矩输出的前缘或后缘以及基于杠杆信号输出的加速度，以便稍微缓和边缘。 通过该结构，能够抑制旋转体的加速或减速的冲击。 具体地，提供加速操作的梯度，使得上升时间Ta1变为0.15秒以上，同时提供停止减速操作中的梯度使得下降时间Tb 1变为0.1秒以上。

公开(公告)号：US07223690B2

公开(公告)日：2007-05-29

申请号：US10976040

申请日：2004-10-29

申请人： Fumio Kondo ,  Koji Mishima ,  Akira Tanaka ,  Yoko Suzuki ,  Tetsuji Togawa ,  Hiroaki Inoue

发明人： Fumio Kondo ,  Koji Mishima ,  Akira Tanaka ,  Yoko Suzuki ,  Tetsuji Togawa ,  Hiroaki Inoue

IPC分类号： H01L21/4763 ,  H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC分类号： H01L21/67161 ,  B24B37/005 ,  B24B37/042 ,  B24B37/245 ,  B24B37/345 ,  B24B41/061 ,  B24B49/16 ,  C23C18/1632 ,  C23C18/1653 ,  C25D7/123 ,  H01L21/02074 ,  H01L21/02087 ,  H01L21/0209 ,  H01L21/288 ,  H01L21/2885 ,  H01L21/3212 ,  H01L21/67167 ,  H01L21/67173 ,  H01L21/67184 ,  H01L21/67219 ,  H01L21/6723 ,  H01L21/67393 ,  H01L21/67396 ,  H01L21/67772 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76849 ,  H01L21/76864 ,  H01L21/76873 ,  H01L21/76874 ,  H01L21/76877

摘要： A substrate processing method comprising steps for forming a copper film on a surface of a substrate. These steps includes the step of filling a first metal in the trenches so as to form a plated film of the first metal on an entire surface of the substrate by electroplating, wherein the electromagnetic field is adjusted by the virtual anode so that differences of thickness of the plated film between the central portion and the peripheral portion of the substrate being minimized, and polishing and removing the plated film by pressing the substrate to the polishing surface, wherein the pressures pressing the substrate to the polishing surface at a central portion and a peripheral portion are adjusted.

摘要翻译： 一种基板处理方法，包括在基板的表面上形成铜膜的步骤。 这些步骤包括在沟槽中填充第一金属以便通过电镀在基板的整个表面上形成第一金属的镀膜的步骤，其中电磁场由虚拟阳极调节，使得厚度差异 基板的中心部分和周边部分之间的镀膜最小化，并且通过将基板压在研磨表面上来研磨和去除镀膜，其中将基板压在抛光表面的压力在中心部分和周边 部分进行调整。

公开(公告)号：US07220631B2

公开(公告)日：2007-05-22

申请号：US11034948

申请日：2005-01-14

申请人： Hitoshi Asada ,  Hiroaki Inoue

发明人： Hitoshi Asada ,  Hiroaki Inoue

IPC分类号： H01L21/8238

CPC分类号： H01L29/0847 ,  H01L21/823418 ,  H01L21/823468 ,  H01L29/41775 ,  H01L29/4933 ,  H01L29/6656 ,  H01L29/66659 ,  H01L29/7833 ,  H01L29/7835

摘要： The semiconductor device comprises a gate electrode 26 formed on a semiconductor substrate 10, a source region 45 a having a lightly doped source region 42a and a heavily doped source region 44a, a drain region 45b having a lightly doped drain region 42b and a heavily doped drain region 44b, a first silicide layer 40c formed on the source region, a second silicide layer 40d formed on the drain region, a first conductor plug 54 connected to the first silcide layer and a second conductor plug 54 connected to the second silicide layer. The heavily doped drain region is formed in the region of the lightly doped region except the peripheral region, and the second silicide layer is formed in the region of the heavily doped drain region except the peripheral region. Thus, the concentration of the electric fields on the drain region can be mitigated when voltages are applied to the drain region. Thus, even with the silicide layer formed on the source/drain region, sufficiently high withstand voltages of the high withstand voltage transistor can be ensured. Furthermore, the drain region alone has the above-described structure, whereby the increase of the source-drain electric resistance can be prevented while high withstand voltages can be ensured.

摘要翻译： 半导体器件包括形成在半导体衬底10上的栅电极26，具有轻掺杂源区42a和重掺杂源区44a的源区45a，具有轻掺杂漏区42b的漏区45b 以及重掺杂漏区44b，形成在源极区上的第一硅化物层40c，形成在漏极区上的第二硅化物层40d，连接到第一硅化物层的第一导体插塞54和第二导体插塞54 连接到第二硅化物层。 重掺杂漏极区域形成在除了外围区域之外的轻掺杂区域的区域中，并且第二硅化物层形成在除了周边区域之外的重掺杂漏极区域的区域中。 因此，当向漏极区域施加电压时，可以减轻漏极区域上的电场的浓度。 因此，即使在源极/漏极区域上形成硅化物层，也可以确保高耐压晶体管的足够高的耐受电压。 此外，单独的漏极区域具有上述结构，由此可以防止源极 - 漏极电阻的增加，同时可以确保高耐受电压。

公开(公告)号：US20050282378A1

公开(公告)日：2005-12-22

申请号：US10941882

申请日：2004-09-16

申请人： Akira Fukunaga ,  Manabu Tsujimura ,  Hiroaki Inoue

发明人： Akira Fukunaga ,  Manabu Tsujimura ,  Hiroaki Inoue

IPC分类号： C23C16/00 ,  C23C16/04 ,  C23C16/06 ,  H01L21/4763 ,  H01L21/768

CPC分类号： H01L21/76843 ,  C23C16/042 ,  C23C16/045 ,  C23C16/06 ,  H01L21/7684 ,  H01L21/76849

摘要： An interconnects forming method and an interconnects forming apparatus are useful for embedding a conductive material (interconnect material), such as copper or silver, into interconnect recesses provided in a surface of a substrate, such as a semiconductor wafer, to thereby form embedded interconnects, and selectively covering the surfaces of embedded interconnects with a metal film (protective film) to provide a multi-level structure. The interconnects forming method comprises: providing a substrate which has been prepared by forming a barrier layer over a substrate surface having interconnect recesses formed in an insulating film, and then forming a film of an interconnect material in the interconnect recesses and over the substrate surface; removing extra interconnect material formed over the substrate surface, thereby forming interconnects with the interconnect material embedded in the interconnect recesses and making the barrier layer present in the other portion than the interconnect-formed portion exposed; and forming a metal film selectively on surfaces of interconnects.

摘要翻译： 互连形成方法和互连形成装置可用于将诸如铜或银的导电材料（互连材料）嵌入设置在诸如半导体晶片的基板的表面中的互连凹槽中，从而形成嵌入式互连， 并且用金属膜（保护膜）选择性地覆盖嵌入式互连件的表面以提供多层结构。 互连形成方法包括：提供通过在绝缘膜上形成具有互连凹槽的衬底表面上形成阻挡层，然后在互连凹槽中并在衬底表面上形成互连材料的膜而制备的衬底; 去除形成在衬底表面上的额外的互连材料，从而与嵌入在互连凹槽中的互连材料形成互连，并使阻挡层存在于暴露的互连形成部分的另一部分中; 并在互连表面上选择性地形成金属膜。

公开(公告)号：US06929722B2

公开(公告)日：2005-08-16

申请号：US09945711

申请日：2001-09-05

申请人： Akihisa Hongo ,  Naoaki Ogure ,  Hiroaki Inoue ,  Norio Kimura ,  Fumio Kuriyama ,  Manabu Tsujimura ,  Kenichi Suzuki ,  Atsushi Chono

发明人： Akihisa Hongo ,  Naoaki Ogure ,  Hiroaki Inoue ,  Norio Kimura ,  Fumio Kuriyama ,  Manabu Tsujimura ,  Kenichi Suzuki ,  Atsushi Chono

IPC分类号： C25D7/12 ,  H01L21/00 ,  H01L21/288 ,  H01L21/768 ,  C25D17/00 ,  H01M4/29 ,  C23B3/00

CPC分类号： H01L21/67167 ,  C25D17/001 ,  H01L21/2885 ,  H01L21/67051 ,  H01L21/67126 ,  H01L21/67161 ,  H01L21/67173 ,  H01L21/6719 ,  H01L21/67219 ,  H01L21/6723 ,  H01L21/76849 ,  H01L21/76877 ,  Y10S134/902

摘要： A substrate plating apparatus forms an interconnection layer on an interconnection region composed of a fine groove and/or a fine hole defined in a substrate. The substrate plating apparatus includes a plating unit for forming a plated layer on a surface of the substrate including the interconnection region, a chemical mechanical polishing unit for chemically mechanically polishing the substrate to remove the plated layer from the surface of the substrate leaving a portion of the plated layer in the interconnection region, a cleaning unit for cleaning the substrate after the plated layer is formed or the substrate is chemically mechanically polished, a drying unit for drying the substrate after the substrate is cleaned, and a substrate transfer unit for transferring the substrate to and from each of the first plating unit, the first chemical mechanical polishing unit, the cleaning unit, and the drying unit. The first plating unit, the first chemical mechanical polishing unit, the cleaning unit, the drying unit, and the substrate transfer unit are combined into a unitary arrangement.

摘要翻译： 基板电镀装置在由微细凹槽和/或限定在基板中的细孔构成的互连区域上形成布线层。 基板电镀装置包括用于在包括互连区域的基板的表面上形成镀层的电镀单元，用于对基板进行化学机械抛光以从基板的表面移除镀层的化学机械抛光单元， 互连区域中的镀层，用于在形成镀层之后对基板进行清洗或基板进行化学机械抛光的清洁单元，用于在清洁基板之后使基板干燥的干燥单元，以及用于将基板转印 第一电镀单元，第一化学机械抛光单元，清洁单元和干燥单元中的每一个的基板。 第一电镀单元，第一化学机械抛光单元，清洁单元，干燥单元和基板转移单元组合成一体的布置。

公开(公告)号：US06858084B2

公开(公告)日：2005-02-22

申请号：US09983401

申请日：2001-10-24

申请人： Hiroaki Inoue ,  Koji Mishima ,  Tsutomu Karimata ,  Kenji Nakamura ,  Moriji Matsumoto ,  Junji Kunisawa

发明人： Hiroaki Inoue ,  Koji Mishima ,  Tsutomu Karimata ,  Kenji Nakamura ,  Moriji Matsumoto ,  Junji Kunisawa

IPC分类号： C23C18/16 ,  H01L21/288 ,  H01L21/768 ,  B05C11/00

CPC分类号： H01L21/76843 ,  C23C18/1619 ,  H01L21/288 ,  H01L21/76849 ,  H01L21/76873 ,  H01L21/76874 ,  H01L21/76877 ,  H01L2221/1089

摘要： The present invention relates to an electroless plating apparatus which can reduce an amount of a plating liquid to be used, maintain a stable plating process, be downsized, reduce an apparatus cost, form a film having a uniform thickness over an entire surface, and prevent a plating liquid from being deteriorated due to a temperature rise. The present invention comprises: a holding device for holding a substrate with a surface, to be plated, facing upwardly; a plating liquid holding mechanism for sealing a periphery of the surface, to be plated, of the substrate held by the holding device; an electroless plating treatment liquid supply device for supplying an electroless plating liquid to the surface, to be plated, of the substrate sealed by the plating liquid holding mechanism to allow supplied electroless plating liquid to be held on the substrate; and a heating apparatus provided below the substrate.

摘要翻译： 本发明涉及一种能够减少使用的电镀液量，保持电镀工序稳定，小型化，降低设备成本，在整个表面形成均匀厚度的膜的化学镀设备，并且防止 电镀液由于升温而劣化。 本发明包括：保持装置，用于保持具有面向上的待镀表面的基板; 电镀液保持机构，用于密封由保持装置保持的基板的待镀表面的周边; 一种化学镀处理液体供应装置，用于向由电镀液保持机构密封的基板的待镀表面供给化学镀液体，以使供给的化学镀液保持在基板上; 以及设置在基板的下方的加热装置。

公开(公告)号：US06828225B2

公开(公告)日：2004-12-07

申请号：US10787218

申请日：2004-02-27

申请人： Fumio Kondo ,  Koji Mishima ,  Akira Tanaka ,  Yoko Suzuki ,  Tetsuji Togawa ,  Hiroaki Inoue

发明人： Fumio Kondo ,  Koji Mishima ,  Akira Tanaka ,  Yoko Suzuki ,  Tetsuji Togawa ,  Hiroaki Inoue

IPC分类号： H01L214763

CPC分类号： H01L21/67161 ,  B24B37/005 ,  B24B37/042 ,  B24B37/245 ,  B24B37/345 ,  B24B41/061 ,  B24B49/16 ,  C23C18/1632 ,  C23C18/1653 ,  C25D7/123 ,  H01L21/02074 ,  H01L21/02087 ,  H01L21/0209 ,  H01L21/288 ,  H01L21/2885 ,  H01L21/3212 ,  H01L21/67167 ,  H01L21/67173 ,  H01L21/67184 ,  H01L21/67219 ,  H01L21/6723 ,  H01L21/67393 ,  H01L21/67396 ,  H01L21/67772 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76849 ,  H01L21/76864 ,  H01L21/76873 ,  H01L21/76874 ,  H01L21/76877

摘要： A substrate procesing method comprising steps for forming a copper film on a surface of a substrate. These steps includes the step of filling a first metal in the trenches so as to form a plated film of the first metal on an entire surface of the substrate by electroplating, wherein the electromagnetic field is adjusted by the virtual anode so that differences of thickness of the plated film between the central portion and the peripheral portion of the substrate being minimized, and polishing and removing the plated film by pressing the substrate to the polishing surface, wherein the pressures pressing the substrate to the polishing surface at a central portion and a peripheral portion are adjusted.

摘要翻译： 一种基板处理方法，包括在基板的表面上形成铜膜的步骤。 这些步骤包括在沟槽中填充第一金属以便通过电镀在基板的整个表面上形成第一金属的镀膜的步骤，其中电磁场由虚拟阳极调节，使得厚度差异 基板的中心部分和周边部分之间的镀膜最小化，并且通过将基板压在研磨表面上来研磨和去除镀膜，其中将基板压在抛光表面的压力在中心部分和周边 部分进行调整。

公开(公告)号：US06790763B2

公开(公告)日：2004-09-14

申请号：US10182835

申请日：2002-10-11

申请人： Fumio Kondo ,  Koji Mishima ,  Akira Tanaka ,  Yoko Suzuki ,  Tetsuji Togawa ,  Hiroaki Inoue

发明人： Fumio Kondo ,  Koji Mishima ,  Akira Tanaka ,  Yoko Suzuki ,  Tetsuji Togawa ,  Hiroaki Inoue

IPC分类号： H01L214763

CPC分类号： H01L21/67161 ,  B24B37/005 ,  B24B37/042 ,  B24B37/245 ,  B24B37/345 ,  B24B41/061 ,  B24B49/16 ,  C23C18/1632 ,  C23C18/1653 ,  C25D7/123 ,  H01L21/02074 ,  H01L21/02087 ,  H01L21/0209 ,  H01L21/288 ,  H01L21/2885 ,  H01L21/3212 ,  H01L21/67167 ,  H01L21/67173 ,  H01L21/67184 ,  H01L21/67219 ,  H01L21/6723 ,  H01L21/67393 ,  H01L21/67396 ,  H01L21/67772 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76849 ,  H01L21/76864 ,  H01L21/76873 ,  H01L21/76874 ,  H01L21/76877

摘要： A substrate processing method comprising steps for forming a copper film on a surface of a substrate. These steps includes the step of filling a first metal in the trenches so as to form a plated film of the first metal on an entire surface of the substrate by electroplating, wherein the electromagnetic field is adjusted by the virtual anode so that differences of thickness of the plated film between the central portion and the peripheral portion of the substrate being minimized, and polishing and removing the plated film by pressing the substrate to the polishing surface, wherein the pressures pressing the substrate to the polishing surface at a central portion and a peripheral portion are adjusted.

公开(公告)号：US06787467B2

公开(公告)日：2004-09-07

申请号：US10118228

申请日：2002-04-09

申请人： Naoaki Ogure ,  Hiroaki Inoue

发明人： Naoaki Ogure ,  Hiroaki Inoue

IPC分类号： H01L2144

CPC分类号： H01L21/7684 ,  H01L21/288 ,  H01L21/76888 ,  H01L23/53233 ,  H01L2924/0002 ,  H01L2924/00

摘要： Embedded interconnections of copper are formed by forming an insulating layer, forming embedded interconnections of copper in the insulating layer, making an exposed upper surface of the insulating layer and an exposed surface of the embedded interconnections of copper coplanar according to chemical mechanical polishing, and forming a protective silver film on the exposed surface of the embedded interconnections of copper. These steps are repeated on the existing insulating layer thereby to produce multiple layers of embedded interconnections of copper. The exposed surface of the embedded interconnections of copper is plated with silver according to immersion plating.

摘要翻译： 铜的嵌入式互连通过形成绝缘层而形成，在绝缘层中形成铜的嵌入互连，根据化学机械抛光使绝缘层的暴露的上表面和铜共面的嵌入式互连的暴露表面，以及形成 在铜的嵌入式互连的暴露表面上的保护性银膜。 在现有的绝缘层上重复这些步骤，从而产生多层铜的嵌入互连。 根据浸镀法，铜的嵌入互连的暴露表面镀银。