Electronic substrate stacking
    43.
    发明授权

    公开(公告)号:US12170252B2

    公开(公告)日:2024-12-17

    申请号:US17449280

    申请日:2021-09-29

    Abstract: A base substrate, high-k substrate layers on the base substrate with discrete decoupling capacitors embedded, high density substrate layers on the high-k substrate layers supporting wiring and wiring spacing of less than 2 up to about 10 micron width, pitch connectivity between the upper surface of the base substrate and a lower surface of the set of high density substrate layers supports less than 50 up to about 300 micron pitch, the pitch connectivity on an upper surface of the set of high density substrate layers supports less than about 150 micron pitch. A method including attaching a set of metal posts at each contact on a lower surface of a set of high density substrate layers, attaching to a handler, attaching an interconnect layer to a base substrate, and attaching the set of high density substrate layers to the base substrate while aligning each metal post with a contact.

    HERMETIC PACKAGING OF A MICRO-BATTERY DEVICE

    公开(公告)号:US20220200086A1

    公开(公告)日:2022-06-23

    申请号:US17128371

    申请日:2020-12-21

    Abstract: A method of manufacturing a micro-battery is provided. The method includes forming a micro-battery device by forming a first metal anode via and a first metal cathode via in a first substrate, forming a first metal layer on a bottom side of the first substrate, forming a first battery element on a top side of the substrate, forming an encapsulation layer around the first battery element, forming trenches through the encapsulation layer and the first substrate on different sides of the first battery element, and forming a metal sealing layer in the trenches to cover at least a plurality of sidewall surfaces of the first battery element. The metal sealing layer is electrically connected to the battery element through the first metal layer and the first metal cathode via.

    Ultra-Thin Microbattery Packaging and Handling

    公开(公告)号:US20210280834A1

    公开(公告)日:2021-09-09

    申请号:US16813071

    申请日:2020-03-09

    Abstract: Microbatteries and methods for forming microbatteries are provided. The microbatteries and methods address at least one or both of edge sealing issues for edges of a stack forming part of a microbatteries and overall sealing for individual cells for microbatteries in a batch process. A transferable solder molding apparatus and sealing structure are proposed in an example to provide a metal casing for a solid-state thin-film microbattery. An exemplary proposed process involves deposition or pre-forming low-temperature solder casing separately from the microbatteries. Then a thermal compression may be used to transfer the solder casing to each battery cell, with a handler apparatus in a batch process in an example. These exemplary embodiments can address the temperature tolerance constrain for solid state thin film battery during handling, metal sealing, and packaging.

    THIN FILM BATTERY STACKING
    48.
    发明申请

    公开(公告)号:US20210265606A1

    公开(公告)日:2021-08-26

    申请号:US16796636

    申请日:2020-02-20

    Abstract: Thin Film Batteries are made of battery layers. Each battery layer has a substrate with one or more battery structures on the substrate surface. The battery structures have a first electrode connection and a second electrode, a first electrode (e.g. a cathode or anode) is electrically connected to the first electrode connection and a second electrode (e.g. an anode or cathode) is electrically connected to the second electrode connection. An electrolyte is at least partial disposed between and electrically connected to the first and second electrodes. A first edge connection on one of the substrate edges is physically and electrically connected to the first electrode connection. A second edge connection on one of the substrate edges is physically and electrically connected to the second electrode connection. An electrically insulating lamination is disposed on the substrate and covers the components except for the first and second edge connections, connected to respective battery electrodes. A first stack external connection electrical connects two or more of the first edge connections and a second stack external connection electrical connects two or more of the second edge connections. A first and second battery pole are connected to the respective first and second stack external connections. The TFBs are hermetically sealed.

    HIGH BANDWIDTH MULTICHIP MODULE
    49.
    发明申请

    公开(公告)号:US20210249381A1

    公开(公告)日:2021-08-12

    申请号:US16788459

    申请日:2020-02-12

    Abstract: Multi-semiconductor chip modules that have a substrate with a substrate surface, one or more first substrate connections, and one or more second substrate connections. One or more first semiconductor chips (chips) has one or more larger first chip connections and one or more smaller first chip connections on a first chip bottom surface. One or more of the larger first chip connections physically and electrically connected to a respective first substrate connection. One or more second chips has one or more larger second chip connections and one or more smaller second chip connections on a second chip bottom surface. One or more of the larger second chip connections physically and electrically connected to a respective second substrate connection. A bridge has a bridge thickness, a bridge surface, and one or more bridge connections on the bridge surface. A first part of the bridge surface is under the first chip bottom surface and a second part of the bridge surface is under the second chip bottom surface. The bridge is disposed on the substrate between the first semiconductor chip and the second semiconductor chip, and one or more of the smaller first chip connections is physically and electrically connected to a respective first bridge connection on the first part of the bridge surface and one or more of the smaller second chip connection is physically and electrically connected to a respective second bridge connection. Some embodiments, a large surface bridge with the bridge. The large surface bridge and bridge can have different configurations. The bridge thickness allows larger chip connections and smaller connections with high pitch to intermingled in a location within the module. Methods of manufacture are disclosed.

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