公开(公告)号：US08885115B2

公开(公告)日：2014-11-11

申请号：US14164713

申请日：2014-01-27

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Junichiro Sakata ,  Masayuki Sakakura ,  Yoshiaki Oikawa ,  Kenichi Okazaki ,  Hotaka Maruyama ,  Masashi Tsubuku

IPC: G02F1/136 ,  G02F1/1343 ,  H01L27/12

CPC classification number: H01L27/1225 ,  G02F1/13306 ,  G02F1/133345 ,  G02F1/133528 ,  G02F1/1337 ,  G02F1/1339 ,  G02F1/13394 ,  G02F1/134336 ,  G02F1/13439 ,  G02F1/13454 ,  G02F1/136204 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/133302 ,  G02F2001/133357 ,  G02F2201/123 ,  G11C19/28 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/247 ,  H01L29/78618 ,  H01L29/78648 ,  H01L29/78693 ,  H01L29/78696

Abstract: An object is to improve reliability of a semiconductor device. A semiconductor device including a driver circuit portion and a display portion (also referred to as a pixel portion) over the same substrate is provided. The driver circuit portion and the display portion include thin film transistors in which a semiconductor layer includes an oxide semiconductor; a first wiring; and a second wiring. The thin film transistors each include a source electrode layer and a drain electrode layer. In the thin film transistor in the driver circuit portion, the semiconductor layer is sandwiched between a gate electrode layer and a conductive layer. The first wiring and the second wiring are electrically connected to each other in an opening provided in a gate insulating film through an oxide conductive layer.

Abstract translation: 目的是提高半导体器件的可靠性。 提供了包括驱动电路部分和在相同基板上的显示部分（也称为像素部分）的半导体器件。 驱动器电路部分和显示部分包括其中半导体层包括氧化物半导体的薄膜晶体管; 第一布线 和第二布线。 薄膜晶体管各自包括源极电极层和漏极电极层。 在驱动电路部分的薄膜晶体管中，半导体层夹在栅电极层和导电层之间。 第一布线和第二布线在通过氧化物导电层设置在栅极绝缘膜中的开口中彼此电连接。

公开(公告)号：US08853697B2

公开(公告)日：2014-10-07

申请号：US13776999

申请日：2013-02-26

Applicant: Semiconductor Energy Laboratory Co., Ltd. ,  Sharp Kabushiki Kaisha

Inventor： Kenichi Okazaki ,  Takuya Matsuo ,  Yoshitaka Yamamoto ,  Hiroshi Matsukizono ,  Yosuke Kanzaki

IPC: H01L29/04 ,  H01L31/036 ,  H01L31/0376 ,  H01L31/20 ,  H01L29/786

CPC classification number: H01L29/7869 ,  H01L29/78603

Abstract: To inhibit a metal element contained in a glass substrate from being diffused into a gate insulating film or an oxide semiconductor film. A semiconductor device includes a glass substrate, a base insulating film formed using metal oxide over the glass substrate, a gate electrode formed over the base insulating film, a gate insulating film formed over the gate electrode, an oxide semiconductor film which is formed over the gate insulating film and overlapping with the gate electrode, and a source electrode and a drain electrode which are electrically connected to the oxide semiconductor film. In a region of the base insulating film that is present in a range of 3 nm or less from a surface of the base insulating film, the concentration of a metal element contained in the glass substrate is less than or equal to 1×1018 atoms/cm3.

Abstract translation: 抑制包含在玻璃基板中的金属元素扩散到栅极绝缘膜或氧化物半导体膜中。 半导体器件包括玻璃衬底，在玻璃衬底上形成的使用金属氧化物的基底绝缘膜，形成在基底绝缘膜上的栅极电极，形成在栅电极上的栅极绝缘膜，形成在该绝缘膜上的氧化物半导体膜， 栅极绝缘膜并与栅电极重叠，以及与氧化物半导体膜电连接的源电极和漏电极。 在基极绝缘膜的与基底绝缘膜的表面存在3nm以下的范围的区域中，玻璃基板中所含的金属元素的浓度小于或等于1×1018原子/ cm3。

公开(公告)号：US20140001468A1

公开(公告)日：2014-01-02

申请号：US13924757

申请日：2013-06-24

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Kenichi Okazaki ,  Junichi Koezuka ,  Toshinari Sasaki

IPC: H01L29/786 ,  H01L29/66

CPC classification number: H01L29/66969 ,  H01L21/0217 ,  H01L21/441 ,  H01L29/78618 ,  H01L29/78621 ,  H01L29/7869 ,  H01L29/78693

Abstract: In a top-gate transistor in which an oxide semiconductor film, a gate insulating film, a gate electrode layer, and a silicon nitride film are stacked in this order and the oxide semiconductor film includes a channel formation region, nitrogen is added to regions of part of the oxide semiconductor film and the regions become low-resistance regions by forming a silicon nitride film over and in contact with the oxide semiconductor film. A source and drain electrode layers are in contact with the low-resistance regions. A region of the oxide semiconductor film, which does not contact the silicon nitride film (that is, a region overlapping with the gate insulating film and the gate electrode layer) becomes the channel formation region.

Abstract translation: 在其中氧化物半导体膜，栅极绝缘膜，栅电极层和氮化硅膜依次堆叠并且氧化物半导体膜包括沟道形成区域的顶栅晶体管中，将氮添加到 氧化物半导体膜的一部分，并且通过在氧化物半导体膜上形成氮化硅膜并与氧化物半导体膜接触而成为低电阻区域。 源极和漏极电极层与低电阻区域接触。 不接触氮化硅膜（即，与栅极绝缘膜和栅电极层重叠的区域）的氧化物半导体膜的区域成为沟道形成区域。

公开(公告)号：US20130244374A1

公开(公告)日：2013-09-19

申请号：US13794085

申请日：2013-03-11

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Kenichi Okazaki ,  Seiji Yasumoto ,  Shun Mashiro ,  Shunpei Yamazaki

IPC: H01L29/66

CPC classification number: H01L29/78696 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/7869

Abstract: A method for manufacturing a semiconductor device including an oxide semiconductor includes the steps of forming an oxide semiconductor film, forming a gate insulating film provided over the oxide semiconductor film, forming a gate electrode in contact with the gate insulating film, a sidewall insulating film in contact with the gate electrode, and forming a source electrode and a drain electrode in contact with the oxide semiconductor film. In the method, the gate insulating film and the sidewall insulating film are formed at a temperature at which oxygen contained in the oxide semiconductor film is inhibited from being eliminated, preferably at a temperature lower than a temperature at which oxygen contained in the oxide semiconductor film is eliminated.

Abstract translation: 一种制造包括氧化物半导体的半导体器件的方法包括以下步骤：形成氧化物半导体膜，形成设置在氧化物半导体膜上的栅极绝缘膜，形成与栅极绝缘膜接触的栅电极， 与栅电极接触，形成与氧化物半导体膜接触的源电极和漏电极。 在该方法中，在氧化物半导体膜中包含的氧被抑制的温度下，优选在低于氧化物半导体膜中所含的氧的温度的温度下形成栅极绝缘膜和侧壁绝缘膜 被淘汰。

公开(公告)号：US12230719B2

公开(公告)日：2025-02-18

申请号：US17902010

申请日：2022-09-02

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Kenichi Okazaki ,  Daisuke Kurosaki ,  Yasutaka Nakazawa

IPC: H01L29/786 ,  H01L27/12

Abstract: To improve field-effect mobility and reliability of a transistor including an oxide semiconductor film. A semiconductor device includes an oxide semiconductor film, a gate electrode, an insulating film over the gate electrode, the oxide semiconductor film over the insulating film, and a pair of electrodes over the oxide semiconductor film. The oxide semiconductor film includes a first oxide semiconductor film and a second oxide semiconductor film over the first oxide semiconductor film. The first oxide semiconductor film and the second oxide semiconductor film, include the same element. The first oxide semiconductor film includes a region having lower crystallinity than the second oxide semiconductor film.

公开(公告)号：US12142658B2

公开(公告)日：2024-11-12

申请号：US17747063

申请日：2022-05-18

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yasutaka Nakazawa ,  Kenichi Okazaki ,  Takayuki Ohide ,  Rai Sato

IPC: H01L29/66 ,  H01L27/12 ,  H01L29/45 ,  H01L29/786 ,  G02F1/1368 ,  H10K59/121

Abstract: A semiconductor device is fabricated by a method including the following steps: a first step of forming a semiconductor film containing a metal oxide over an insulating layer; a second step of forming a conductive film over the semiconductor film; a third step of forming a first resist mask over the conductive film and etching the conductive film to form a first conductive layer and to expose a top surface of the semiconductor film that is not covered with the first conductive layer; and a fourth step of forming a second resist mask that covers a top surface and a side surface of the first conductive layer and part of the top surface of the semiconductor film and etching the semiconductor film to form a semiconductor layer and to expose a top surface of the insulating layer that is not covered with the semiconductor layer.

公开(公告)号：US12046679B2

公开(公告)日：2024-07-23

申请号：US18364749

申请日：2023-08-03

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Junichi Koezuka ,  Kenichi Okazaki ,  Yukinori Shima ,  Shinpei Matsuda ,  Haruyuki Baba ,  Ryunosuke Honda

IPC: H01L29/786 ,  H01L21/02 ,  H01L21/8234 ,  H01L27/12 ,  H01L29/66 ,  H01L29/778 ,  H01L29/24

CPC classification number: H01L29/7869 ,  H01L21/02565 ,  H01L21/823412 ,  H01L27/1225 ,  H01L27/127 ,  H01L29/66969 ,  H01L29/7781 ,  H01L29/7782 ,  H01L29/7786 ,  H01L29/78648 ,  H01L29/78696 ,  H01L29/24

Abstract: To improve field-effect mobility and reliability in a transistor including an oxide semiconductor film. A semiconductor device includes a transistor including an oxide semiconductor film. The transistor includes a region where the maximum value of field-effect mobility of the transistor at a gate voltage of higher than 0 V and lower than or equal to 10 V is larger than or equal to 40 and smaller than 150; a region where the threshold voltage is higher than or equal to minus 1 V and lower than or equal to 1 V; and a region where the S value is smaller than 0.3 V/decade.

公开(公告)号：US11961918B2

公开(公告)日：2024-04-16

申请号：US17894197

申请日：2022-08-24

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Yasutaka Nakazawa ,  Yukinori Shima ,  Kenichi Okazaki ,  Junichi Koezuka ,  Shunpei Yamazaki

IPC: H01L29/786 ,  G09F9/30 ,  H01L21/02 ,  H01L29/51 ,  H01L29/66 ,  H05B33/10 ,  H05B33/14

CPC classification number: H01L29/7869 ,  G09F9/30 ,  H01L21/02164 ,  H01L21/02172 ,  H01L21/02274 ,  H01L21/02323 ,  H01L21/02554 ,  H01L29/517 ,  H01L29/66742 ,  H05B33/10 ,  H05B33/14

Abstract: A semiconductor device which has favorable electrical characteristics, a method for manufacturing a semiconductor device with high productivity, and a method for manufacturing a semiconductor device with a high yield are provided. The method for manufacturing a semiconductor device includes a first step of forming a first insulating layer containing silicon and nitrogen, a second step of adding oxygen in a vicinity of a surface of the first insulating layer, a third step of forming a semiconductor layer containing a metal oxide over and in contact with the first insulating layer, a fourth step of forming a second insulating layer containing oxygen over and in contact with the semiconductor layer, a fifth step of performing plasma treatment in an atmosphere containing oxygen at a first temperature, a sixth step of performing plasma treatment in an atmosphere containing oxygen at a second temperature lower than the first temperature, and a seventh step of forming a third insulating layer containing silicon and nitrogen over the second insulating layer.

公开(公告)号：US11899328B2

公开(公告)日：2024-02-13

申请号：US17994525

申请日：2022-11-28

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Yasuharu Hosaka ,  Yukinori Shima ,  Kenichi Okazaki ,  Shunpei Yamazaki

IPC: G02F1/1368 ,  G02F1/1333 ,  G02F1/1362 ,  H01L27/12 ,  G02F1/1345 ,  G02F1/1335 ,  G02F1/1337

CPC classification number: G02F1/1368 ,  G02F1/1337 ,  G02F1/13454 ,  G02F1/133345 ,  G02F1/133512 ,  G02F1/136227 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/1248

Abstract: The display device includes a first substrate provided with a driver circuit region that is located outside and adjacent to a pixel region and includes at least one second transistor which supplies a signal to the first transistor in each of the pixels in the pixel region, a second substrate facing the first substrate, a liquid crystal layer between the first substrate and the second substrate, a first interlayer insulating film including an inorganic insulating material over the first transistor and the second transistor, a second interlayer insulating film including an organic insulating material over the first interlayer insulating film, and a third interlayer insulating film including an inorganic insulating material over the second interlayer insulating film. The third interlayer insulating film is provided in part of an upper region of the pixel region, and has an edge portion on an inner side than the driver circuit region.

公开(公告)号：US11862454B2

公开(公告)日：2024-01-02

申请号：US17377674

申请日：2021-07-16

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Junichi Koezuka ,  Kenichi Okazaki ,  Masami Jintyou

IPC: H01L29/786 ,  H01L29/66 ,  H01L29/417 ,  H01L29/423 ,  H01L21/02 ,  H01L21/425 ,  H01L29/49 ,  H01L27/12 ,  H01L21/473 ,  H01L21/768

CPC classification number: H01L29/7869 ,  H01L21/0234 ,  H01L21/0262 ,  H01L21/02323 ,  H01L21/02337 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/425 ,  H01L27/1225 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78696 ,  H01L21/473 ,  H01L21/76826 ,  H01L21/76832

Abstract: A change in electrical characteristics in a semiconductor device including an oxide semiconductor film is inhibited, and the reliability is improved. The semiconductor device includes a gate electrode, a first insulating film over the gate electrode, an oxide semiconductor film over the first insulating film, a source electrode electrically connected to the oxide semiconductor film, a drain electrode electrically connected to the oxide semiconductor film, a second insulating film over the oxide semiconductor film, the source electrode, and the drain electrode, a first metal oxide film over the second insulating film, and a second metal oxide film over the first metal oxide film. The first metal oxide film contains at least one metal element that is the same as a metal element contained in the oxide semiconductor film. The second metal oxide film includes a region where the second metal oxide film and the first metal oxide film are mixed.