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41.
公开(公告)号:US20230378931A1
公开(公告)日:2023-11-23
申请号:US18352972
申请日:2023-07-14
Applicant: Soitec
Inventor: Marcel Broekaart , Thierry Barge , Pascal Guenard , Ionut Radu , Eric Desbonnets , Oleg Kononchuk
IPC: H03H9/02 , H03H3/02 , H03H9/17 , H03H9/145 , H10N30/072 , H10N30/87 , H03H9/64 , A61B5/00 , H03H9/25 , H03H9/56 , A61B5/145 , A61B5/1459 , H03H3/04 , H03H9/13 , H10N39/00 , H03H3/10 , H10N30/085
CPC classification number: H03H9/02834 , H03H3/02 , H03H9/02102 , H03H9/17 , H03H9/145 , H10N30/072 , H10N30/87 , H03H9/6489 , A61B5/685 , H03H9/25 , H03H9/56 , A61B5/14546 , A61B5/1459 , H03H3/04 , H03H9/13 , H03H9/02574 , H10N39/00 , H03H3/10 , H10N30/085 , H03H2003/0407 , A61B2562/0204
Abstract: A substrate for a surface acoustic wave device or bulk acoustic wave device, comprising a support substrate and an piezoelectric layer on the support substrate, wherein the support substrate comprises a semiconductor layer on a stiffening substrate having a coefficient of thermal expansion that is closer to the coefficient of thermal expansion of the material of the piezoelectric layer than that of silicon, the semiconductor layer being arranged between the piezoelectric layer and the stiffening substrate.
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公开(公告)号:US20220139768A1
公开(公告)日:2022-05-05
申请号:US17435017
申请日:2020-03-26
Applicant: Soitec
Inventor: Marcel Broekaart , Arnaud Castex
IPC: H01L21/762
Abstract: A method for fabricating a semiconductor-on-insulator structure involves providing a donor substrate comprising a weakened zone delimiting a layer to be transferred, providing a receiver substrate, and bonding the donor substrate to the receiver substrate. The layer to be transferred is located on the bonding-interface side. A bonding wave is initiated at a first region on the periphery of the interface, and the wave is propagated toward a second region on the periphery of the interface opposite the first region. The difference in speed of propagation of the bonding wave between a central portion of the interface and a peripheral portion of the interface is controlled such that the speed of propagation of the bonding wave is lower in the central portion than in the peripheral portion. The donor substrate is detached along the weakened zone to transfer the layer to be transferred to the receiver substrate.
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43.
公开(公告)号:US20210121103A1
公开(公告)日:2021-04-29
申请号:US17141065
申请日:2021-01-04
Applicant: Soitec
Inventor: Marcel Broekaart , Thierry Barge , Pascal Guenard , Ionut Radu , Eric Desbonnets , Oleg Kononchuk
IPC: A61B5/1459 , A61B5/00 , A61B5/145
Abstract: A substrate for a surface acoustic wave device or bulk acoustic wave device, comprising a support substrate and an piezoelectric layer on the support substrate, wherein the support substrate comprises a semiconductor layer on a stiffening substrate having a coefficient of thermal expansion that is closer to the coefficient of thermal expansion of the material of the piezoelectric layer than that of silicon, the semiconductor layer being arranged between the piezoelectric layer and the stiffening substrate.
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公开(公告)号:US20210118717A1
公开(公告)日:2021-04-22
申请号:US17135340
申请日:2020-12-28
Applicant: Soitec
Inventor: Marcel Broekaart , Ionut Radu , Didier Landru
IPC: H01L21/683 , H01L21/48 , H01L21/762
Abstract: The present disclosure relates to a method for mechanically separating layers, in particular in a double layer transfer process. The present disclosure relates more in particular to a method for mechanically separating layers, comprising the steps of providing a semiconductor compound comprising a layer of a handle substrate and an active layer with a front main side and a back main side opposite the front main side, wherein the layer of the handle substrate is attached to the front main side of the active layer, then providing a layer of a carrier substrate onto the back main side of the active layer, and then initiating mechanical separation of the layer of the handle substrate, wherein the layer of the handle substrate and the layer of the carrier substrate are provided with a substantially symmetrical mechanical structure.
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公开(公告)号:US20210066063A1
公开(公告)日:2021-03-04
申请号:US17095550
申请日:2020-11-11
Applicant: Soitec
Inventor: Pascal Guenard , Marcel Broekaart , Thierry Barge
IPC: H01L21/02 , H01L41/312 , H01L41/083 , H01L41/187
Abstract: A method for manufacturing a substrate includes the following steps: (a) providing a support substrate with a first coefficient of thermal expansion, having on one of its faces a first plurality of trenches parallel to each other in a first direction, and a second plurality of trenches parallel to each other in a second direction; (b) transferring a useful layer from a donor substrate to the support substrate, the useful layer having a second coefficient of thermal expansion; wherein an intermediate layer is inserted between the front face of the support substrate and the useful layer, the intermediate layer having a coefficient of thermal expansion between the first and second coefficients of thermal expansion.
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公开(公告)号:US10819282B2
公开(公告)日:2020-10-27
申请号:US16614732
申请日:2018-05-23
Applicant: Soitec
Inventor: Marcel Broekaart , Frederic Allibert , Eric Desbonnets , Jean-Pierre Raskin , Martin Rack
Abstract: A method for minimizing harmonic distortion and/or intermodulation distortion of a radiofrequency signal propagating in a radiofrequency circuit formed on a semiconductor substrate coated with an electrically insulating layer, wherein a curve representing the distortion as a function of a power of the input or output signal exhibits a trough around a given power (PDip), the method comprises applying, between the radiofrequency circuit and the semiconductor substrate, an electrical potential difference (VGB) chosen so as to move the trough toward a given operating power of the radiofrequency circuit.
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公开(公告)号:US20190165252A1
公开(公告)日:2019-05-30
申请号:US16306822
申请日:2017-05-30
Applicant: Soitec
Inventor: Marcel Broekaart
IPC: H01L41/312 , H01L41/08 , H03H3/10 , H03H9/02
Abstract: A hybrid structure for a surface acoustic wave device comprises a useful layer of piezoelectric material having a first free surface and a second surface disposed on a support substrate that has a lower coefficient of thermal expansion than that of the useful layer, wherein the useful layer comprises an area of nanocavities.
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48.
公开(公告)号:US10297464B2
公开(公告)日:2019-05-21
申请号:US15577133
申请日:2016-06-01
Applicant: Soitec
Inventor: Marcel Broekaart , Luciana Capello , Isabelle Bertrand , Norbert Colombet
IPC: H01L21/324 , H01L21/322 , H01L21/84 , H01L21/66 , H01L29/10 , H01L21/762 , H01L21/268 , H01L21/67
Abstract: A process for the manufacture of a semiconductor element includes a stage of rapid heat treatment of a substrate comprising a charge-trapping layer, which is capable of damaging an RF characteristic of the substrate. The rapid heat treatment stage is followed by a healing heat treatment of the substrate between 700° C. and 1,100° C., for a period of time of at least 15 seconds.
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49.
公开(公告)号:US20180182640A1
公开(公告)日:2018-06-28
申请号:US15577133
申请日:2016-06-01
Applicant: Soitec
Inventor: Marcel Broekaart , Luciana Capello , Isabelle Bertrand , Norbert Colombet
IPC: H01L21/324 , H01L21/322 , H01L29/10 , H01L21/84 , H01L21/66
CPC classification number: H01L21/324 , H01L21/2686 , H01L21/3226 , H01L21/67115 , H01L21/76251 , H01L21/76254 , H01L21/84 , H01L22/14 , H01L29/1079
Abstract: A process for the manufacture of a semiconductor element includes a stage of rapid heat treatment of a substrate comprising a charge-trapping layer, which is capable of damaging an RF characteristic of the substrate. The rapid heat treatment stage is followed by a healing heat treatment of the substrate between 700° C. and 1100° C., for a period of time of at least 15 seconds.
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公开(公告)号:US09953855B2
公开(公告)日:2018-04-24
申请号:US14938492
申请日:2015-11-11
Applicant: Soitec
Inventor: Marcel Broekaart
IPC: H01L21/683 , H01L21/18 , H01L21/78 , H01L21/02
CPC classification number: H01L21/6835 , H01L21/02002 , H01L21/185 , H01L21/7806 , H01L2221/68313 , H01L2221/68327 , H01L2221/6834 , H01L2221/68363
Abstract: The invention relates to a process for transferring an active layer to a final substrate using a temporary substrate, the active layer comprises a first side having a three-dimensional surface topology, the process comprising: a first step of bonding the first side of the active layer to one side of the temporary substrate; a second step of bonding a second side of the active layer to the final substrate; and a third step of separating the active layer and the temporary substrate; the process being characterized in that the side of the temporary substrate possesses a surface topology complementary to the surface topology of the first side of the active layer, so that the surface topology of the temporary substrate encapsulates the surface topology of the first side of the active layer in the bonding first step.
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