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    Semiconductor package
    43.
    发明授权
    Semiconductor package 有权

    公开(公告)号：US11735494B2

    公开(公告)日：2023-08-22

    申请号：US17408988

    申请日：2021-08-23

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Hee-Jeong Kim ,  Juhyun Lyu ,  Un-Byoung Kang ,  Jongho Lee

    IPC: H01L23/373 ,  H01L23/31 ,  H01L23/367

    CPC classification number: H01L23/3735 ,  H01L23/3185 ,  H01L23/367

    Abstract: Disclosed is a semiconductor package comprising first and second semiconductor structures spaced apart on a first substrate, a heat sink covering the first and second semiconductor structure and the first substrate, and a thermal interface material layer between the heat sink and the first and second semiconductor structures. The first semiconductor structure includes a first sidewall adjacent to the second semiconductor structure and a second sidewall opposite the first sidewall. The thermal interface material layer includes a first segment between the first and second semiconductor structures and a second segment protruding beyond the second sidewall. A first distance from a top surface of the first substrate to a lowest point of a bottom surface of the first segment is less than a second distance from the top surface of the first substrate to a lowest point of a bottom surface of the second segment.

    SEMICONDUCTOR PACKAGES
    44.
    发明公开
    SEMICONDUCTOR PACKAGES 审中-公开

    公开(公告)号：US20230207532A1

    公开(公告)日：2023-06-29

    申请号：US18176058

    申请日：2023-02-28

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Joonho JUN ,  Un-Byoung Kang ,  Sunkyoung Seo ,  Jongho Lee ,  Young Kun Jee

    IPC: H01L25/065 ,  H01L23/00

    CPC classification number: H01L25/0657 ,  H01L24/14 ,  H01L24/06 ,  H01L2224/06181 ,  H01L2224/1451 ,  H01L2224/06515 ,  H01L2224/0401 ,  H01L2225/06513

    Abstract: A semiconductor package may include first and second substrates, which are vertically stacked, a semiconductor device layer on a bottom surface of the second substrate to face a top surface of the first substrate, upper chip pads and an upper dummy pad on the top surface of the first substrate, penetration electrodes, which each penetrate the first substrate and are connected to separate, respective upper chip pads, lower chip pads on a bottom surface of the semiconductor device layer and electrically connected to separate, respective upper chip pads, and a lower dummy pad on the bottom surface of the semiconductor device layer and electrically isolated from the upper dummy pad. A distance between the upper and lower dummy pads in a horizontal direction that is parallel to the first substrate may be smaller than a diameter of the lower dummy pad.

    SEMICONDUCTOR PACKAGE WITH INCREASED THERMAL RADIATION EFFICIENCY
    46.
    发明申请
    SEMICONDUCTOR PACKAGE WITH INCREASED THERMAL RADIATION EFFICIENCY 有权

    公开(公告)号：US20220293566A1

    公开(公告)日：2022-09-15

    申请号：US17552614

    申请日：2021-12-16

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sang-Sick Park ,  Un-Byoung Kang ,  Jongho Lee ,  Teak-Hoon Lee

    IPC: H01L25/065 ,  H01L23/00

    Abstract: Disclosed is a semiconductor package with increased thermal radiation efficiency, which includes: a first die having signal and dummy regions and including first vias in the signal region, a second die on the first die and including second vias in the signal region, first die pads on a top surface of the first die and coupled to the first vias, first connection terminals on the first die pads which couple the second vias to the first vias, second die pads in the dummy region and on the top surface of the first die, and second connection terminals on the second die pads and electrically insulated from the first vias and the second vias. Each of the second die pads has a rectangular planar shape whose major axis is provided along a direction that leads away from the signal region.

    Water purifier and filter for the same
    47.
    发明授权
    Water purifier and filter for the same 有权

    公开(公告)号：US11312639B2

    公开(公告)日：2022-04-26

    申请号：US17003205

    申请日：2020-08-26

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jungha Park ,  Jongho Lee ,  Yeonwoo Cho ,  Sungpil Choi

    IPC: C02F1/00 ,  B01D35/16 ,  C02F1/32 ,  B01D65/02

    Abstract: A water purifier and a filter for the water purifier are provided. The water purifier includes a raw water flow path formed to bring in raw water from the outside, a purified water flow path connected to the raw water flow path for the raw water to flow in a first direction, a filter located in the purified water flow path to filter the raw water, a bypass flow path branched from the purified water flow path for the raw water to bypass the filter and connected to the purified water flow path on a downstream side of the filter in the first direction, a washing flow path branched from the bypass flow path and connected to the purified water flow path on a downstream side of the filter in the first direction, and a drain flow path connected to the filter to guide the raw water flowing into the filter to a second direction. The filter includes a raw water inlet through which raw water flowing in the first direction is introduced, a purified water outlet through which purified water filtered is released, and a drain outlet through which wash water having washed the filter is discharged.

    Semiconductor device
    49.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US10109631B2

    公开(公告)日：2018-10-23

    申请号：US15438113

    申请日：2017-02-21

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Sung-Dae Suk ,  Jongho Lee ,  Geumjong Bae

    IPC: H01L27/092 ,  H01L23/535 ,  H01L29/78 ,  H01L29/417

    Abstract: A semiconductor device includes an insulating layer on a substrate, a channel region on the insulating layer, a gate structure on the insulating layer, the gate structure crossing the channel region, source/drain regions on the insulating layer, the source/drain regions being spaced apart from each other with the gate structure interposed therebetween, the channel region connecting the source/drain regions to each other, and contact plugs connected to the source/drain regions, respectively. The channel region includes a plurality of semiconductor patterns that are vertically spaced apart from each other on the insulating layer, the insulating layer includes first recess regions that are adjacent to the source/drain regions, respectively, and the contact plugs include lower portions provided into the first recess regions, respectively.

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