公开(公告)号：US20070061652A1

公开(公告)日：2007-03-15

申请号：US11217276

申请日：2005-09-01

申请人： Sanjeev Kaushal ,  Pradeep Pandey ,  Kenji Sugishima

发明人： Sanjeev Kaushal ,  Pradeep Pandey ,  Kenji Sugishima

IPC分类号： G01R31/28

CPC分类号： H01L22/10 ,  G05B19/41875 ,  G05B23/0254 ,  H01L21/67248 ,  Y02P90/22

摘要： A method of creating and/or modifying a built-in self test (BIST) table for monitoring a thermal processing system in real-time that includes positioning a plurality of wafers in a processing chamber in the thermal processing system; executing a real-time dynamic model to generate a predicted dynamic process response; creating a measured dynamic process response; determining a dynamic estimation error; determining if the determined dynamic estimation error can be associated with a pre-existing BIST rule in the BIST table; creating a new BIST rule when the dynamic estimation error cannot be associated with any pre-existing BIST rule in the BIST table; and stopping the process when a new BIST rule cannot be created.

摘要翻译： 一种创建和/或修改内置自检（BIST）表的方法，用于实时监测热处理系统，包括将多个晶片定位在热处理系统中的处理室中; 执行实时动态模型以产生预测的动态过程响应; 创建一个测量的动态过程响应; 确定动态估计误差; 确定所确定的动态估计误差是否可以与BIST表中的预先存在的BIST规则相关联; 当动态估计错误不能与BIST表中的任何预先存在的BIST规则相关联时，创建新的BIST规则; 并在无法创建新的BIST规则时停止该进程。

公开(公告)号：US07165011B1

公开(公告)日：2007-01-16

申请号：US11217230

申请日：2005-09-01

申请人： Sanjeev Kaushal ,  Pradeep Pandey ,  Kenji Sugishima ,  Anthony Dip ,  David Smith ,  Raymond Joe ,  Sundar Gandhi

发明人： Sanjeev Kaushal ,  Pradeep Pandey ,  Kenji Sugishima ,  Anthony Dip ,  David Smith ,  Raymond Joe ,  Sundar Gandhi

IPC分类号： G06F11/30 ,  G06F15/00

CPC分类号： H01L22/10 ,  G05B23/0254 ,  H01L21/67248

摘要： A method of monitoring a thermal processing system in real-time using a built-in self test (BIST) table that includes positioning a plurality of wafers in a processing chamber in the thermal processing system; executing a real-time dynamic model to generate a predicted dynamic process response for the processing chamber during the processing time; creating a first measured dynamic process response; determining a dynamic estimation error using a difference between the predicted dynamic process response and the measured dynamic process response; and comparing the dynamic estimation error to operational thresholds established by one or more rules in the BIST table.

摘要翻译： 一种使用内置自检（BIST）表实时监测热处理系统的方法，其包括将多个晶片定位在热处理系统中的处理室中; 执行实时动态模型以在处理时间期间为处理室生成预测的动态过程响应; 创建第一个测量动态过程响应; 使用预测的动态过程响应和测量的动态过程响应之间的差来确定动态估计误差; 以及将动态估计误差与由BIST表中的一个或多个规则建立的操作阈值进行比较。

公开(公告)号：US07101816B2

公开(公告)日：2006-09-05

申请号：US10747842

申请日：2003-12-29

申请人： Sanjeev Kaushal ,  Kenji Sugishima ,  Pradeep Pandey

发明人： Sanjeev Kaushal ,  Kenji Sugishima ,  Pradeep Pandey

IPC分类号： G06F19/00

CPC分类号： H01L21/67248

摘要： Methods for adaptive real time control of a system for thermal processing substrates, such as semiconductor wafers and display panels. Generally, the method includes creating a dynamic model of the thermal processing system, incorporating wafer bow in the dynamic model, coupling a diffusion-amplification model into the dynamic thermal model, creating a multivariable controller, parameterizing the nominal setpoints, creating a process sensitivity matrix, creating intelligent setpoints using an efficient optimization method and process data, and establishing recipes that select appropriate models and setpoints during run-time.

摘要翻译： 用于热处理衬底（例如半导体晶片和显示面板）的系统的自适应实时控制的方法。 通常，该方法包括创建热处理系统的动态模型，将动态模型中的晶圆弓结合在一起，将扩散放大模型耦合到动态热模型中，创建多变量控制器，参数化标称设定点，创建过程灵敏度矩阵 ，使用有效的优化方法和过程数据创建智能设定点，以及建立在运行时选择合适的模型和设定值的配方。

公开(公告)号：US20060166501A1

公开(公告)日：2006-07-27

申请号：US11043459

申请日：2005-01-26

申请人： Sanjeev Kaushal ,  Pradeep Pandey ,  Kenji Sugishima

发明人： Sanjeev Kaushal ,  Pradeep Pandey ,  Kenji Sugishima

IPC分类号： H01L21/44

CPC分类号： C23C16/45527 ,  C23C16/45546 ,  C23C16/45557 ,  C23C16/46 ,  C23C16/52

摘要： An adaptive real time thermal processing system is presented that includes a multivariable controller. The method includes creating a dynamic model of the MLD processing system and incorporating virtual sensors in the dynamic model. The method includes using process recipes comprising intelligent set points, dynamic models, and/or virtual sensors.

摘要翻译： 提出了一种包括多变量控制器的自适应实时热处理系统。 该方法包括创建MLD处理系统的动态模型，并将虚拟传感器并入动态模型中。 该方法包括使用包括智能设定点，动态模型和/或虚拟传感器的过程配方。

公开(公告)号：US20050167514A1

公开(公告)日：2005-08-04

申请号：US10769623

申请日：2004-01-30

申请人： Sanjeev Kaushal ,  Pradeep Pandey ,  Kenji Sugishima

发明人： Sanjeev Kaushal ,  Pradeep Pandey ,  Kenji Sugishima

IPC分类号： F23N1/00 ,  G03F20060101 ,  G03F1/14 ,  G03F7/20

CPC分类号： G03F1/68 ,  G03F1/78 ,  H01L21/67248

摘要： An adaptive real time thermal processing system is presented that includes a multivariable controller. Generally, the method includes creating a dynamic model of the thermal processing system; incorporating reticle/mask curvature in the dynamic model; coupling a diffusion-amplification model into the dynamic thermal model; creating a multivariable controller; parameterizing the nominal setpoints into a vector of intelligent setpoints; creating a process sensitivity matrix; creating intelligent setpoints using an efficient optimization method and process data; and establishing recipes that select appropriate models and setpoints during run-time.

摘要翻译： 提出了一种包括多变量控制器的自适应实时热处理系统。 通常，该方法包括创建热处理系统的动态模型; 在动态模型中结合掩模/掩模曲率; 将扩散扩增模型耦合到动态热模型中; 创建一个多变量控制器; 将标称设定值参数化为智能设定点的向量; 创建一个过程敏感性矩阵; 使用有效的优化方法和过程数据创建智能设定点; 并建立在运行期间选择合适的模型和设定值的配方。

公开(公告)号：US20050149886A1

公开(公告)日：2005-07-07

申请号：US10747842

申请日：2003-12-29

申请人： Sanjeev Kaushal ,  Kenji Sugishima ,  Pradeep Pandey

发明人： Sanjeev Kaushal ,  Kenji Sugishima ,  Pradeep Pandey

IPC分类号： F25B21/02 ,  H01L21/00 ,  G06F17/50

CPC分类号： H01L21/67248

摘要： Methods for adaptive real time control of a system for thermal processing substrates, such as semiconductor wafers and display panels. Generally, the method includes creating a dynamic model of the thermal processing system, incorporating wafer bow in the dynamic model, coupling a diffusion-amplification model into the dynamic thermal model, creating a multivariable controller, parameterizing the nominal setpoints, creating a process sensitivity matrix, creating intelligent setpoints using an efficient optimization method and process data, and establishing recipes that select appropriate models and setpoints during run-time.

摘要翻译： 用于热处理衬底（例如半导体晶片和显示面板）的系统的自适应实时控制的方法。 通常，该方法包括创建热处理系统的动态模型，将动态模型中的晶圆弓结合在一起，将扩散放大模型耦合到动态热模型中，创建多变量控制器，参数化标称设定点，创建过程灵敏度矩阵 ，使用有效的优化方法和过程数据创建智能设定点，以及建立在运行时选择合适的模型和设定值的配方。

公开(公告)号：US5430292A

公开(公告)日：1995-07-04

申请号：US134860

申请日：1993-10-12

申请人： Ichiro Honjo ,  Kenji Sugishima ,  Masaki Yamabe

发明人： Ichiro Honjo ,  Kenji Sugishima ,  Masaki Yamabe

IPC分类号： G03F1/00 ,  H01J37/244 ,  H01J37/30 ,  H01J37/29

CPC分类号： G03F1/86 ,  H01J37/244 ,  H01J37/3005 ,  H01J2237/221 ,  H01J2237/2441 ,  H01J2237/24435 ,  H01J2237/2447 ,  H01J2237/24495 ,  H01J2237/24592 ,  H01J2237/2817

摘要： A pattern inspection apparatus is designed to quickly and accurately perform an inspection of an inspecting sample, such as masks, wafers or so forth by irradiating electron beams onto the inspection sample and detecting a secondary electron or a backscattered electron reflected from the surface of the inspecting sample or a transmission electron passing through the inspection sample. The pattern inspection apparatus includes an electron beam generating means including at least one electron gun for generating at least one electron beam irradiating on the surface of the inspecting sample, a movable means for supporting the inspecting sample, a detecting means including a plurality of electron detecting elements for detecting electrons containing information related to the construction of the inspection sample and a detection signal processing means for processing simultaneously or in parallel formation the outputs of the electron detecting elements of the detecting means. Also, when a plurality of electron beams are used for simultaneous irradiation of the inspecting sample, the pattern inspection apparatus is provided a mechanism for avoiding interference of a reflected beam of the adjacent electron beam.

摘要翻译： 图案检查装置被设计为通过将电子束照射到检查样品上并检测从检查表面反射的二次电子或反向散射电子，来快速且准确地对检查样品进行检查，例如掩模，晶片等。 样品或通过检查样品的透射电子。 图案检查装置包括：电子束产生装置，包括至少一个电子枪，用于产生照射在检查样品的表面上的至少一个电子束;支撑检查样品的可移动装置;检测装置，包括多个电子检测 用于检测包含与检查样品的构造相关的信息的电子的元件和用于同时或并行地形成检测装置的电子检测元件的输出的检测信号处理装置。 此外，当使用多个电子束同时照射检查样本时，图案检查装置被提供用于避免相邻电子束的反射光束的干涉的机构。

公开(公告)号：US4352724A

公开(公告)日：1982-10-05

申请号：US208391

申请日：1980-11-19

申请人： Kenji Sugishima ,  Tadakazu Takada

发明人： Kenji Sugishima ,  Tadakazu Takada

IPC分类号： H01L21/306 ,  H01L21/033 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/768 ,  C23C15/00 ,  C23F1/00

CPC分类号： H01L21/76804 ,  H01L21/033 ,  H01L21/0332 ,  H01L21/0334 ,  H01L21/0335 ,  H01L21/3065 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/32134 ,  H01L21/32136 ,  H01L21/32137 ,  H01L21/76838

摘要： A method of manufacturing a semiconductor device having a multi-layer structure comprises the steps of patterning in accordance with a predetermined pattern a thin film of photoresist formed on a film to be etched which has been formed on a semiconductor substrate, etching the film to be etched partly by an isotropic etching using said patterned film as a mask, completing the etching by an anisotropic etching in the direction of its depth, resulting in tapered or inclined sides on the etched film. The isotropic and anisotropic etchings may be carried out in the same apparatus by changing the reactive gases used in these etchings and/or the conditions of each etching, such as the amount of gas, the gas pressure and the applied radio frequency power.

摘要翻译： 一种制造具有多层结构的半导体器件的方法包括以下步骤：根据预定图案将形成在待蚀刻的膜上的光致抗蚀剂薄膜形成在半导体衬底上，将该膜蚀刻成 通过使用所述图案化膜作为掩模的各向同性蚀刻部分地蚀刻，通过在其深度方向上的各向异性蚀刻完成蚀刻，导致蚀刻膜上的锥形或倾斜侧。 各向同性和各向异性蚀刻可以通过改变在这些蚀刻中使用的反应气体和/或每个蚀刻的条件，例如气体量，气体压力和施加的射频功率，在相同的装置中进行。

公开(公告)号：US5384463A

公开(公告)日：1995-01-24

申请号：US238349

申请日：1994-05-05

申请人： Ichiro Honjo ,  Kenji Sugishima ,  Masaki Yamabe

发明人： Ichiro Honjo ,  Kenji Sugishima ,  Masaki Yamabe

IPC分类号： G03F1/86 ,  H01J37/244 ,  H01J37/30 ,  H01J37/06

CPC分类号： G03F1/86 ,  H01J37/244 ,  H01J37/3005 ,  H01J2237/221 ,  H01J2237/2441 ,  H01J2237/24435 ,  H01J2237/2447 ,  H01J2237/24495 ,  H01J2237/24592 ,  H01J2237/2817

摘要： A pattern inspection apparatus is designed to quickly and accurately perform an inspection of an inspection sample, such as a mask or a wafer or the like by irradiating electron beams onto the inspection sample and detecting secondary or backscattered electrons reflected from the surface of the inspection sample and/or transmitted electrons passing through the inspection sample. The pattern inspection apparatus includes an electron beam generator including at least one electron gun for generating at least one electron beam irradiating onto the surface of the inspection sample. A movable support is provided for supporting the inspection sample. The apparatus also includes a detector unit having a plurality of electron detecting elements for detecting electrons containing information related to the construction of the inspection sample and a detection signal processor for processing simultaneously or in parallel formation the outputs of the electron detecting elements of the detector. Also, when a plurality of electron beams are used for simultaneous irradiation of the inspection sample, the pattern inspection apparatus is provided with a mechanism for avoiding interference between the reflected electrons of the adjacent electron beams.

摘要翻译： 图案检查装置被设计为通过将电子束照射到检查样品上并检测从检查样品的表面反射的次级或反向散射电子来快速且准确地执行诸如掩模或晶片等的检查样本的检查 和/或穿过检查样品的透射电子。 图案检查装置包括电子束发生器，其包括至少一个电子枪，用于产生照射到检查样品表面上的至少一个电子束。 提供用于支撑检查样品的可移动支撑件。 该装置还包括具有多个电子检测元件的检测器单元，用于检测包含与检查样本的结构有关的信息的电子;以及检测信号处理器，用于同时或并行地形成检测器的电子检测元件的输出。 此外，当使用多个电子束同时照射检查样本时，图案检查装置设置有用于避免相邻电子束的反射电子之间的干涉的机构。

公开(公告)号：US5126220A

公开(公告)日：1992-06-30

申请号：US648697

申请日：1991-01-31

申请人： Kazuo Tokitomo ,  Yasutaka Ban ,  Kenji Sugishima

发明人： Kazuo Tokitomo ,  Yasutaka Ban ,  Kenji Sugishima

IPC分类号： G03F1/30 ,  G03F1/68 ,  G03F1/80 ,  H01L21/027

CPC分类号： G03F1/30

摘要： A reticle comprises a substrate transparent to an optical beam, an opaque layer provided on the substrate for interrupting the optical beam according to the desired pattern, the opaque layer being patterned to form an opaque pattern that interrupts the optical beam and a transparent pattern that transmits the optical beam selectively according to the desired pattern; and a phase shift pattern transparent to the optical beam for transmitting the optical beam therethrough, wherein the phase shift pattern comprises an electrically conductive material and provided on the substrate in correspondence to the transparent pattern in the opaque layer, for canceling the diffraction of the optical beam passed through the transparent pattern.