公开(公告)号：US20190312036A1

公开(公告)日：2019-10-10

申请号：US16443880

申请日：2019-06-18

Applicant: UNITED MICROELECTRONICS CORP. ,  Fujian Jinhua Integrated Circuit Co., Ltd.

Inventor： Tsuo-Wen Lu ,  Ger-Pin Lin ,  Tien-Chen Chan ,  Shu-Yen Chan

IPC: H01L27/108 ,  H01L21/28 ,  H01L29/51 ,  H01L21/02 ,  H01L29/423 ,  H01L29/66

Abstract: A semiconductor device includes a semiconductor substrate having a gate trench including of an upper trench and a lower trench. The upper trench is wider than the lower trench. A gate is embedded in the gate trench. The gate includes an upper portion and a lower portion. A first gate dielectric layer is between the upper portion and a sidewall of the upper trench. The first gate dielectric layer has a first thickness. A second gate dielectric layer is between the lower portion and a sidewall of the lower trench and between the lower portion and a bottom surface of the lower trench. The second gate dielectric layer has a second thickness that is smaller than the first thickness.

公开(公告)号：US20190067293A1

公开(公告)日：2019-02-28

申请号：US15712133

申请日：2017-09-21

Applicant: UNITED MICROELECTRONICS CORP. ,  Fujian Jinhua Integrated Circuit Co., Ltd.

Inventor： Ger-Pin Lin ,  Kuan-Chun Lin ,  Chi-Mao Hsu ,  Shu-Yen Chan ,  Shih-Fang Tzou ,  Tsuo-Wen Lu ,  Tien-Chen Chan ,  Feng-Yi Chang ,  Shih-Kuei Yen ,  Fu-Che Lee

IPC: H01L27/108 ,  H01L21/28

Abstract: A method of fabricating a buried word line structure includes providing a substrate with a word line trench therein. Two source/drain doped regions are disposed in the substrate at two sides of the word line trench. Later, a silicon oxide layer is formed to cover the word line trench. A titanium nitride layer is formed to cover the silicon oxide layer. Next, a tilt ion implantation process is performed to implant silicon atoms into the titanium nitride layer to transform part of the titanium nitride layer into a titanium silicon nitride layer. A conductive layer is formed in the word line trench. Subsequently, part of the conductive layer, part of the titanium silicon nitride layer and part of the silicon oxide layer are removed to form a recess. Finally, a cap layer fills in the recess.

公开(公告)号：US20190013204A1

公开(公告)日：2019-01-10

申请号：US15659653

申请日：2017-07-26

Applicant: UNITED MICROELECTRONICS CORP. ,  Fujian Jinhua Integrated Circuit Co., Ltd.

Inventor： Tien-Chen Chan ,  Ger-Pin Lin ,  Tsuo-Wen Lu ,  Chin-Wei Wu ,  Yu-Chun Wang ,  Shu-Yen Chan

IPC: H01L21/28 ,  H01L29/66 ,  H01L21/3105 ,  H01L21/02 ,  H01L21/74 ,  H01L23/535 ,  H01L29/78

Abstract: A method of fabricating a buried word line includes forming a trench in a substrate. Next, a deposition process is performed to form a silicon layer on a sidewall and a bottom at the inner side of the trench. After the deposition process, a gate dielectric layer is formed in the trench. Finally, a conductive layer is formed to fill in the trench.

公开(公告)号：US09882022B2

公开(公告)日：2018-01-30

申请号：US15592150

申请日：2017-05-10

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chia-Ming Kuo ,  Po-Jen Chuang ,  Fu-Jung Chuang ,  Tsai-Yu Wen ,  Tsuo-Wen Lu ,  Yu-Ren Wang ,  Fu-Yu Tsai

IPC: H01L29/66 ,  H01L21/02 ,  H01L21/311 ,  H01L21/28 ,  H01L29/49 ,  H01L29/08 ,  H01L29/16 ,  H01L29/161 ,  H01L29/165 ,  H01L29/78

CPC classification number: H01L29/66545 ,  H01L21/02126 ,  H01L21/02167 ,  H01L21/0228 ,  H01L21/28088 ,  H01L21/31111 ,  H01L29/0847 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/4966 ,  H01L29/6653 ,  H01L29/6656 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/7851

Abstract: A semiconductor device and a method for manufacturing the same are provided in the present invention. The semiconductor device includes a substrate, a gate structure on the substrate and two spacers on both sidewalls of the gate structure. Each spacer comprises an inner first spacer portion made of SiCN and an outer second spacer portion made of SiOCN.

公开(公告)号：US09871136B2

公开(公告)日：2018-01-16

申请号：US15206319

申请日：2016-07-11

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Shih-Cheng Chen ,  Tsai-Yu Wen ,  Shan Ye ,  Tsuo-Wen Lu

IPC: H01L29/78 ,  H01L29/51 ,  H01L29/49 ,  H01L29/66

CPC classification number: H01L29/78391 ,  H01L21/28291 ,  H01L29/4966 ,  H01L29/516 ,  H01L29/517 ,  H01L29/6684

Abstract: A semiconductor device includes a substrate, an electrode layer disposed on the substrate, and a tri-layered gate-control stack sandwiched between the substrate and the electrode layer. The tri-layered gate-control stack includes a ferroelectric layer disposed on the substrate, a mid-gap metal layer sandwiched between the ferroelectric layer and the substrate, and an anti-ferroelectric layer. The anti-ferroelectric layer is sandwiched between the substrate and the mid-gap metal layer. Alternatively, the ferroelectric layer and the mid-gap metal layer are sandwiched between the anti-ferroelectric layer and the substrate.

公开(公告)号：US20160133474A1

公开(公告)日：2016-05-12

申请号：US14537827

申请日：2014-11-10

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chih-Feng Ku ,  Shao-Wei Wang ,  Yi-Hui Lin ,  Tsai-Yu Wen ,  Tsuo-Wen Lu ,  Yu-Ren Wang

IPC: H01L21/28 ,  H01L29/66

CPC classification number: H01L29/6656 ,  H01L21/28035

Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having gate structure thereon, wherein the gate structure comprises a high-k dielectric layer; increasing an ambient pressure around the gate structure to a predetermined pressure by injecting a first gas; reducing the ambient pressure to a base pressure; and forming a spacer around the gate structure.

Abstract translation: 公开了半导体器件的制造方法。 该方法包括以下步骤：提供其上具有栅极结构的衬底，其中栅极结构包括高k电介质层; 通过注入第一气体将栅极结构周围的环境压力增加到预定压力; 将环境压力降低到基础压力; 以及在所述栅极结构周围形成间隔物。

公开(公告)号：US09330902B1

公开(公告)日：2016-05-03

申请号：US14731227

申请日：2015-06-04

Applicant: United Microelectronics Corp.

Inventor： Tsai-Yu Wen ,  Shih-Cheng Chen ,  Shan Ye ,  Tsuo-Wen Lu ,  Yu-Ren Wang

IPC: H01L21/3205 ,  H01L21/02 ,  H01L29/66 ,  H01L29/51 ,  H01L21/28

CPC classification number: H01L21/02181 ,  H01L21/0228 ,  H01L21/28194 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/7836

Abstract: A method for forming a HfOx film based on atomic layer deposition (ALD) process includes: providing a substrate; dividing a plurality of ALD cycles as needed into multiple depositing stages, wherein each of the ALD cycles includes applying HfCl4 pulse and applying H2O pulse over the substrate and a content ratio of HfCl4 to H2O is different and increasing for the depositing stages; and performing the depositing stages to form a HfOx film.

Abstract translation: 基于原子层沉积（ALD）工艺形成HfO x膜的方法包括：提供衬底; 根据需要将多个ALD循环分成多个沉积阶段，其中每个ALD循环包括施加HfCl 4脉冲并在衬底上施加H 2 O脉冲，并且HfCl 4与H 2 O的含量比不同并且对于沉积阶段而言增加; 并进行沉积阶段以形成HfO x膜。

公开(公告)号：US09130014B2

公开(公告)日：2015-09-08

申请号：US14085811

申请日：2013-11-21

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Keng-Jen Lin ,  Yu-Ren Wang ,  Chien-Liang Lin ,  Tsuo-Wen Lu ,  Wei-Jen Chen ,  Chih-Chung Chen

IPC: H01L21/762 ,  H01L21/02

CPC classification number: H01L21/76237 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/0228 ,  H01L21/32105 ,  H01L21/76205 ,  H01L21/76224

Abstract: A method for fabricating shallow trench isolation structure is disclosed. The method includes the steps of: (a) providing a substrate; (b) forming a trench in the substrate; (c) forming a silicon layer in the trench; and (d) performing an oxidation process to partially transform a surface of the silicon layer into an oxide layer.

Abstract translation: 公开了一种用于制造浅沟槽隔离结构的方法。 该方法包括以下步骤：（a）提供衬底; （b）在衬底中形成沟槽; （c）在沟槽中形成硅层; 和（d）进行氧化处理以将硅层的表面部分地转变为氧化物层。