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183 条记录 (耗时 0.051 秒)

    Vehicle control device
    41.
    发明授权
    Vehicle control device 有权
    车辆控制装置

    公开(公告)号：US08108115B2

    公开(公告)日：2012-01-31

    申请号：US12245936

    申请日：2008-10-06

    申请人： Yasuhiko Kobayashi ,  Yasuo Yamaguchi ,  Shinichi Nomura

    发明人： Yasuhiko Kobayashi ,  Yasuo Yamaguchi ,  Shinichi Nomura

    IPC分类号： G06F7/00 ,  G06F17/00 ,  G06F19/00

    CPC分类号： F16H61/143 ,  B60K6/48 ,  F16H61/0025 ,  F16H61/0031 ,  F16H2045/002 ,  Y02T10/6221

    摘要： A vehicle control device including an input member drive-connected to a power source; a mechanical pump; an electric pump assisting the mechanical pump; a drive mechanism transmitting the rotational driving force of the input member to an output member; a fluid coupling between the input member and the drive transmission mechanism and including a lock-up engagement element which receives hydraulic oil discharged from the mechanical pump and the electric pump to operate; a state detection unit that detects the state of the one or more factors that the discharge of the electric pump; and a control unit which executes a first or second control mode, wherein the first control mode permits engagement of the lock-up engagement element if a first condition is satisfied based on the one or more factors, and wherein a second control mode inhibits engagement of the lock-up engagement element if the first condition is not satisfied.

    摘要翻译： 一种车辆控制装置，包括驱动连接到电源的输入构件; 机械泵; 辅助机械泵的电动泵; 将输入构件的旋转驱动力传递到输出构件的驱动机构; 输入构件和驱动传递机构之间的流体联接，并且包括锁定接合元件，其接收从机械泵排出的液压油和电动泵的操作; 状态检测单元，其检测所述电动泵的排出的一个或多个因素的状态; 以及执行第一或第二控制模式的控制单元，其中如果基于一个或多个因素满足第一条件，则第一控制模式允许锁定接合元件的接合，并且其中第二控制模式禁止接合 如果不满足第一条件，则锁定接合元件。

    METHOD OF DRYING PRINTED MATERIAL AND APPARATUS THEREFOR
    43.
    发明申请
    METHOD OF DRYING PRINTED MATERIAL AND APPARATUS THEREFOR 审中-公开
    干燥印刷材料的方法及其设备

    公开(公告)号：US20100192402A1

    公开(公告)日：2010-08-05

    申请号：US12667958

    申请日：2007-07-23

    申请人： Yasuo Yamaguchi ,  Kentaro Asakura ,  Yuji Akiduki ,  Toshiaki Yamaguchi

    发明人： Yasuo Yamaguchi ,  Kentaro Asakura ,  Yuji Akiduki ,  Toshiaki Yamaguchi

    IPC分类号： F26B3/02 ,  F26B21/06

    CPC分类号： B41F23/0433 ,  F26B3/04 ,  F26B13/10 ,  F26B21/004

    摘要： To carry out drying of printing ink with the use of Nano sized high-temperature dryness steam. Nano sized high-temperature dryness steam being clustered on Nano oder is generated and jetted to the print side of printed material so that the Nano sized high-temperature dryness steam imparts intramolecular vibrational energy to ink of the print side. Consequently, the Nano sized high-temperature dryness steam being clustered on Nano oder not only passes through fiber pores in the printed material but also collides with the ink of the print side. The Nano sized high-temperature dryness steam having collided with the ink of the print side imparts thermally excited energy as intramolecular vibrational energy to the ink containing polar molecules. The ink is dried by the intramolecular energy.

    摘要翻译： 使用纳米级高温干燥蒸汽进行印刷油墨的干燥。 产生纳米尺寸的高温干燥蒸汽，并将其喷射到印刷品的印刷面上，使得纳米尺寸的高温干燥蒸汽将分子内的振动能量赋予印刷面的油墨。 因此，纳米尺寸的高温干燥蒸汽聚集在纳米尺寸上不仅穿过印刷材料中的纤维孔，而且还与印刷面的墨水碰撞。 与印刷侧的墨水碰撞的纳米尺寸的高温干燥蒸汽将热激发能作为分子内振动能赋予含有极性分子的油墨。 油墨被分子内的能量干燥。

    ELEMENT WAFER AND METHOD FOR MANUFACTURING THE SAME
    44.
    发明申请
    ELEMENT WAFER AND METHOD FOR MANUFACTURING THE SAME 有权
    元件波形及其制造方法

    公开(公告)号：US20090230485A1

    公开(公告)日：2009-09-17

    申请号：US12172603

    申请日：2008-07-14

    申请人： Mika OKUMURA ,  Makio Horikawa ,  Kimitoshi Satou ,  Yasuo Yamaguchi

    发明人： Mika OKUMURA ,  Makio Horikawa ,  Kimitoshi Satou ,  Yasuo Yamaguchi

    IPC分类号： H01L29/00 ,  H01L21/00

    CPC分类号： G01P15/0802 ,  B81B2201/0235 ,  B81C1/00182 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A recessed portion is provided in first and second insulating films, the first insulating film being stacked on a semiconductor wafer, the second insulating film being stacked on the first insulating film. The first and second insulating films are processed to form wiring in a formation region of the semiconductor wafer in which an acceleration sensor is to be formed. After a sacrificial film is stacked on the wiring and processed, a conductive film is stacked on the wiring and processed to form a plurality of thin film structures in the formation region. The recessed portion surrounds the formation region.

    摘要翻译： 在第一绝缘膜和第二绝缘膜上设置凹部，第一绝缘膜层叠在半导体晶片上，第二绝缘膜层叠在第一绝缘膜上。 在形成有加速度传感器的半导体晶片的形成区域中对第一绝缘膜和第二绝缘膜进行处理以形成布线。 在牺牲膜堆叠在布线上并处理之后，在布线上堆叠导电膜并加工成在形成区域中形成多个薄膜结构。 凹部包围形成区域。

    Semiconductor device, method of manufacturing same and method of designing same
    48.
    发明授权
    Semiconductor device, method of manufacturing same and method of designing same 失效
    半导体装置及其制造方法及其设计方法

    公开(公告)号：US06953979B1

    公开(公告)日：2005-10-11

    申请号：US09466934

    申请日：1999-12-20

    申请人： Yasuo Yamaguchi ,  Shigeto Maegawa ,  Takashi Ipposhi ,  Toshiaki Iwamatsu ,  Shigenobu Maeda ,  Yuuichi Hirano ,  Takuji Matsumoto ,  Shoichi Miyamoto

    发明人： Yasuo Yamaguchi ,  Shigeto Maegawa ,  Takashi Ipposhi ,  Toshiaki Iwamatsu ,  Shigenobu Maeda ,  Yuuichi Hirano ,  Takuji Matsumoto ,  Shoichi Miyamoto

    IPC分类号： H01L21/762 ,  H01L21/331 ,  H01L21/8238 ,  H01L21/84 ,  H01L27/01 ,  H01L27/08 ,  H01L27/092 ,  H01L27/12 ,  H01L29/786 ,  H01L31/00

    CPC分类号： H01L21/84 ,  H01L27/1203

    摘要： A partial oxide film (31) with well regions formed therebeneath isolates transistor formation regions in an SOI layer (3) from each other. A p-type well region (11) is formed beneath part of the partial oxide film (31) which isolates NMOS transistors from each other, and an n-type well region (12) is formed beneath part of the partial oxide film (31) which isolates PMOS transistors from each other. The p-type well region (11) and the n-type well region (12) are formed in side-by-side relation beneath part of the partial oxide film (31) which provides isolation between the NMOS and PMOS transistors. A body region is in contact with the well region (11) adjacent thereto. An interconnect layer formed on an interlayer insulation film (4) is electrically connected to the body region through a body contact provided in the interlayer insulation film (4). A semiconductor device having an SOI structure reduces a floating-substrate effect.

    摘要翻译： 在其之间形成的具有阱区的部分氧化物膜（31）将SOI层（3）中的晶体管形成区域彼此隔离。 在部分氧化膜（31）的下部形成p型阱区（11），其将NMOS晶体管彼此隔离，并且在部分氧化膜（31）的一部分下方形成n型阱区（12） ），其将PMOS晶体管彼此隔离。 p型阱区（11）和n型阱区（12）在部分氧化膜（31）的下部并排形成，其提供NMOS和PMOS晶体管之间的隔离。 身体区域与与其相邻的井区域（11）接触。 形成在层间绝缘膜（4）上的互连层通过设置在层间绝缘膜（4）中的主体接触部电连接到体区。 具有SOI结构的半导体器件减少浮置衬底效应。

    Semiconductor device and method of manufacturing the same
    49.
    发明授权
    Semiconductor device and method of manufacturing the same 失效
    半导体装置及其制造方法

    公开(公告)号：US06882006B2

    公开(公告)日：2005-04-19

    申请号：US10188103

    申请日：2002-07-03

    申请人： Shigenobu Maeda ,  Yasuo Yamaguchi ,  Hirotada Kuriyama ,  Shigeto Maegawa

    发明人： Shigenobu Maeda ,  Yasuo Yamaguchi ,  Hirotada Kuriyama ,  Shigeto Maegawa

    IPC分类号： H01L21/768 ,  H01L21/8242 ,  H01L27/092 ,  H01L27/10 ,  H01L27/108 ,  H01L27/11 ,  H01L27/12 ,  H01L29/78 ,  H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

    CPC分类号： H01L27/092 ,  H01L27/10823 ,  H01L27/10841 ,  H01L27/1104 ,  H01L27/1203 ,  H01L29/66666 ,  H01L29/7827

    摘要： A field effect transistor occupying a small area and a semiconductor device using the same can be obtained. A gate electrode is provided on a substrate on which a source region is provided with a first interlayer insulating film interposed therebetween. The gate electrode is covered with a second interlayer insulating film. A contact hole for exposing a part of the surface of the source region is provided so as to penetrate through the first interlayer insulating film, the gate electrode, and the second interlayer insulating film. A sidewall surface of the contact hole is covered with a gate insulating film. A first semiconductor layer of a first conductivity type is provided on the surface of the source region in contact therewith up to the lower surface of the gate electrode. A channel semiconductor layer is provided on the surface of the first semiconductor layer up to the upper surface of the gate electrode. A second semiconductor layer of a first conductivity type serving as a drain region is provided on the channel semiconductor layer.

    摘要翻译： 可以获得占据小面积的场效应晶体管和使用其的半导体器件。 栅电极设置在基板上，源极区域之间插入有第一层间绝缘膜。 栅电极被第二层间绝缘膜覆盖。 提供用于暴露源区域的一部分表面的接触孔，以穿透第一层间绝缘膜，栅电极和第二层间绝缘膜。 接触孔的侧壁表面被栅极绝缘膜覆盖。 第一导电类型的第一半导体层设置在与其接触的源极区域的表面上，直到栅电极的下表面。 沟道半导体层设置在第一半导体层的表面上直到栅电极的上表面。 在沟道半导体层上设置有用作漏极区的第一导电类型的第二半导体层。

    Semiconductor device
    50.
    发明授权
    Semiconductor device 失效
    半导体器件

    公开(公告)号：US06879020B2

    公开(公告)日：2005-04-12

    申请号：US10718720

    申请日：2003-11-24

    申请人： Yasuo Yamaguchi

    发明人： Yasuo Yamaguchi

    IPC分类号： H01L23/52 ,  H01L21/3205 ,  H01L21/768 ,  H01L21/82 ,  H01L23/522 ,  H01L23/525 ,  H01L29/00

    CPC分类号： H01L23/5258 ,  H01L2924/0002 ,  Y10S257/91 ,  H01L2924/00

    摘要： Via-shaped copper interconnect lines (2) buried in an interlayer insulating film (8) are connected to gate interconnect lines (1) in the lowermost layer. A copper interconnect line (6) of a shield ring (5) is buried in the interlayer insulating film (8), closer to outside than the copper interconnect lines (2). A silicon nitride film (9) is provided on the via-shaped copper interconnect lines (2), on the copper interconnect line (6) of the shield ring (5), and on the interlayer insulating film (8). Provided on the silicon nitride film (9) is a silicon oxide film (10) which holds therein a fuse line (3) for connecting different ones of copper interconnect lines (2). The silicon oxide film (10) is also provided on the upper surfaces of the fuse line (3) and the aluminum interconnect line (7). A silicon nitride film (11) is provided on the silicon oxide film (10). The silicon nitride film (11) defined over the fuse line (3) is removed, thereby creating an opening (4). The silicon nitride film (11) and the aluminum interconnect line (7) are directly connected.

    摘要翻译： 埋在层间绝缘膜（8）中的通孔形状的铜互连线（2）与最下层的栅极互连线（1）连接。 屏蔽环（5）的铜互连线（6）被埋在层间绝缘膜（8）中，比铜互连线（2）更靠近外部。 在通孔形状的铜布线（2）上，屏蔽环（5）的铜互连线（6）和层间绝缘膜（8）上设置氮化硅膜（9）。 设置在氮化硅膜（9）上的是氧化硅膜（10），其中保持有用于连接不同的铜互连线（2）的熔丝（3）。 氧化硅膜（10）也设置在熔丝线（3）和铝互连线（7）的上表面上。 在氧化硅膜（10）上设置氮化硅膜（11）。 限定在熔丝线（3）上方的氮化硅膜（11）被去除，从而形成一个开口（4）。 氮化硅膜（11）和铝互连线（7）直接连接。